3 select ARCH_HAS_SYNC_DMA_FOR_CPU
4 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
5 select ARCH_USE_BUILTIN_BSWAP
6 select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
11 select DMA_NONCOHERENT_OPS
13 select HANDLE_DOMAIN_IRQ
14 select DW_APB_TIMER_OF
15 select GENERIC_LIB_ASHLDI3
16 select GENERIC_LIB_ASHRDI3
17 select GENERIC_LIB_LSHRDI3
18 select GENERIC_LIB_MULDI3
19 select GENERIC_LIB_CMPDI2
20 select GENERIC_LIB_UCMPDI2
21 select GENERIC_ALLOCATOR
22 select GENERIC_ATOMIC64
23 select GENERIC_CLOCKEVENTS
24 select GENERIC_CPU_DEVICES
25 select GENERIC_IRQ_CHIP
26 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW
28 select GENERIC_IRQ_MULTI_HANDLER
29 select GENERIC_SCHED_CLOCK
30 select GENERIC_SMP_IDLE_THREAD
31 select HAVE_ARCH_TRACEHOOK
32 select HAVE_GENERIC_DMA_COHERENT
33 select HAVE_KERNEL_GZIP
34 select HAVE_KERNEL_LZO
35 select HAVE_KERNEL_LZMA
36 select HAVE_C_RECORDMCOUNT
37 select HAVE_DMA_API_DEBUG
38 select HAVE_DMA_CONTIGUOUS
40 select MAY_HAVE_SPARSE_IRQ
41 select MODULES_USE_ELF_RELA if MODULES
44 select OF_EARLY_FLATTREE
45 select OF_RESERVED_MEM
46 select PERF_USE_VMALLOC
49 select USB_ARCH_HAS_EHCI
50 select USB_ARCH_HAS_OHCI
52 config CPU_HAS_CACHEV2
67 For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
69 config CPU_NEED_TLBSYNC
72 config CPU_NEED_SOFTALIGN
75 config CPU_NO_USER_BKPT
78 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
79 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
80 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
81 instruction exception.
82 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
84 config GENERIC_CALIBRATE_DELAY
90 config GENERIC_HWEIGHT
96 config RWSEM_GENERIC_SPINLOCK
102 config TRACE_IRQFLAGS_SUPPORT
107 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
108 default "1024" if (CPU_CK860)
112 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
113 default "12" if (CPU_CK860)
115 config L1_CACHE_SHIFT
117 default "4" if (CPU_CK610)
118 default "5" if (CPU_CK807 || CPU_CK810)
119 default "6" if (CPU_CK860)
121 menu "Processor type and features"
128 bool "CSKY CPU ck610"
129 select CPU_NEED_TLBSYNC
130 select CPU_NEED_SOFTALIGN
131 select CPU_NO_USER_BKPT
134 bool "CSKY CPU ck810"
136 select CPU_NEED_TLBSYNC
139 bool "CSKY CPU ck807"
143 bool "CSKY CPU ck860"
145 select CPU_HAS_CACHEV2
146 select CPU_HAS_LDSTEX
151 prompt "Power Manager Instruction (wait/doze/stop)"
168 bool "CPU has VDSP coprocessor"
169 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
172 bool "CPU has FPU coprocessor"
173 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
176 bool "CPU has Trusted Execution Environment"
180 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
185 int "Maximum number of CPUs (2-32)"
191 bool "High Memory Support"
192 depends on !CPU_CK610
195 config FORCE_MAX_ZONEORDER
196 int "Maximum zone order"
200 hex "DRAM start addr (the same with memory-section in dts)"
205 source "kernel/Kconfig.hz"