3 select ARCH_HAS_SYNC_DMA_FOR_CPU
4 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
5 select ARCH_USE_BUILTIN_BSWAP
6 select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
10 select DMA_DIRECT_REMAP
12 select HANDLE_DOMAIN_IRQ
13 select DW_APB_TIMER_OF
14 select GENERIC_LIB_ASHLDI3
15 select GENERIC_LIB_ASHRDI3
16 select GENERIC_LIB_LSHRDI3
17 select GENERIC_LIB_MULDI3
18 select GENERIC_LIB_CMPDI2
19 select GENERIC_LIB_UCMPDI2
20 select GENERIC_ALLOCATOR
21 select GENERIC_ATOMIC64
22 select GENERIC_CLOCKEVENTS
23 select GENERIC_CPU_DEVICES
24 select GENERIC_IRQ_CHIP
25 select GENERIC_IRQ_PROBE
26 select GENERIC_IRQ_SHOW
27 select GENERIC_IRQ_MULTI_HANDLER
28 select GENERIC_SCHED_CLOCK
29 select GENERIC_SMP_IDLE_THREAD
30 select HAVE_ARCH_TRACEHOOK
31 select HAVE_FUNCTION_TRACER
32 select HAVE_FUNCTION_GRAPH_TRACER
33 select HAVE_GENERIC_DMA_COHERENT
34 select HAVE_KERNEL_GZIP
35 select HAVE_KERNEL_LZO
36 select HAVE_KERNEL_LZMA
37 select HAVE_PERF_EVENTS
38 select HAVE_C_RECORDMCOUNT
39 select HAVE_DMA_API_DEBUG
40 select HAVE_DMA_CONTIGUOUS
41 select MAY_HAVE_SPARSE_IRQ
42 select MODULES_USE_ELF_RELA if MODULES
44 select OF_EARLY_FLATTREE
45 select OF_RESERVED_MEM
46 select PERF_USE_VMALLOC if CPU_CK610
49 select USB_ARCH_HAS_EHCI
50 select USB_ARCH_HAS_OHCI
52 config CPU_HAS_CACHEV2
67 For SMP, CPU needs "ldex&stex" instrcutions to atomic operations.
69 config CPU_NEED_TLBSYNC
72 config CPU_NEED_SOFTALIGN
75 config CPU_NO_USER_BKPT
78 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
79 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
80 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
81 instruction exception.
82 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
84 config GENERIC_CALIBRATE_DELAY
90 config GENERIC_HWEIGHT
96 config RWSEM_GENERIC_SPINLOCK
99 config STACKTRACE_SUPPORT
105 config TRACE_IRQFLAGS_SUPPORT
110 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
111 default "1024" if (CPU_CK860)
115 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
116 default "12" if (CPU_CK860)
118 config L1_CACHE_SHIFT
120 default "4" if (CPU_CK610)
121 default "5" if (CPU_CK807 || CPU_CK810)
122 default "6" if (CPU_CK860)
124 menu "Processor type and features"
131 bool "CSKY CPU ck610"
132 select CPU_NEED_TLBSYNC
133 select CPU_NEED_SOFTALIGN
134 select CPU_NO_USER_BKPT
137 bool "CSKY CPU ck810"
139 select CPU_NEED_TLBSYNC
142 bool "CSKY CPU ck807"
146 bool "CSKY CPU ck860"
148 select CPU_HAS_CACHEV2
149 select CPU_HAS_LDSTEX
154 prompt "C-SKY PMU type"
155 depends on PERF_EVENTS
156 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
162 bool "Performance Monitoring Unit Ver.1"
167 prompt "Power Manager Instruction (wait/doze/stop)"
184 bool "CPU has VDSP coprocessor"
185 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
188 bool "CPU has FPU coprocessor"
189 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
192 bool "CPU has Trusted Execution Environment"
196 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
201 int "Maximum number of CPUs (2-32)"
207 bool "High Memory Support"
208 depends on !CPU_CK610
211 config FORCE_MAX_ZONEORDER
212 int "Maximum zone order"
216 hex "DRAM start addr (the same with memory-section in dts)"
220 bool "Support for hot-pluggable CPUs"
221 select GENERIC_IRQ_MIGRATION
224 Say Y here to allow turning CPUs off and on. CPUs can be
225 controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
227 Say N if you want to disable CPU hotplug.
230 source "kernel/Kconfig.hz"