1 // SPDX-License-Identifier: GPL-2.0
2 /*!***************************************************************************
6 *! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
7 *! kernel modules (i2c_writereg/readreg) and from userspace using
10 *! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
12 *!***************************************************************************/
14 /****************** INCLUDE FILES SECTION ***********************************/
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
21 #include <linux/string.h>
22 #include <linux/init.h>
24 #include <asm/etraxi2c.h>
26 #include <arch/svinto.h>
28 #include <asm/delay.h>
29 #include <arch/io_interface_mux.h>
33 /****************** I2C DEFINITION SECTION *************************/
37 #define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
38 static const char i2c_name[] = "i2c";
40 #define CLOCK_LOW_TIME 8
41 #define CLOCK_HIGH_TIME 8
42 #define START_CONDITION_HOLD_TIME 8
43 #define STOP_CONDITION_HOLD_TIME 8
44 #define ENABLE_OUTPUT 0x01
45 #define ENABLE_INPUT 0x00
46 #define I2C_CLOCK_HIGH 1
47 #define I2C_CLOCK_LOW 0
48 #define I2C_DATA_HIGH 1
49 #define I2C_DATA_LOW 0
51 #ifdef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
52 /* Use PB and not PB_I2C */
53 #ifndef CONFIG_ETRAX_I2C_DATA_PORT
54 #define CONFIG_ETRAX_I2C_DATA_PORT 0
56 #ifndef CONFIG_ETRAX_I2C_CLK_PORT
57 #define CONFIG_ETRAX_I2C_CLK_PORT 1
60 #define SDABIT CONFIG_ETRAX_I2C_DATA_PORT
61 #define SCLBIT CONFIG_ETRAX_I2C_CLK_PORT
65 /* enable or disable output-enable, to select output or input on the i2c bus */
67 #define i2c_dir_out() \
68 REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 1)
69 #define i2c_dir_in() \
70 REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 0)
72 /* control the i2c clock and data signals */
75 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SCLBIT, x)
77 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SDABIT, x)
79 /* read a bit from the i2c interface */
81 #define i2c_getbit() (((*R_PORT_PB_READ & (1 << SDABIT))) >> SDABIT)
84 /* enable or disable the i2c interface */
86 #define i2c_enable() *R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_en))
87 #define i2c_disable() *R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_en))
89 /* enable or disable output-enable, to select output or input on the i2c bus */
91 #define i2c_dir_out() \
92 *R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
93 REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 1);
94 #define i2c_dir_in() \
95 *R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
96 REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 0);
98 /* control the i2c clock and data signals */
101 *R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
102 ~IO_MASK(R_PORT_PB_I2C, i2c_clk)) | IO_FIELD(R_PORT_PB_I2C, i2c_clk, (x))); \
103 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 1, x);
105 #define i2c_data(x) \
106 *R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
107 ~IO_MASK(R_PORT_PB_I2C, i2c_d)) | IO_FIELD(R_PORT_PB_I2C, i2c_d, (x))); \
108 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 0, x);
110 /* read a bit from the i2c interface */
112 #define i2c_getbit() (*R_PORT_PB_READ & 0x1)
115 /* use the kernels delay routine */
117 #define i2c_delay(usecs) udelay(usecs)
119 static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
121 /****************** FUNCTION DEFINITION SECTION *************************/
124 /* generate i2c start condition */
133 i2c_delay(CLOCK_HIGH_TIME/6);
134 i2c_data(I2C_DATA_HIGH);
135 i2c_clk(I2C_CLOCK_HIGH);
136 i2c_delay(CLOCK_HIGH_TIME);
140 i2c_data(I2C_DATA_LOW);
141 i2c_delay(START_CONDITION_HOLD_TIME);
145 i2c_clk(I2C_CLOCK_LOW);
146 i2c_delay(CLOCK_LOW_TIME);
149 /* generate i2c stop condition */
159 i2c_clk(I2C_CLOCK_LOW);
160 i2c_data(I2C_DATA_LOW);
161 i2c_delay(CLOCK_LOW_TIME*2);
165 i2c_clk(I2C_CLOCK_HIGH);
166 i2c_delay(CLOCK_HIGH_TIME*2);
170 i2c_data(I2C_DATA_HIGH);
171 i2c_delay(STOP_CONDITION_HOLD_TIME);
176 /* write a byte to the i2c interface */
179 i2c_outbyte(unsigned char x)
185 for (i = 0; i < 8; i++) {
187 i2c_data(I2C_DATA_HIGH);
189 i2c_data(I2C_DATA_LOW);
192 i2c_delay(CLOCK_LOW_TIME/2);
193 i2c_clk(I2C_CLOCK_HIGH);
194 i2c_delay(CLOCK_HIGH_TIME);
195 i2c_clk(I2C_CLOCK_LOW);
196 i2c_delay(CLOCK_LOW_TIME/2);
199 i2c_data(I2C_DATA_LOW);
200 i2c_delay(CLOCK_LOW_TIME/2);
208 /* read a byte from the i2c interface */
213 unsigned char aBitByte = 0;
216 /* Switch off I2C to get bit */
219 i2c_delay(CLOCK_HIGH_TIME/2);
222 aBitByte |= i2c_getbit();
226 i2c_delay(CLOCK_LOW_TIME/2);
228 for (i = 1; i < 8; i++) {
231 i2c_clk(I2C_CLOCK_HIGH);
232 i2c_delay(CLOCK_HIGH_TIME);
233 i2c_clk(I2C_CLOCK_LOW);
234 i2c_delay(CLOCK_LOW_TIME);
236 /* Switch off I2C to get bit */
239 i2c_delay(CLOCK_HIGH_TIME/2);
242 aBitByte |= i2c_getbit();
246 i2c_delay(CLOCK_LOW_TIME/2);
248 i2c_clk(I2C_CLOCK_HIGH);
249 i2c_delay(CLOCK_HIGH_TIME);
252 * we leave the clock low, getbyte is usually followed
253 * by sendack/nack, they assume the clock to be low
255 i2c_clk(I2C_CLOCK_LOW);
259 /*#---------------------------------------------------------------------------
261 *# FUNCTION NAME: i2c_getack
263 *# DESCRIPTION : checks if ack was received from ic2
265 *#--------------------------------------------------------------------------*/
276 * Release data bus by setting
279 i2c_data(I2C_DATA_HIGH);
284 i2c_delay(CLOCK_HIGH_TIME/4);
286 * generate ACK clock pulse
288 i2c_clk(I2C_CLOCK_HIGH);
290 * Use PORT PB instead of I2C
291 * for input. (I2C not working)
304 i2c_delay(CLOCK_HIGH_TIME/2);
310 i2c_delay(CLOCK_HIGH_TIME/2);
312 if(!i2c_getbit()) /* receiver pulld SDA low */
314 i2c_delay(CLOCK_HIGH_TIME/2);
318 * our clock is high now, make sure data is low
319 * before we enable our output. If we keep data high
320 * and enable output, we would generate a stop condition.
322 i2c_data(I2C_DATA_LOW);
329 i2c_clk(I2C_CLOCK_LOW);
330 i2c_delay(CLOCK_HIGH_TIME/4);
336 * remove ACK clock pulse
338 i2c_data(I2C_DATA_HIGH);
339 i2c_delay(CLOCK_LOW_TIME/2);
343 /*#---------------------------------------------------------------------------
345 *# FUNCTION NAME: I2C::sendAck
347 *# DESCRIPTION : Send ACK on received data
349 *#--------------------------------------------------------------------------*/
356 i2c_delay(CLOCK_LOW_TIME);
361 i2c_data(I2C_DATA_LOW);
363 * generate clock pulse
365 i2c_delay(CLOCK_HIGH_TIME/6);
366 i2c_clk(I2C_CLOCK_HIGH);
367 i2c_delay(CLOCK_HIGH_TIME);
368 i2c_clk(I2C_CLOCK_LOW);
369 i2c_delay(CLOCK_LOW_TIME/6);
373 i2c_data(I2C_DATA_HIGH);
374 i2c_delay(CLOCK_LOW_TIME);
379 /*#---------------------------------------------------------------------------
381 *# FUNCTION NAME: i2c_sendnack
383 *# DESCRIPTION : Sends NACK on received data
385 *#--------------------------------------------------------------------------*/
392 i2c_delay(CLOCK_LOW_TIME);
397 i2c_data(I2C_DATA_HIGH);
399 * generate clock pulse
401 i2c_delay(CLOCK_HIGH_TIME/6);
402 i2c_clk(I2C_CLOCK_HIGH);
403 i2c_delay(CLOCK_HIGH_TIME);
404 i2c_clk(I2C_CLOCK_LOW);
405 i2c_delay(CLOCK_LOW_TIME);
410 /*#---------------------------------------------------------------------------
412 *# FUNCTION NAME: i2c_writereg
414 *# DESCRIPTION : Writes a value to an I2C device
416 *#--------------------------------------------------------------------------*/
418 i2c_writereg(unsigned char theSlave, unsigned char theReg,
419 unsigned char theValue)
424 spin_lock(&i2c_lock);
429 * we don't like to be interrupted
431 local_irq_save(flags);
437 i2c_outbyte((theSlave & 0xfe));
444 * now select register
449 * now it's time to wait for ack
454 * send register register data
456 i2c_outbyte(theValue);
458 * now it's time to wait for ack
467 * enable interrupt again
469 local_irq_restore(flags);
471 } while(error && cntr--);
473 i2c_delay(CLOCK_LOW_TIME);
475 spin_unlock(&i2c_lock);
480 /*#---------------------------------------------------------------------------
482 *# FUNCTION NAME: i2c_readreg
484 *# DESCRIPTION : Reads a value from the decoder registers.
486 *#--------------------------------------------------------------------------*/
488 i2c_readreg(unsigned char theSlave, unsigned char theReg)
494 spin_lock(&i2c_lock);
499 * we don't like to be interrupted
501 local_irq_save(flags);
503 * generate start condition
510 i2c_outbyte((theSlave & 0xfe));
517 * now select register
522 * now it's time to wait for ack
527 * repeat start condition
529 i2c_delay(CLOCK_LOW_TIME);
534 i2c_outbyte(theSlave | 0x01);
545 * last received byte needs to be nacked
554 * enable interrupt again
556 local_irq_restore(flags);
558 } while(error && cntr--);
560 spin_unlock(&i2c_lock);
566 i2c_open(struct inode *inode, struct file *filp)
572 i2c_release(struct inode *inode, struct file *filp)
577 /* Main device API. ioctl's to write or read to/from i2c registers.
580 static long i2c_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
582 if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
586 switch (_IOC_NR(cmd)) {
588 /* write to an i2c slave */
589 D(printk(KERN_DEBUG "i2cw %d %d %d\n",
594 return i2c_writereg(I2C_ARGSLAVE(arg),
600 /* read from an i2c slave */
601 D(printk(KERN_DEBUG "i2cr %d %d ",
604 val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
605 D(printk(KERN_DEBUG "= %d\n", val));
615 static const struct file_operations i2c_fops = {
616 .owner = THIS_MODULE,
617 .unlocked_ioctl = i2c_ioctl,
619 .release = i2c_release,
620 .llseek = noop_llseek,
627 static int first = 1;
634 /* Setup and enable the Port B I2C interface */
636 #ifndef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
637 if ((res = cris_request_io_interface(if_i2c, "I2C"))) {
638 printk(KERN_CRIT "i2c_init: Failed to get IO interface\n");
642 *R_PORT_PB_I2C = port_pb_i2c_shadow |=
643 IO_STATE(R_PORT_PB_I2C, i2c_en, on) |
644 IO_FIELD(R_PORT_PB_I2C, i2c_d, 1) |
645 IO_FIELD(R_PORT_PB_I2C, i2c_clk, 1) |
646 IO_STATE(R_PORT_PB_I2C, i2c_oe_, enable);
648 port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir0);
649 port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir1);
651 *R_PORT_PB_DIR = (port_pb_dir_shadow |=
652 IO_STATE(R_PORT_PB_DIR, dir0, input) |
653 IO_STATE(R_PORT_PB_DIR, dir1, output));
655 if ((res = cris_io_interface_allocate_pins(if_i2c,
657 CONFIG_ETRAX_I2C_DATA_PORT,
658 CONFIG_ETRAX_I2C_DATA_PORT))) {
659 printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C data port\n");
661 } else if ((res = cris_io_interface_allocate_pins(if_i2c,
663 CONFIG_ETRAX_I2C_CLK_PORT,
664 CONFIG_ETRAX_I2C_CLK_PORT))) {
665 cris_io_interface_free_pins(if_i2c,
667 CONFIG_ETRAX_I2C_DATA_PORT,
668 CONFIG_ETRAX_I2C_DATA_PORT);
669 printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C clk port\n");
684 res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
686 printk(KERN_ERR "i2c: couldn't get a major number.\n");
690 printk(KERN_INFO "I2C driver v2.2, (c) 1999-2004 Axis Communications AB\n");
695 /* this makes sure that i2c_register is called during boot */
697 module_init(i2c_register);
699 /****************** END OF FILE i2c.c ********************************/