2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/usb/musb.h>
20 #include <asm/bfin6xx_spi.h>
25 #include <asm/portmux.h>
26 #include <asm/bfin_sdh.h>
27 #include <linux/input.h>
28 #include <linux/spi/ad7877.h>
31 * Name the Board for the /proc/cpuinfo
33 const char bfin_board_name[] = "ADI BF609-EZKIT";
36 * Driver needs to know address, irq and flag pin.
39 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
40 #include <linux/usb/isp1760.h>
41 static struct resource bfin_isp1760_resources[] = {
44 .end = 0x2C0C0000 + 0xfffff,
45 .flags = IORESOURCE_MEM,
50 .flags = IORESOURCE_IRQ,
54 static struct isp1760_platform_data isp1760_priv = {
59 .dack_polarity_high = 0,
60 .dreq_polarity_high = 0,
63 static struct platform_device bfin_isp1760_device = {
67 .platform_data = &isp1760_priv,
69 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
70 .resource = bfin_isp1760_resources,
74 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
75 #include <asm/bfin_rotary.h>
77 static struct bfin_rotary_platform_data bfin_rotary_data = {
78 /*.rotary_up_key = KEY_UP,*/
79 /*.rotary_down_key = KEY_DOWN,*/
80 .rotary_rel_code = REL_WHEEL,
81 .rotary_button_key = KEY_ENTER,
82 .debounce = 10, /* 0..17 */
83 .mode = ROT_QUAD_ENC | ROT_DEBE,
86 static struct resource bfin_rotary_resources[] = {
90 .flags = IORESOURCE_IRQ,
94 static struct platform_device bfin_rotary_device = {
95 .name = "bfin-rotary",
97 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
98 .resource = bfin_rotary_resources,
100 .platform_data = &bfin_rotary_data,
105 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
106 #include <linux/stmmac.h>
108 static unsigned short pins[] = P_RMII0;
110 static struct stmmac_mdio_bus_data phy_private_data = {
115 static struct plat_stmmacenet_data eth_private_data = {
119 .mdio_bus_data = &phy_private_data,
122 static struct platform_device bfin_eth_device = {
126 .resource = (struct resource[]) {
128 .start = EMAC0_MACCFG,
129 .end = EMAC0_MACCFG + 0x1274,
130 .flags = IORESOURCE_MEM,
134 .start = IRQ_EMAC0_STAT,
135 .end = IRQ_EMAC0_STAT,
136 .flags = IORESOURCE_IRQ,
140 .power.can_wakeup = 1,
141 .platform_data = ð_private_data,
146 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
147 #include <linux/input/adxl34x.h>
148 static const struct adxl34x_platform_data adxl34x_info = {
152 .tap_threshold = 0x31,
153 .tap_duration = 0x10,
156 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
157 .act_axis_control = 0xFF,
158 .activity_threshold = 5,
159 .inactivity_threshold = 3,
160 .inactivity_time = 4,
161 .free_fall_threshold = 0x7,
162 .free_fall_time = 0x20,
164 .data_range = ADXL_FULL_RES,
167 .ev_code_x = ABS_X, /* EV_REL */
168 .ev_code_y = ABS_Y, /* EV_REL */
169 .ev_code_z = ABS_Z, /* EV_REL */
171 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
173 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
174 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
175 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
176 .fifo_mode = ADXL_FIFO_STREAM,
177 .orientation_enable = ADXL_EN_ORIENTATION_3D,
178 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
179 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
180 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
181 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
185 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
186 static struct platform_device rtc_device = {
192 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
193 #ifdef CONFIG_SERIAL_BFIN_UART0
194 static struct resource bfin_uart0_resources[] = {
196 .start = UART0_REVID,
197 .end = UART0_RXDIV+4,
198 .flags = IORESOURCE_MEM,
201 .start = IRQ_UART0_TX,
203 .flags = IORESOURCE_IRQ,
206 .start = IRQ_UART0_RX,
208 .flags = IORESOURCE_IRQ,
211 .start = IRQ_UART0_STAT,
212 .end = IRQ_UART0_STAT,
213 .flags = IORESOURCE_IRQ,
216 .start = CH_UART0_TX,
218 .flags = IORESOURCE_DMA,
221 .start = CH_UART0_RX,
223 .flags = IORESOURCE_DMA,
225 #ifdef CONFIG_BFIN_UART0_CTSRTS
226 { /* CTS pin -- 0 means not supported */
229 .flags = IORESOURCE_IO,
231 { /* RTS pin -- 0 means not supported */
234 .flags = IORESOURCE_IO,
239 static unsigned short bfin_uart0_peripherals[] = {
240 P_UART0_TX, P_UART0_RX,
241 #ifdef CONFIG_BFIN_UART0_CTSRTS
242 P_UART0_RTS, P_UART0_CTS,
247 static struct platform_device bfin_uart0_device = {
250 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
251 .resource = bfin_uart0_resources,
253 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
257 #ifdef CONFIG_SERIAL_BFIN_UART1
258 static struct resource bfin_uart1_resources[] = {
260 .start = UART1_REVID,
261 .end = UART1_RXDIV+4,
262 .flags = IORESOURCE_MEM,
265 .start = IRQ_UART1_TX,
267 .flags = IORESOURCE_IRQ,
270 .start = IRQ_UART1_RX,
272 .flags = IORESOURCE_IRQ,
275 .start = IRQ_UART1_STAT,
276 .end = IRQ_UART1_STAT,
277 .flags = IORESOURCE_IRQ,
280 .start = CH_UART1_TX,
282 .flags = IORESOURCE_DMA,
285 .start = CH_UART1_RX,
287 .flags = IORESOURCE_DMA,
289 #ifdef CONFIG_BFIN_UART1_CTSRTS
290 { /* CTS pin -- 0 means not supported */
293 .flags = IORESOURCE_IO,
295 { /* RTS pin -- 0 means not supported */
298 .flags = IORESOURCE_IO,
303 static unsigned short bfin_uart1_peripherals[] = {
304 P_UART1_TX, P_UART1_RX,
305 #ifdef CONFIG_BFIN_UART1_CTSRTS
306 P_UART1_RTS, P_UART1_CTS,
311 static struct platform_device bfin_uart1_device = {
314 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
315 .resource = bfin_uart1_resources,
317 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
323 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
324 #ifdef CONFIG_BFIN_SIR0
325 static struct resource bfin_sir0_resources[] = {
329 .flags = IORESOURCE_MEM,
332 .start = IRQ_UART0_TX,
333 .end = IRQ_UART0_TX+1,
334 .flags = IORESOURCE_IRQ,
337 .start = CH_UART0_TX,
338 .end = CH_UART0_TX+1,
339 .flags = IORESOURCE_DMA,
342 static struct platform_device bfin_sir0_device = {
345 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
346 .resource = bfin_sir0_resources,
349 #ifdef CONFIG_BFIN_SIR1
350 static struct resource bfin_sir1_resources[] = {
354 .flags = IORESOURCE_MEM,
357 .start = IRQ_UART1_TX,
358 .end = IRQ_UART1_TX+1,
359 .flags = IORESOURCE_IRQ,
362 .start = CH_UART1_TX,
363 .end = CH_UART1_TX+1,
364 .flags = IORESOURCE_DMA,
367 static struct platform_device bfin_sir1_device = {
370 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
371 .resource = bfin_sir1_resources,
376 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
377 static struct resource musb_resources[] = {
381 .flags = IORESOURCE_MEM,
383 [1] = { /* general IRQ */
384 .start = IRQ_USB_STAT,
386 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
389 [2] = { /* DMA IRQ */
390 .start = IRQ_USB_DMA,
392 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
397 static struct musb_hdrc_config musb_config = {
403 .clkin = 48, /* musb CLKIN in MHZ */
406 static struct musb_hdrc_platform_data musb_plat = {
407 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
409 #elif defined(CONFIG_USB_MUSB_HDRC)
411 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
412 .mode = MUSB_PERIPHERAL,
414 .config = &musb_config,
417 static u64 musb_dmamask = ~(u32)0;
419 static struct platform_device musb_device = {
420 .name = "musb-blackfin",
423 .dma_mask = &musb_dmamask,
424 .coherent_dma_mask = 0xffffffff,
425 .platform_data = &musb_plat,
427 .num_resources = ARRAY_SIZE(musb_resources),
428 .resource = musb_resources,
432 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
433 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
434 static struct resource bfin_sport0_uart_resources[] = {
436 .start = SPORT0_TCR1,
437 .end = SPORT0_MRCS3+4,
438 .flags = IORESOURCE_MEM,
441 .start = IRQ_SPORT0_RX,
442 .end = IRQ_SPORT0_RX+1,
443 .flags = IORESOURCE_IRQ,
446 .start = IRQ_SPORT0_ERROR,
447 .end = IRQ_SPORT0_ERROR,
448 .flags = IORESOURCE_IRQ,
452 static unsigned short bfin_sport0_peripherals[] = {
453 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
454 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
457 static struct platform_device bfin_sport0_uart_device = {
458 .name = "bfin-sport-uart",
460 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
461 .resource = bfin_sport0_uart_resources,
463 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
467 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
468 static struct resource bfin_sport1_uart_resources[] = {
470 .start = SPORT1_TCR1,
471 .end = SPORT1_MRCS3+4,
472 .flags = IORESOURCE_MEM,
475 .start = IRQ_SPORT1_RX,
476 .end = IRQ_SPORT1_RX+1,
477 .flags = IORESOURCE_IRQ,
480 .start = IRQ_SPORT1_ERROR,
481 .end = IRQ_SPORT1_ERROR,
482 .flags = IORESOURCE_IRQ,
486 static unsigned short bfin_sport1_peripherals[] = {
487 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
488 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
491 static struct platform_device bfin_sport1_uart_device = {
492 .name = "bfin-sport-uart",
494 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
495 .resource = bfin_sport1_uart_resources,
497 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
501 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
502 static struct resource bfin_sport2_uart_resources[] = {
504 .start = SPORT2_TCR1,
505 .end = SPORT2_MRCS3+4,
506 .flags = IORESOURCE_MEM,
509 .start = IRQ_SPORT2_RX,
510 .end = IRQ_SPORT2_RX+1,
511 .flags = IORESOURCE_IRQ,
514 .start = IRQ_SPORT2_ERROR,
515 .end = IRQ_SPORT2_ERROR,
516 .flags = IORESOURCE_IRQ,
520 static unsigned short bfin_sport2_peripherals[] = {
521 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
522 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
525 static struct platform_device bfin_sport2_uart_device = {
526 .name = "bfin-sport-uart",
528 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
529 .resource = bfin_sport2_uart_resources,
531 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
537 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
539 static unsigned short bfin_can0_peripherals[] = {
540 P_CAN0_RX, P_CAN0_TX, 0
543 static struct resource bfin_can0_resources[] = {
547 .flags = IORESOURCE_MEM,
550 .start = IRQ_CAN0_RX,
552 .flags = IORESOURCE_IRQ,
555 .start = IRQ_CAN0_TX,
557 .flags = IORESOURCE_IRQ,
560 .start = IRQ_CAN0_STAT,
561 .end = IRQ_CAN0_STAT,
562 .flags = IORESOURCE_IRQ,
566 static struct platform_device bfin_can0_device = {
569 .num_resources = ARRAY_SIZE(bfin_can0_resources),
570 .resource = bfin_can0_resources,
572 .platform_data = &bfin_can0_peripherals, /* Passed to driver */
578 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
579 static struct mtd_partition partition_info[] = {
581 .name = "bootloader(nand)",
585 .name = "linux kernel(nand)",
586 .offset = MTDPART_OFS_APPEND,
587 .size = 4 * 1024 * 1024,
590 .name = "file system(nand)",
591 .offset = MTDPART_OFS_APPEND,
592 .size = MTDPART_SIZ_FULL,
596 static struct bf5xx_nand_platform bfin_nand_platform = {
597 .data_width = NFC_NWIDTH_8,
598 .partitions = partition_info,
599 .nr_partitions = ARRAY_SIZE(partition_info),
604 static struct resource bfin_nand_resources[] = {
608 .flags = IORESOURCE_MEM,
613 .flags = IORESOURCE_IRQ,
617 static struct platform_device bfin_nand_device = {
620 .num_resources = ARRAY_SIZE(bfin_nand_resources),
621 .resource = bfin_nand_resources,
623 .platform_data = &bfin_nand_platform,
628 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
630 static struct bfin_sd_host bfin_sdh_data = {
632 .irq_int0 = IRQ_RSI_INT0,
633 .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
636 static struct platform_device bfin_sdh_device = {
640 .platform_data = &bfin_sdh_data,
645 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
646 static struct mtd_partition ezkit_partitions[] = {
648 .name = "bootloader(nor)",
652 .name = "linux kernel(nor)",
654 .offset = MTDPART_OFS_APPEND,
656 .name = "file system(nor)",
657 .size = 0x1000000 - 0x80000 - 0x400000,
658 .offset = MTDPART_OFS_APPEND,
662 int bf609_nor_flash_init(struct platform_device *dev)
664 #define CONFIG_SMC_GCTL_VAL 0x00000010
665 const unsigned short pins[] = {
666 P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
667 P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
668 P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
671 peripheral_request_list(pins, "smc0");
673 bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);
674 bfin_write32(SMC_B0CTL, 0x01002011);
675 bfin_write32(SMC_B0TIM, 0x08170977);
676 bfin_write32(SMC_B0ETIM, 0x00092231);
680 static struct physmap_flash_data ezkit_flash_data = {
682 .parts = ezkit_partitions,
683 .init = bf609_nor_flash_init,
684 .nr_parts = ARRAY_SIZE(ezkit_partitions),
685 #ifdef CONFIG_ROMKERNEL
686 .probe_type = "map_rom",
690 static struct resource ezkit_flash_resource = {
693 .flags = IORESOURCE_MEM,
696 static struct platform_device ezkit_flash_device = {
697 .name = "physmap-flash",
700 .platform_data = &ezkit_flash_data,
703 .resource = &ezkit_flash_resource,
707 #if defined(CONFIG_MTD_M25P80) \
708 || defined(CONFIG_MTD_M25P80_MODULE)
709 /* SPI flash chip (w25q32) */
710 static struct mtd_partition bfin_spi_flash_partitions[] = {
712 .name = "bootloader(spi)",
715 .mask_flags = MTD_CAP_ROM
717 .name = "linux kernel(spi)",
719 .offset = MTDPART_OFS_APPEND,
721 .name = "file system(spi)",
722 .size = MTDPART_SIZ_FULL,
723 .offset = MTDPART_OFS_APPEND,
727 static struct flash_platform_data bfin_spi_flash_data = {
729 .parts = bfin_spi_flash_partitions,
730 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
734 static struct bfin6xx_spi_chip spi_flash_chip_info = {
735 .enable_dma = true, /* use dma transfer with this chip*/
739 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
740 static struct bfin6xx_spi_chip spidev_chip_info = {
745 #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
746 static struct platform_device bfin_i2s_pcm = {
747 .name = "bfin-i2s-pcm-audio",
752 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
753 defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
754 #include <asm/bfin_sport3.h>
755 static struct resource bfin_snd_resources[] = {
757 .start = SPORT0_CTL_A,
759 .flags = IORESOURCE_MEM,
762 .start = SPORT0_CTL_B,
764 .flags = IORESOURCE_MEM,
767 .start = CH_SPORT0_TX,
769 .flags = IORESOURCE_DMA,
772 .start = CH_SPORT0_RX,
774 .flags = IORESOURCE_DMA,
777 .start = IRQ_SPORT0_TX_STAT,
778 .end = IRQ_SPORT0_TX_STAT,
779 .flags = IORESOURCE_IRQ,
782 .start = IRQ_SPORT0_RX_STAT,
783 .end = IRQ_SPORT0_RX_STAT,
784 .flags = IORESOURCE_IRQ,
788 static const unsigned short bfin_snd_pin[] = {
789 P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,
790 P_SPORT0_BFS, P_SPORT0_BD0, 0,
793 static struct bfin_snd_platform_data bfin_snd_data = {
794 .pin_req = bfin_snd_pin,
797 static struct platform_device bfin_i2s = {
799 .num_resources = ARRAY_SIZE(bfin_snd_resources),
800 .resource = bfin_snd_resources,
802 .platform_data = &bfin_snd_data,
807 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
808 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
809 static struct platform_device adau1761_device = {
810 .name = "bfin-eval-adau1x61",
814 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
815 #include <sound/adau17x1.h>
816 static struct adau1761_platform_data adau1761_info = {
817 .lineout_mode = ADAU1761_OUTPUT_MODE_LINE,
818 .headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
822 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
823 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
824 #include <linux/videodev2.h>
825 #include <media/blackfin/bfin_capture.h>
826 #include <media/blackfin/ppi.h>
828 static const unsigned short ppi_req[] = {
829 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
830 P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
831 P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
832 P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
833 P_PPI0_D16, P_PPI0_D17, P_PPI0_D18, P_PPI0_D19,
834 P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23,
835 P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
839 static const struct ppi_info ppi_info = {
840 .type = PPI_TYPE_EPPI3,
841 .dma_ch = CH_EPPI0_CH0,
842 .irq_err = IRQ_EPPI0_STAT,
843 .base = (void __iomem *)EPPI0_STAT,
847 #if defined(CONFIG_VIDEO_VS6624) \
848 || defined(CONFIG_VIDEO_VS6624_MODULE)
849 static struct v4l2_input vs6624_inputs[] = {
853 .type = V4L2_INPUT_TYPE_CAMERA,
854 .std = V4L2_STD_UNKNOWN,
858 static struct bcap_route vs6624_routes[] = {
865 static const unsigned vs6624_ce_pin = GPIO_PD1;
867 static struct bfin_capture_config bfin_capture_data = {
868 .card_name = "BF609",
869 .inputs = vs6624_inputs,
870 .num_inputs = ARRAY_SIZE(vs6624_inputs),
871 .routes = vs6624_routes,
876 .platform_data = (void *)&vs6624_ce_pin,
878 .ppi_info = &ppi_info,
879 .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI
880 | EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
885 #if defined(CONFIG_VIDEO_ADV7842) \
886 || defined(CONFIG_VIDEO_ADV7842_MODULE)
887 #include <media/adv7842.h>
889 static struct v4l2_input adv7842_inputs[] = {
893 .type = V4L2_INPUT_TYPE_CAMERA,
899 .type = V4L2_INPUT_TYPE_CAMERA,
905 .type = V4L2_INPUT_TYPE_CAMERA,
911 .type = V4L2_INPUT_TYPE_CAMERA,
917 .type = V4L2_INPUT_TYPE_CAMERA,
922 static struct bcap_route adv7842_routes[] = {
945 static struct adv7842_output_format adv7842_opf[] = {
947 .op_ch_sel = ADV7842_OP_CH_SEL_BRG,
948 .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_8,
951 .insert_av_codes = 1,
955 static struct adv7842_platform_data adv7842_data = {
957 .num_opf = ARRAY_SIZE(adv7842_opf),
958 .ain_sel = ADV7842_AIN10_11_12_NC_SYNC_4_1,
959 .prim_mode = ADV7842_PRIM_MODE_SDP,
960 .vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1,
961 .inp_color_space = ADV7842_INP_COLOR_SPACE_AUTO,
968 .i2c_repeater = 0x36,
970 .i2c_infoframe = 0x38,
976 static struct bfin_capture_config bfin_capture_data = {
977 .card_name = "BF609",
978 .inputs = adv7842_inputs,
979 .num_inputs = ARRAY_SIZE(adv7842_inputs),
980 .routes = adv7842_routes,
985 .platform_data = (void *)&adv7842_data,
987 .ppi_info = &ppi_info,
988 .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FLDSEL
989 | EPPI_CTL_ACTIVE656),
993 static struct platform_device bfin_capture_device = {
994 .name = "bfin_capture",
996 .platform_data = &bfin_capture_data,
1001 #if defined(CONFIG_BFIN_CRC)
1002 #define BFIN_CRC_NAME "bfin-crc"
1004 static struct resource bfin_crc0_resources[] = {
1006 .start = REG_CRC0_CTL,
1007 .end = REG_CRC0_REVID+4,
1008 .flags = IORESOURCE_MEM,
1011 .start = IRQ_CRC0_DCNTEXP,
1012 .end = IRQ_CRC0_DCNTEXP,
1013 .flags = IORESOURCE_IRQ,
1016 .start = CH_MEM_STREAM0_SRC_CRC0,
1017 .end = CH_MEM_STREAM0_SRC_CRC0,
1018 .flags = IORESOURCE_DMA,
1021 .start = CH_MEM_STREAM0_DEST_CRC0,
1022 .end = CH_MEM_STREAM0_DEST_CRC0,
1023 .flags = IORESOURCE_DMA,
1027 static struct platform_device bfin_crc0_device = {
1028 .name = BFIN_CRC_NAME,
1030 .num_resources = ARRAY_SIZE(bfin_crc0_resources),
1031 .resource = bfin_crc0_resources,
1034 static struct resource bfin_crc1_resources[] = {
1036 .start = REG_CRC1_CTL,
1037 .end = REG_CRC1_REVID+4,
1038 .flags = IORESOURCE_MEM,
1041 .start = IRQ_CRC1_DCNTEXP,
1042 .end = IRQ_CRC1_DCNTEXP,
1043 .flags = IORESOURCE_IRQ,
1046 .start = CH_MEM_STREAM1_SRC_CRC1,
1047 .end = CH_MEM_STREAM1_SRC_CRC1,
1048 .flags = IORESOURCE_DMA,
1051 .start = CH_MEM_STREAM1_DEST_CRC1,
1052 .end = CH_MEM_STREAM1_DEST_CRC1,
1053 .flags = IORESOURCE_DMA,
1057 static struct platform_device bfin_crc1_device = {
1058 .name = BFIN_CRC_NAME,
1060 .num_resources = ARRAY_SIZE(bfin_crc1_resources),
1061 .resource = bfin_crc1_resources,
1065 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
1066 #define BFIN_CRYPTO_CRC_NAME "bfin-hmac-crc"
1067 #define BFIN_CRYPTO_CRC_POLY_DATA 0x5c5c5c5c
1069 static struct resource bfin_crypto_crc_resources[] = {
1071 .start = REG_CRC0_CTL,
1072 .end = REG_CRC0_REVID+4,
1073 .flags = IORESOURCE_MEM,
1076 .start = IRQ_CRC0_DCNTEXP,
1077 .end = IRQ_CRC0_DCNTEXP,
1078 .flags = IORESOURCE_IRQ,
1081 .start = CH_MEM_STREAM0_SRC_CRC0,
1082 .end = CH_MEM_STREAM0_SRC_CRC0,
1083 .flags = IORESOURCE_DMA,
1087 static struct platform_device bfin_crypto_crc_device = {
1088 .name = BFIN_CRYPTO_CRC_NAME,
1090 .num_resources = ARRAY_SIZE(bfin_crypto_crc_resources),
1091 .resource = bfin_crypto_crc_resources,
1093 .platform_data = (void *)BFIN_CRYPTO_CRC_POLY_DATA,
1098 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1099 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
1101 .vref_delay_usecs = 50, /* internal, no capacitor */
1102 .x_plate_ohms = 419,
1103 .y_plate_ohms = 486,
1104 .pressure_max = 1000,
1106 .stopacq_polarity = 1,
1107 .first_conversion_delay = 3,
1108 .acquisition_time = 1,
1110 .pen_down_acc_interval = 1,
1114 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1115 #include <linux/input.h>
1116 #include <linux/gpio_keys.h>
1118 static struct gpio_keys_button bfin_gpio_keys_table[] = {
1119 {BTN_0, GPIO_PB10, 1, "gpio-keys: BTN0"},
1120 {BTN_1, GPIO_PE1, 1, "gpio-keys: BTN1"},
1123 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1124 .buttons = bfin_gpio_keys_table,
1125 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1128 static struct platform_device bfin_device_gpiokeys = {
1129 .name = "gpio-keys",
1131 .platform_data = &bfin_gpio_keys_data,
1136 static struct spi_board_info bfin_spi_board_info[] __initdata = {
1137 #if defined(CONFIG_MTD_M25P80) \
1138 || defined(CONFIG_MTD_M25P80_MODULE)
1140 /* the modalias must be the same as spi device driver name */
1141 .modalias = "m25p80", /* Name of spi_driver for this device */
1142 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
1143 .bus_num = 0, /* Framework bus number */
1144 .chip_select = 1, /* SPI_SSEL1*/
1145 .platform_data = &bfin_spi_flash_data,
1146 .controller_data = &spi_flash_chip_info,
1150 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1152 .modalias = "ad7877",
1153 .platform_data = &bfin_ad7877_ts_info,
1155 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1160 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1162 .modalias = "spidev",
1163 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1166 .controller_data = &spidev_chip_info,
1169 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1171 .modalias = "adxl34x",
1172 .platform_data = &adxl34x_info,
1174 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1181 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1183 static struct resource bfin_spi0_resource[] = {
1185 .start = SPI0_REGBASE,
1186 .end = SPI0_REGBASE + 0xFF,
1187 .flags = IORESOURCE_MEM,
1190 .start = CH_SPI0_TX,
1192 .flags = IORESOURCE_DMA,
1195 .start = CH_SPI0_RX,
1197 .flags = IORESOURCE_DMA,
1202 static struct resource bfin_spi1_resource[] = {
1204 .start = SPI1_REGBASE,
1205 .end = SPI1_REGBASE + 0xFF,
1206 .flags = IORESOURCE_MEM,
1209 .start = CH_SPI1_TX,
1211 .flags = IORESOURCE_DMA,
1214 .start = CH_SPI1_RX,
1216 .flags = IORESOURCE_DMA,
1221 /* SPI controller data */
1222 static struct bfin6xx_spi_master bf60x_spi_master_info0 = {
1223 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1224 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1227 static struct platform_device bf60x_spi_master0 = {
1229 .id = 0, /* Bus number */
1230 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1231 .resource = bfin_spi0_resource,
1233 .platform_data = &bf60x_spi_master_info0, /* Passed to driver */
1237 static struct bfin6xx_spi_master bf60x_spi_master_info1 = {
1238 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1239 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1242 static struct platform_device bf60x_spi_master1 = {
1244 .id = 1, /* Bus number */
1245 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1246 .resource = bfin_spi1_resource,
1248 .platform_data = &bf60x_spi_master_info1, /* Passed to driver */
1251 #endif /* spi master and devices */
1253 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1254 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1256 static struct resource bfin_twi0_resource[] = {
1258 .start = TWI0_CLKDIV,
1259 .end = TWI0_CLKDIV + 0xFF,
1260 .flags = IORESOURCE_MEM,
1265 .flags = IORESOURCE_IRQ,
1269 static struct platform_device i2c_bfin_twi0_device = {
1270 .name = "i2c-bfin-twi",
1272 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1273 .resource = bfin_twi0_resource,
1275 .platform_data = &bfin_twi0_pins,
1279 static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
1281 static struct resource bfin_twi1_resource[] = {
1283 .start = TWI1_CLKDIV,
1284 .end = TWI1_CLKDIV + 0xFF,
1285 .flags = IORESOURCE_MEM,
1290 .flags = IORESOURCE_IRQ,
1294 static struct platform_device i2c_bfin_twi1_device = {
1295 .name = "i2c-bfin-twi",
1297 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1298 .resource = bfin_twi1_resource,
1300 .platform_data = &bfin_twi1_pins,
1305 static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1306 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1308 I2C_BOARD_INFO("adxl34x", 0x53),
1310 .platform_data = (void *)&adxl34x_info,
1313 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1315 I2C_BOARD_INFO("adau1761", 0x38),
1316 .platform_data = (void *)&adau1761_info
1319 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1321 I2C_BOARD_INFO("ssm2602", 0x1b),
1326 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
1329 static const unsigned int cclk_vlev_datasheet[] =
1332 * Internal VLEV BF54XSBBC1533
1333 ****temporarily using these values until data sheet is updated
1335 VRPAIR(VLEV_085, 150000000),
1336 VRPAIR(VLEV_090, 250000000),
1337 VRPAIR(VLEV_110, 276000000),
1338 VRPAIR(VLEV_115, 301000000),
1339 VRPAIR(VLEV_120, 525000000),
1340 VRPAIR(VLEV_125, 550000000),
1341 VRPAIR(VLEV_130, 600000000),
1344 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1345 .tuple_tab = cclk_vlev_datasheet,
1346 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1347 .vr_settling_time = 25 /* us */,
1350 static struct platform_device bfin_dpmc = {
1351 .name = "bfin dpmc",
1353 .platform_data = &bfin_dmpc_vreg_data,
1357 static struct platform_device *ezkit_devices[] __initdata = {
1361 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1365 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1366 #ifdef CONFIG_SERIAL_BFIN_UART0
1369 #ifdef CONFIG_SERIAL_BFIN_UART1
1374 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1375 #ifdef CONFIG_BFIN_SIR0
1378 #ifdef CONFIG_BFIN_SIR1
1383 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1387 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1391 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1392 &bfin_isp1760_device,
1395 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1396 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1397 &bfin_sport0_uart_device,
1399 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1400 &bfin_sport1_uart_device,
1402 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1403 &bfin_sport2_uart_device,
1407 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1411 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1415 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1419 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1424 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1425 &bfin_rotary_device,
1428 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1429 &i2c_bfin_twi0_device,
1430 #if !defined(CONFIG_BF542)
1431 &i2c_bfin_twi1_device,
1435 #if defined(CONFIG_BFIN_CRC)
1439 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
1440 &bfin_crypto_crc_device,
1443 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1444 &bfin_device_gpiokeys,
1447 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1448 &ezkit_flash_device,
1450 #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
1453 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
1454 defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
1457 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
1458 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
1461 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1462 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1463 &bfin_capture_device,
1467 static int __init ezkit_init(void)
1469 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1471 i2c_register_board_info(0, bfin_i2c_board_info0,
1472 ARRAY_SIZE(bfin_i2c_board_info0));
1473 i2c_register_board_info(1, bfin_i2c_board_info1,
1474 ARRAY_SIZE(bfin_i2c_board_info1));
1476 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1477 if (!peripheral_request_list(pins, "emac0"))
1478 printk(KERN_ERR "%s(): request emac pins failed\n", __func__);
1481 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
1483 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1488 arch_initcall(ezkit_init);
1490 static struct platform_device *ezkit_early_devices[] __initdata = {
1491 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1492 #ifdef CONFIG_SERIAL_BFIN_UART0
1495 #ifdef CONFIG_SERIAL_BFIN_UART1
1500 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1501 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1502 &bfin_sport0_uart_device,
1504 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1505 &bfin_sport1_uart_device,
1507 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1508 &bfin_sport2_uart_device,
1513 void __init native_machine_early_platform_add_devices(void)
1515 printk(KERN_INFO "register early platform devices\n");
1516 early_platform_add_devices(ezkit_early_devices,
1517 ARRAY_SIZE(ezkit_early_devices));