1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 - ARM Ltd
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
7 #include <linux/arm-smccc.h>
8 #include <linux/preempt.h>
9 #include <linux/kvm_host.h>
10 #include <linux/uaccess.h>
11 #include <linux/wait.h>
13 #include <asm/cputype.h>
14 #include <asm/kvm_emulate.h>
16 #include <kvm/arm_psci.h>
17 #include <kvm/arm_hypercalls.h>
20 * This is an implementation of the Power State Coordination Interface
21 * as described in ARM document number ARM DEN 0022A.
24 #define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
26 static unsigned long psci_affinity_mask(unsigned long affinity_level)
28 if (affinity_level <= 3)
29 return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
34 static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
37 * NOTE: For simplicity, we make VCPU suspend emulation to be
38 * same-as WFI (Wait-for-interrupt) emulation.
40 * This means for KVM the wakeup events are interrupts and
41 * this is consistent with intended use of StateID as described
42 * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
44 * Further, we also treat power-down request to be same as
45 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
46 * specification (ARM DEN 0022A). This means all suspend states
47 * for KVM will preserve the register state.
51 return PSCI_RET_SUCCESS;
54 static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
56 vcpu->arch.power_off = true;
57 kvm_make_request(KVM_REQ_SLEEP, vcpu);
61 static inline bool kvm_psci_valid_affinity(struct kvm_vcpu *vcpu,
62 unsigned long affinity)
64 return !(affinity & ~MPIDR_HWID_BITMASK);
67 static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
69 struct vcpu_reset_state *reset_state;
70 struct kvm *kvm = source_vcpu->kvm;
71 struct kvm_vcpu *vcpu = NULL;
74 cpu_id = smccc_get_arg1(source_vcpu);
75 if (!kvm_psci_valid_affinity(source_vcpu, cpu_id))
76 return PSCI_RET_INVALID_PARAMS;
78 vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
81 * Make sure the caller requested a valid CPU and that the CPU is
85 return PSCI_RET_INVALID_PARAMS;
86 if (!vcpu->arch.power_off) {
87 if (kvm_psci_version(source_vcpu, kvm) != KVM_ARM_PSCI_0_1)
88 return PSCI_RET_ALREADY_ON;
90 return PSCI_RET_INVALID_PARAMS;
93 reset_state = &vcpu->arch.reset_state;
95 reset_state->pc = smccc_get_arg2(source_vcpu);
97 /* Propagate caller endianness */
98 reset_state->be = kvm_vcpu_is_be(source_vcpu);
101 * NOTE: We always update r0 (or x0) because for PSCI v0.1
102 * the general purpose registers are undefined upon CPU_ON.
104 reset_state->r0 = smccc_get_arg3(source_vcpu);
106 WRITE_ONCE(reset_state->reset, true);
107 kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);
110 * Make sure the reset request is observed if the change to
111 * power_off is observed.
115 vcpu->arch.power_off = false;
116 kvm_vcpu_wake_up(vcpu);
118 return PSCI_RET_SUCCESS;
121 static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
123 int matching_cpus = 0;
124 unsigned long i, mpidr;
125 unsigned long target_affinity;
126 unsigned long target_affinity_mask;
127 unsigned long lowest_affinity_level;
128 struct kvm *kvm = vcpu->kvm;
129 struct kvm_vcpu *tmp;
131 target_affinity = smccc_get_arg1(vcpu);
132 lowest_affinity_level = smccc_get_arg2(vcpu);
134 if (!kvm_psci_valid_affinity(vcpu, target_affinity))
135 return PSCI_RET_INVALID_PARAMS;
137 /* Determine target affinity mask */
138 target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
139 if (!target_affinity_mask)
140 return PSCI_RET_INVALID_PARAMS;
142 /* Ignore other bits of target affinity */
143 target_affinity &= target_affinity_mask;
146 * If one or more VCPU matching target affinity are running
149 kvm_for_each_vcpu(i, tmp, kvm) {
150 mpidr = kvm_vcpu_get_mpidr_aff(tmp);
151 if ((mpidr & target_affinity_mask) == target_affinity) {
153 if (!tmp->arch.power_off)
154 return PSCI_0_2_AFFINITY_LEVEL_ON;
159 return PSCI_RET_INVALID_PARAMS;
161 return PSCI_0_2_AFFINITY_LEVEL_OFF;
164 static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
167 struct kvm_vcpu *tmp;
170 * The KVM ABI specifies that a system event exit may call KVM_RUN
171 * again and may perform shutdown/reboot at a later time that when the
172 * actual request is made. Since we are implementing PSCI and a
173 * caller of PSCI reboot and shutdown expects that the system shuts
174 * down or reboots immediately, let's make sure that VCPUs are not run
175 * after this call is handled and before the VCPUs have been
178 kvm_for_each_vcpu(i, tmp, vcpu->kvm)
179 tmp->arch.power_off = true;
180 kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
182 memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
183 vcpu->run->system_event.type = type;
184 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
187 static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
189 kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
192 static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
194 kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
197 static void kvm_psci_narrow_to_32bit(struct kvm_vcpu *vcpu)
202 * Zero the input registers' upper 32 bits. They will be fully
203 * zeroed on exit, so we're fine changing them in place.
205 for (i = 1; i < 4; i++)
206 vcpu_set_reg(vcpu, i, lower_32_bits(vcpu_get_reg(vcpu, i)));
209 static unsigned long kvm_psci_check_allowed_function(struct kvm_vcpu *vcpu, u32 fn)
212 case PSCI_0_2_FN64_CPU_SUSPEND:
213 case PSCI_0_2_FN64_CPU_ON:
214 case PSCI_0_2_FN64_AFFINITY_INFO:
215 /* Disallow these functions for 32bit guests */
216 if (vcpu_mode_is_32bit(vcpu))
217 return PSCI_RET_NOT_SUPPORTED;
224 static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
226 struct kvm *kvm = vcpu->kvm;
227 u32 psci_fn = smccc_get_function(vcpu);
231 val = kvm_psci_check_allowed_function(vcpu, psci_fn);
236 case PSCI_0_2_FN_PSCI_VERSION:
238 * Bits[31:16] = Major Version = 0
239 * Bits[15:0] = Minor Version = 2
241 val = KVM_ARM_PSCI_0_2;
243 case PSCI_0_2_FN_CPU_SUSPEND:
244 case PSCI_0_2_FN64_CPU_SUSPEND:
245 val = kvm_psci_vcpu_suspend(vcpu);
247 case PSCI_0_2_FN_CPU_OFF:
248 kvm_psci_vcpu_off(vcpu);
249 val = PSCI_RET_SUCCESS;
251 case PSCI_0_2_FN_CPU_ON:
252 kvm_psci_narrow_to_32bit(vcpu);
254 case PSCI_0_2_FN64_CPU_ON:
255 mutex_lock(&kvm->lock);
256 val = kvm_psci_vcpu_on(vcpu);
257 mutex_unlock(&kvm->lock);
259 case PSCI_0_2_FN_AFFINITY_INFO:
260 kvm_psci_narrow_to_32bit(vcpu);
262 case PSCI_0_2_FN64_AFFINITY_INFO:
263 val = kvm_psci_vcpu_affinity_info(vcpu);
265 case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
267 * Trusted OS is MP hence does not require migration
269 * Trusted OS is not present
271 val = PSCI_0_2_TOS_MP;
273 case PSCI_0_2_FN_SYSTEM_OFF:
274 kvm_psci_system_off(vcpu);
276 * We shouldn't be going back to guest VCPU after
277 * receiving SYSTEM_OFF request.
279 * If user space accidentally/deliberately resumes
280 * guest VCPU after SYSTEM_OFF request then guest
281 * VCPU should see internal failure from PSCI return
282 * value. To achieve this, we preload r0 (or x0) with
283 * PSCI return value INTERNAL_FAILURE.
285 val = PSCI_RET_INTERNAL_FAILURE;
288 case PSCI_0_2_FN_SYSTEM_RESET:
289 kvm_psci_system_reset(vcpu);
291 * Same reason as SYSTEM_OFF for preloading r0 (or x0)
292 * with PSCI return value INTERNAL_FAILURE.
294 val = PSCI_RET_INTERNAL_FAILURE;
298 val = PSCI_RET_NOT_SUPPORTED;
303 smccc_set_retval(vcpu, val, 0, 0, 0);
307 static int kvm_psci_1_0_call(struct kvm_vcpu *vcpu)
309 u32 psci_fn = smccc_get_function(vcpu);
315 case PSCI_0_2_FN_PSCI_VERSION:
316 val = KVM_ARM_PSCI_1_0;
318 case PSCI_1_0_FN_PSCI_FEATURES:
319 feature = smccc_get_arg1(vcpu);
320 val = kvm_psci_check_allowed_function(vcpu, feature);
325 case PSCI_0_2_FN_PSCI_VERSION:
326 case PSCI_0_2_FN_CPU_SUSPEND:
327 case PSCI_0_2_FN64_CPU_SUSPEND:
328 case PSCI_0_2_FN_CPU_OFF:
329 case PSCI_0_2_FN_CPU_ON:
330 case PSCI_0_2_FN64_CPU_ON:
331 case PSCI_0_2_FN_AFFINITY_INFO:
332 case PSCI_0_2_FN64_AFFINITY_INFO:
333 case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
334 case PSCI_0_2_FN_SYSTEM_OFF:
335 case PSCI_0_2_FN_SYSTEM_RESET:
336 case PSCI_1_0_FN_PSCI_FEATURES:
337 case ARM_SMCCC_VERSION_FUNC_ID:
341 val = PSCI_RET_NOT_SUPPORTED;
346 return kvm_psci_0_2_call(vcpu);
349 smccc_set_retval(vcpu, val, 0, 0, 0);
353 static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
355 struct kvm *kvm = vcpu->kvm;
356 u32 psci_fn = smccc_get_function(vcpu);
360 case KVM_PSCI_FN_CPU_OFF:
361 kvm_psci_vcpu_off(vcpu);
362 val = PSCI_RET_SUCCESS;
364 case KVM_PSCI_FN_CPU_ON:
365 mutex_lock(&kvm->lock);
366 val = kvm_psci_vcpu_on(vcpu);
367 mutex_unlock(&kvm->lock);
370 val = PSCI_RET_NOT_SUPPORTED;
374 smccc_set_retval(vcpu, val, 0, 0, 0);
379 * kvm_psci_call - handle PSCI call if r0 value is in range
380 * @vcpu: Pointer to the VCPU struct
382 * Handle PSCI calls from guests through traps from HVC instructions.
383 * The calling convention is similar to SMC calls to the secure world
384 * where the function number is placed in r0.
386 * This function returns: > 0 (success), 0 (success but exit to user
387 * space), and < 0 (errors)
390 * -EINVAL: Unrecognized PSCI function
392 int kvm_psci_call(struct kvm_vcpu *vcpu)
394 switch (kvm_psci_version(vcpu, vcpu->kvm)) {
395 case KVM_ARM_PSCI_1_0:
396 return kvm_psci_1_0_call(vcpu);
397 case KVM_ARM_PSCI_0_2:
398 return kvm_psci_0_2_call(vcpu);
399 case KVM_ARM_PSCI_0_1:
400 return kvm_psci_0_1_call(vcpu);
406 int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
408 return 4; /* PSCI version and three workaround registers */
411 int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
413 if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices++))
416 if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1, uindices++))
419 if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, uindices++))
422 if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, uindices++))
428 #define KVM_REG_FEATURE_LEVEL_WIDTH 4
429 #define KVM_REG_FEATURE_LEVEL_MASK (BIT(KVM_REG_FEATURE_LEVEL_WIDTH) - 1)
432 * Convert the workaround level into an easy-to-compare number, where higher
433 * values mean better protection.
435 static int get_kernel_wa_level(u64 regid)
438 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
439 switch (arm64_get_spectre_v2_state()) {
440 case SPECTRE_VULNERABLE:
441 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
442 case SPECTRE_MITIGATED:
443 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL;
444 case SPECTRE_UNAFFECTED:
445 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED;
447 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
448 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
449 switch (arm64_get_spectre_v4_state()) {
450 case SPECTRE_MITIGATED:
452 * As for the hypercall discovery, we pretend we
453 * don't have any FW mitigation if SSBS is there at
456 if (cpus_have_final_cap(ARM64_SSBS))
457 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
459 case SPECTRE_UNAFFECTED:
460 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
461 case SPECTRE_VULNERABLE:
462 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
465 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
466 switch (arm64_get_spectre_bhb_state()) {
467 case SPECTRE_VULNERABLE:
468 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
469 case SPECTRE_MITIGATED:
470 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL;
471 case SPECTRE_UNAFFECTED:
472 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED;
474 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
480 int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
482 void __user *uaddr = (void __user *)(long)reg->addr;
486 case KVM_REG_ARM_PSCI_VERSION:
487 val = kvm_psci_version(vcpu, vcpu->kvm);
489 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
490 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
491 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
492 val = get_kernel_wa_level(reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
498 if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
504 int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
506 void __user *uaddr = (void __user *)(long)reg->addr;
510 if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
514 case KVM_REG_ARM_PSCI_VERSION:
518 wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
521 case KVM_ARM_PSCI_0_1:
524 vcpu->kvm->arch.psci_version = val;
526 case KVM_ARM_PSCI_0_2:
527 case KVM_ARM_PSCI_1_0:
530 vcpu->kvm->arch.psci_version = val;
536 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
537 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
538 if (val & ~KVM_REG_FEATURE_LEVEL_MASK)
541 if (get_kernel_wa_level(reg->id) < val)
546 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
547 if (val & ~(KVM_REG_FEATURE_LEVEL_MASK |
548 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED))
551 /* The enabled bit must not be set unless the level is AVAIL. */
552 if ((val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED) &&
553 (val & KVM_REG_FEATURE_LEVEL_MASK) != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL)
557 * Map all the possible incoming states to the only two we
558 * really want to deal with.
560 switch (val & KVM_REG_FEATURE_LEVEL_MASK) {
561 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL:
562 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN:
563 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
565 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
566 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
567 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
574 * We can deal with NOT_AVAIL on NOT_REQUIRED, but not the
577 if (get_kernel_wa_level(reg->id) < wa_level)