1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2020 - Google Inc
4 * Author: Andrew Scull <ascull@google.com>
7 #include <linux/linkage.h>
9 #include <asm/assembler.h>
10 #include <asm/kvm_asm.h>
11 #include <asm/kvm_mmu.h>
15 SYM_FUNC_START(__host_exit)
18 /* Store the host regs x2 and x3 */
19 stp x2, x3, [x0, #CPU_XREG_OFFSET(2)]
21 /* Retrieve the host regs x0-x1 from the stack */
22 ldp x2, x3, [sp], #16 // x0, x1
24 /* Store the host regs x0-x1 and x4-x17 */
25 stp x2, x3, [x0, #CPU_XREG_OFFSET(0)]
26 stp x4, x5, [x0, #CPU_XREG_OFFSET(4)]
27 stp x6, x7, [x0, #CPU_XREG_OFFSET(6)]
28 stp x8, x9, [x0, #CPU_XREG_OFFSET(8)]
29 stp x10, x11, [x0, #CPU_XREG_OFFSET(10)]
30 stp x12, x13, [x0, #CPU_XREG_OFFSET(12)]
31 stp x14, x15, [x0, #CPU_XREG_OFFSET(14)]
32 stp x16, x17, [x0, #CPU_XREG_OFFSET(16)]
34 /* Store the host regs x18-x29, lr */
35 save_callee_saved_regs x0
37 /* Save the host context pointer in x29 across the function call */
41 /* Restore host regs x0-x17 */
42 __host_enter_restore_full:
43 ldp x0, x1, [x29, #CPU_XREG_OFFSET(0)]
44 ldp x2, x3, [x29, #CPU_XREG_OFFSET(2)]
45 ldp x4, x5, [x29, #CPU_XREG_OFFSET(4)]
46 ldp x6, x7, [x29, #CPU_XREG_OFFSET(6)]
48 /* x0-7 are use for panic arguments */
49 __host_enter_for_panic:
50 ldp x8, x9, [x29, #CPU_XREG_OFFSET(8)]
51 ldp x10, x11, [x29, #CPU_XREG_OFFSET(10)]
52 ldp x12, x13, [x29, #CPU_XREG_OFFSET(12)]
53 ldp x14, x15, [x29, #CPU_XREG_OFFSET(14)]
54 ldp x16, x17, [x29, #CPU_XREG_OFFSET(16)]
56 /* Restore host regs x18-x29, lr */
57 restore_callee_saved_regs x29
59 /* Do not touch any register after this! */
60 __host_enter_without_restoring:
63 SYM_FUNC_END(__host_exit)
66 * void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt);
68 SYM_FUNC_START(__host_enter)
70 b __host_enter_restore_full
71 SYM_FUNC_END(__host_enter)
74 * void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr,
77 SYM_FUNC_START(__hyp_do_panic)
78 /* Prepare and exit to the host's panic funciton. */
79 mov lr, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
82 ldr lr, =nvhe_hyp_panic_handler
88 /* Load the panic arguments into x0-7 */
93 mov x7, xzr // Unused argument
95 /* Enter the host, conditionally restoring the host context. */
96 cbz x29, __host_enter_without_restoring
97 b __host_enter_for_panic
98 SYM_FUNC_END(__hyp_do_panic)
100 .macro host_el1_sync_vect
103 stp x0, x1, [sp, #-16]!
105 lsr x0, x0, #ESR_ELx_EC_SHIFT
106 cmp x0, #ESR_ELx_EC_HVC64
109 ldp x0, x1, [sp] // Don't fixup the stack yet
111 /* Check for a stub HVC call */
112 cmp x0, #HVC_STUB_HCALL_NR
117 * Compute the idmap address of __kvm_handle_stub_hvc and
118 * jump there. Since we use kimage_voffset, do not use the
119 * HYP VA for __kvm_handle_stub_hvc, but the kernel VA instead
120 * (by loading it from the constant pool).
122 * Preserve x0-x4, which may contain stub parameters.
124 ldr x5, =__kvm_handle_stub_hvc
128 .if ((.L__vect_end\@ - .L__vect_start\@) > 0x80)
129 .error "host_el1_sync_vect larger than vector entry"
133 .macro invalid_host_el2_vect
135 /* If a guest is loaded, panic out of it. */
136 stp x0, x1, [sp, #-16]!
137 get_loaded_vcpu x0, x1
138 cbnz x0, __guest_exit_panic
142 * The panic may not be clean if the exception is taken before the host
143 * context has been saved by __host_exit or after the hyp context has
144 * been partially clobbered by __host_enter.
149 .macro invalid_host_el1_vect
151 mov x0, xzr /* restore_host = false */
159 * The host vector does not use an ESB instruction in order to avoid consuming
160 * SErrors that should only be consumed by the host. Guest entry is deferred by
161 * __guest_enter if there are any pending asynchronous exceptions so hyp will
162 * always return to the host without having consumerd host SErrors.
164 * CONFIG_KVM_INDIRECT_VECTORS is not applied to the host vectors because the
165 * host knows about the EL2 vectors already, and there is no point in hiding
169 SYM_CODE_START(__kvm_hyp_host_vector)
170 invalid_host_el2_vect // Synchronous EL2t
171 invalid_host_el2_vect // IRQ EL2t
172 invalid_host_el2_vect // FIQ EL2t
173 invalid_host_el2_vect // Error EL2t
175 invalid_host_el2_vect // Synchronous EL2h
176 invalid_host_el2_vect // IRQ EL2h
177 invalid_host_el2_vect // FIQ EL2h
178 invalid_host_el2_vect // Error EL2h
180 host_el1_sync_vect // Synchronous 64-bit EL1
181 invalid_host_el1_vect // IRQ 64-bit EL1
182 invalid_host_el1_vect // FIQ 64-bit EL1
183 invalid_host_el1_vect // Error 64-bit EL1
185 invalid_host_el1_vect // Synchronous 32-bit EL1
186 invalid_host_el1_vect // IRQ 32-bit EL1
187 invalid_host_el1_vect // FIQ 32-bit EL1
188 invalid_host_el1_vect // Error 32-bit EL1
189 SYM_CODE_END(__kvm_hyp_host_vector)
192 * Forward SMC with arguments in struct kvm_cpu_context, and
193 * store the result into the same struct. Assumes SMCCC 1.2 or older.
195 * x0: struct kvm_cpu_context*
197 SYM_CODE_START(__kvm_hyp_host_forward_smc)
199 * Use x18 to keep the pointer to the host context because
200 * x18 is callee-saved in SMCCC but not in AAPCS64.
204 ldp x0, x1, [x18, #CPU_XREG_OFFSET(0)]
205 ldp x2, x3, [x18, #CPU_XREG_OFFSET(2)]
206 ldp x4, x5, [x18, #CPU_XREG_OFFSET(4)]
207 ldp x6, x7, [x18, #CPU_XREG_OFFSET(6)]
208 ldp x8, x9, [x18, #CPU_XREG_OFFSET(8)]
209 ldp x10, x11, [x18, #CPU_XREG_OFFSET(10)]
210 ldp x12, x13, [x18, #CPU_XREG_OFFSET(12)]
211 ldp x14, x15, [x18, #CPU_XREG_OFFSET(14)]
212 ldp x16, x17, [x18, #CPU_XREG_OFFSET(16)]
216 stp x0, x1, [x18, #CPU_XREG_OFFSET(0)]
217 stp x2, x3, [x18, #CPU_XREG_OFFSET(2)]
218 stp x4, x5, [x18, #CPU_XREG_OFFSET(4)]
219 stp x6, x7, [x18, #CPU_XREG_OFFSET(6)]
220 stp x8, x9, [x18, #CPU_XREG_OFFSET(8)]
221 stp x10, x11, [x18, #CPU_XREG_OFFSET(10)]
222 stp x12, x13, [x18, #CPU_XREG_OFFSET(12)]
223 stp x14, x15, [x18, #CPU_XREG_OFFSET(14)]
224 stp x16, x17, [x18, #CPU_XREG_OFFSET(16)]
227 SYM_CODE_END(__kvm_hyp_host_forward_smc)