arch/arm64/kvm/hyp/nvhe/debug-sr.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2015 - ARM Ltd
   4  * Author: Marc Zyngier <marc.zyngier@arm.com>
   5  */
   6
   7 #include <hyp/debug-sr.h>
   8
   9 #include <linux/compiler.h>
  10 #include <linux/kvm_host.h>
  11
  12 #include <asm/debug-monitors.h>
  13 #include <asm/kvm_asm.h>
  14 #include <asm/kvm_hyp.h>
  15 #include <asm/kvm_mmu.h>
  16
  17 static void __debug_save_spe(u64 *pmscr_el1)
  18 {
  19         u64 reg;
  20
  21         /* Clear pmscr in case of early return */
  22         *pmscr_el1 = 0;
  23
  24         /*
  25          * At this point, we know that this CPU implements
  26          * SPE and is available to the host.
  27          * Check if the host is actually using it ?
  28          */
  29         reg = read_sysreg_s(SYS_PMBLIMITR_EL1);
  30         if (!(reg & BIT(SYS_PMBLIMITR_EL1_E_SHIFT)))
  31                 return;
  32
  33         /* Yes; save the control register and disable data generation */
  34         *pmscr_el1 = read_sysreg_s(SYS_PMSCR_EL1);
  35         write_sysreg_s(0, SYS_PMSCR_EL1);
  36         isb();
  37
  38         /* Now drain all buffered data to memory */
  39         psb_csync();
  40         dsb(nsh);
  41 }
  42
  43 static void __debug_restore_spe(u64 pmscr_el1)
  44 {
  45         if (!pmscr_el1)
  46                 return;
  47
  48         /* The host page table is installed, but not yet synchronised */
  49         isb();
  50
  51         /* Re-enable data generation */
  52         write_sysreg_s(pmscr_el1, SYS_PMSCR_EL1);
  53 }
  54
  55 static void __debug_save_trace(u64 *trfcr_el1)
  56 {
  57         *trfcr_el1 = 0;
  58
  59         /* Check if the TRBE is enabled */
  60         if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_ENABLE))
  61                 return;
  62         /*
  63          * Prohibit trace generation while we are in guest.
  64          * Since access to TRFCR_EL1 is trapped, the guest can't
  65          * modify the filtering set by the host.
  66          */
  67         *trfcr_el1 = read_sysreg_s(SYS_TRFCR_EL1);
  68         write_sysreg_s(0, SYS_TRFCR_EL1);
  69         isb();
  70         /* Drain the trace buffer to memory */
  71         tsb_csync();
  72         dsb(nsh);
  73 }
  74
  75 static void __debug_restore_trace(u64 trfcr_el1)
  76 {
  77         if (!trfcr_el1)
  78                 return;
  79
  80         /* Restore trace filter controls */
  81         write_sysreg_s(trfcr_el1, SYS_TRFCR_EL1);
  82 }
  83
  84 void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu)
  85 {
  86         /* Disable and flush SPE data generation */
  87         if (vcpu->arch.flags & KVM_ARM64_DEBUG_STATE_SAVE_SPE)
  88                 __debug_save_spe(&vcpu->arch.host_debug_state.pmscr_el1);
  89         /* Disable and flush Self-Hosted Trace generation */
  90         if (vcpu->arch.flags & KVM_ARM64_DEBUG_STATE_SAVE_TRBE)
  91                 __debug_save_trace(&vcpu->arch.host_debug_state.trfcr_el1);
  92 }
  93
  94 void __debug_switch_to_guest(struct kvm_vcpu *vcpu)
  95 {
  96         __debug_switch_to_guest_common(vcpu);
  97 }
  98
  99 void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu)
 100 {
 101         if (vcpu->arch.flags & KVM_ARM64_DEBUG_STATE_SAVE_SPE)
 102                 __debug_restore_spe(vcpu->arch.host_debug_state.pmscr_el1);
 103         if (vcpu->arch.flags & KVM_ARM64_DEBUG_STATE_SAVE_TRBE)
 104                 __debug_restore_trace(vcpu->arch.host_debug_state.trfcr_el1);
 105 }
 106
 107 void __debug_switch_to_host(struct kvm_vcpu *vcpu)
 108 {
 109         __debug_switch_to_host_common(vcpu);
 110 }
 111
 112 u32 __kvm_get_mdcr_el2(void)
 113 {
 114         return read_sysreg(mdcr_el2);
 115 }