1 // SPDX-License-Identifier: GPL-2.0-only
3 * SMP initialisation and IPI support
4 * Based on arch/arm/kernel/smp.c
6 * Copyright (C) 2012 ARM Ltd.
9 #include <linux/acpi.h>
10 #include <linux/arm_sdei.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/sched/mm.h>
15 #include <linux/sched/hotplug.h>
16 #include <linux/sched/task_stack.h>
17 #include <linux/interrupt.h>
18 #include <linux/cache.h>
19 #include <linux/profile.h>
20 #include <linux/errno.h>
22 #include <linux/err.h>
23 #include <linux/cpu.h>
24 #include <linux/smp.h>
25 #include <linux/seq_file.h>
26 #include <linux/irq.h>
27 #include <linux/irqchip/arm-gic-v3.h>
28 #include <linux/percpu.h>
29 #include <linux/clockchips.h>
30 #include <linux/completion.h>
32 #include <linux/irq_work.h>
33 #include <linux/kexec.h>
35 #include <asm/alternative.h>
36 #include <asm/atomic.h>
37 #include <asm/cacheflush.h>
39 #include <asm/cputype.h>
40 #include <asm/cpu_ops.h>
41 #include <asm/daifflags.h>
42 #include <asm/mmu_context.h>
44 #include <asm/pgtable.h>
45 #include <asm/pgalloc.h>
46 #include <asm/processor.h>
47 #include <asm/smp_plat.h>
48 #include <asm/sections.h>
49 #include <asm/tlbflush.h>
50 #include <asm/ptrace.h>
53 #define CREATE_TRACE_POINTS
54 #include <trace/events/ipi.h>
56 DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
57 EXPORT_PER_CPU_SYMBOL(cpu_number);
60 * as from 2.5, kernels no longer have an init_tasks structure
61 * so we need some other way of telling a new secondary core
62 * where to place its SVC stack
64 struct secondary_data secondary_data;
65 /* Number of CPUs which aren't online, but looping in kernel text. */
66 int cpus_stuck_in_kernel;
78 #ifdef CONFIG_HOTPLUG_CPU
79 static int op_cpu_kill(unsigned int cpu);
81 static inline int op_cpu_kill(unsigned int cpu)
89 * Boot a secondary CPU, and assign it the specified idle task.
90 * This also gives us the initial stack to use for this CPU.
92 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
94 if (cpu_ops[cpu]->cpu_boot)
95 return cpu_ops[cpu]->cpu_boot(cpu);
100 static DECLARE_COMPLETION(cpu_running);
102 int __cpu_up(unsigned int cpu, struct task_struct *idle)
108 * We need to tell the secondary core where to find its stack and the
111 secondary_data.task = idle;
112 secondary_data.stack = task_stack_page(idle) + THREAD_SIZE;
113 update_cpu_boot_status(CPU_MMU_OFF);
114 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
117 * Now bring the CPU into our world.
119 ret = boot_secondary(cpu, idle);
122 * CPU was successfully started, wait for it to come online or
125 wait_for_completion_timeout(&cpu_running,
126 msecs_to_jiffies(5000));
128 if (!cpu_online(cpu)) {
129 pr_crit("CPU%u: failed to come online\n", cpu);
133 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
137 secondary_data.task = NULL;
138 secondary_data.stack = NULL;
139 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
140 status = READ_ONCE(secondary_data.status);
143 if (status == CPU_MMU_OFF)
144 status = READ_ONCE(__early_cpu_boot_status);
146 switch (status & CPU_BOOT_STATUS_MASK) {
148 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
150 cpus_stuck_in_kernel++;
153 if (!op_cpu_kill(cpu)) {
154 pr_crit("CPU%u: died during early boot\n", cpu);
157 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
159 case CPU_STUCK_IN_KERNEL:
160 pr_crit("CPU%u: is stuck in kernel\n", cpu);
161 if (status & CPU_STUCK_REASON_52_BIT_VA)
162 pr_crit("CPU%u: does not support 52-bit VAs\n", cpu);
163 if (status & CPU_STUCK_REASON_NO_GRAN)
164 pr_crit("CPU%u: does not support %luK granule \n", cpu, PAGE_SIZE / SZ_1K);
165 cpus_stuck_in_kernel++;
167 case CPU_PANIC_KERNEL:
168 panic("CPU%u detected unsupported configuration\n", cpu);
175 static void init_gic_priority_masking(void)
179 if (WARN_ON(!gic_enable_sre()))
182 cpuflags = read_sysreg(daif);
184 WARN_ON(!(cpuflags & PSR_I_BIT));
186 gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
190 * This is the secondary CPU boot entry. We're using this CPUs
191 * idle thread stack, but a set of temporary page tables.
193 asmlinkage notrace void secondary_start_kernel(void)
195 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
196 struct mm_struct *mm = &init_mm;
199 cpu = task_cpu(current);
200 set_my_cpu_offset(per_cpu_offset(cpu));
203 * All kernel threads share the same mm context; grab a
204 * reference and switch to it.
207 current->active_mm = mm;
210 * TTBR0 is only used for the identity mapping at this stage. Make it
211 * point to zero page to avoid speculatively fetching new entries.
213 cpu_uninstall_idmap();
215 if (system_uses_irq_prio_masking())
216 init_gic_priority_masking();
219 trace_hardirqs_off();
222 * If the system has established the capabilities, make sure
223 * this CPU ticks all of those. If it doesn't, the CPU will
224 * fail to come online.
226 check_local_cpu_capabilities();
228 if (cpu_ops[cpu]->cpu_postboot)
229 cpu_ops[cpu]->cpu_postboot();
232 * Log the CPU info before it is marked online and might get read.
237 * Enable GIC and timers.
239 notify_cpu_starting(cpu);
241 store_cpu_topology(cpu);
245 * OK, now it's safe to let the boot CPU continue. Wait for
246 * the CPU migration code to notice that the CPU is online
247 * before we continue.
249 pr_info("CPU%u: Booted secondary processor 0x%010lx [0x%08x]\n",
250 cpu, (unsigned long)mpidr,
252 update_cpu_boot_status(CPU_BOOT_SUCCESS);
253 set_cpu_online(cpu, true);
254 complete(&cpu_running);
256 local_daif_restore(DAIF_PROCCTX);
259 * OK, it's off to the idle thread for us
261 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
264 #ifdef CONFIG_HOTPLUG_CPU
265 static int op_cpu_disable(unsigned int cpu)
268 * If we don't have a cpu_die method, abort before we reach the point
269 * of no return. CPU0 may not have an cpu_ops, so test for it.
271 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
275 * We may need to abort a hot unplug for some other mechanism-specific
278 if (cpu_ops[cpu]->cpu_disable)
279 return cpu_ops[cpu]->cpu_disable(cpu);
285 * __cpu_disable runs on the processor to be shutdown.
287 int __cpu_disable(void)
289 unsigned int cpu = smp_processor_id();
292 ret = op_cpu_disable(cpu);
296 remove_cpu_topology(cpu);
297 numa_remove_cpu(cpu);
300 * Take this CPU offline. Once we clear this, we can't return,
301 * and we must not schedule until we're ready to give up the cpu.
303 set_cpu_online(cpu, false);
306 * OK - migrate IRQs away from this CPU
308 irq_migrate_all_off_this_cpu();
313 static int op_cpu_kill(unsigned int cpu)
316 * If we have no means of synchronising with the dying CPU, then assume
317 * that it is really dead. We can only wait for an arbitrary length of
318 * time and hope that it's dead, so let's skip the wait and just hope.
320 if (!cpu_ops[cpu]->cpu_kill)
323 return cpu_ops[cpu]->cpu_kill(cpu);
327 * called on the thread which is asking for a CPU to be shutdown -
328 * waits until shutdown has completed, or it is timed out.
330 void __cpu_die(unsigned int cpu)
334 if (!cpu_wait_death(cpu, 5)) {
335 pr_crit("CPU%u: cpu didn't die\n", cpu);
338 pr_notice("CPU%u: shutdown\n", cpu);
341 * Now that the dying CPU is beyond the point of no return w.r.t.
342 * in-kernel synchronisation, try to get the firwmare to help us to
343 * verify that it has really left the kernel before we consider
344 * clobbering anything it might still be using.
346 err = op_cpu_kill(cpu);
348 pr_warn("CPU%d may not have shut down cleanly: %d\n",
353 * Called from the idle thread for the CPU which has been shutdown.
358 unsigned int cpu = smp_processor_id();
364 /* Tell __cpu_die() that this CPU is now safe to dispose of */
365 (void)cpu_report_death();
368 * Actually shutdown the CPU. This must never fail. The specific hotplug
369 * mechanism must perform all required cache maintenance to ensure that
370 * no dirty lines are lost in the process of shutting down the CPU.
372 cpu_ops[cpu]->cpu_die(cpu);
379 * Kill the calling secondary CPU, early in bringup before it is turned
382 void cpu_die_early(void)
384 int cpu = smp_processor_id();
386 pr_crit("CPU%d: will not boot\n", cpu);
388 /* Mark this CPU absent */
389 set_cpu_present(cpu, 0);
391 #ifdef CONFIG_HOTPLUG_CPU
392 update_cpu_boot_status(CPU_KILL_ME);
393 /* Check if we can park ourselves */
394 if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
395 cpu_ops[cpu]->cpu_die(cpu);
397 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
402 static void __init hyp_mode_check(void)
404 if (is_hyp_mode_available())
405 pr_info("CPU: All CPU(s) started at EL2\n");
406 else if (is_hyp_mode_mismatched())
407 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
408 "CPU: CPUs started in inconsistent modes");
410 pr_info("CPU: All CPU(s) started at EL1\n");
413 void __init smp_cpus_done(unsigned int max_cpus)
415 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
416 setup_cpu_features();
418 apply_alternatives_all();
419 mark_linear_text_alias_ro();
422 void __init smp_prepare_boot_cpu(void)
424 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
425 cpuinfo_store_boot_cpu();
428 * We now know enough about the boot CPU to apply the
429 * alternatives that cannot wait until interrupt handling
430 * and/or scheduling is enabled.
432 apply_boot_alternatives();
434 /* Conditionally switch to GIC PMR for interrupt masking */
435 if (system_uses_irq_prio_masking())
436 init_gic_priority_masking();
439 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
445 * A cpu node with missing "reg" property is
446 * considered invalid to build a cpu_logical_map
449 cell = of_get_property(dn, "reg", NULL);
451 pr_err("%pOF: missing reg property\n", dn);
455 hwid = of_read_number(cell, of_n_addr_cells(dn));
457 * Non affinity bits must be set to 0 in the DT
459 if (hwid & ~MPIDR_HWID_BITMASK) {
460 pr_err("%pOF: invalid reg property\n", dn);
467 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
468 * entries and check for duplicates. If any is found just ignore the
469 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
470 * matching valid MPIDR values.
472 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
476 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
477 if (cpu_logical_map(i) == hwid)
483 * Initialize cpu operations for a logical cpu and
484 * set it in the possible mask on success
486 static int __init smp_cpu_setup(int cpu)
488 if (cpu_read_ops(cpu))
491 if (cpu_ops[cpu]->cpu_init(cpu))
494 set_cpu_possible(cpu, true);
499 static bool bootcpu_valid __initdata;
500 static unsigned int cpu_count = 1;
503 static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
505 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
507 return &cpu_madt_gicc[cpu];
511 * acpi_map_gic_cpu_interface - parse processor MADT entry
513 * Carry out sanity checks on MADT processor entry and initialize
514 * cpu_logical_map on success
517 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
519 u64 hwid = processor->arm_mpidr;
521 if (!(processor->flags & ACPI_MADT_ENABLED)) {
522 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
526 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
527 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
531 if (is_mpidr_duplicate(cpu_count, hwid)) {
532 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
536 /* Check if GICC structure of boot CPU is available in the MADT */
537 if (cpu_logical_map(0) == hwid) {
539 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
543 bootcpu_valid = true;
544 cpu_madt_gicc[0] = *processor;
548 if (cpu_count >= NR_CPUS)
551 /* map the logical cpu id to cpu MPIDR */
552 cpu_logical_map(cpu_count) = hwid;
554 cpu_madt_gicc[cpu_count] = *processor;
557 * Set-up the ACPI parking protocol cpu entries
558 * while initializing the cpu_logical_map to
559 * avoid parsing MADT entries multiple times for
560 * nothing (ie a valid cpu_logical_map entry should
561 * contain a valid parking protocol data set to
562 * initialize the cpu if the parking protocol is
563 * the only available enable method).
565 acpi_set_mailbox_entry(cpu_count, processor);
571 acpi_parse_gic_cpu_interface(union acpi_subtable_headers *header,
572 const unsigned long end)
574 struct acpi_madt_generic_interrupt *processor;
576 processor = (struct acpi_madt_generic_interrupt *)header;
577 if (BAD_MADT_GICC_ENTRY(processor, end))
580 acpi_table_print_madt_entry(&header->common);
582 acpi_map_gic_cpu_interface(processor);
587 static void __init acpi_parse_and_init_cpus(void)
592 * do a walk of MADT to determine how many CPUs
593 * we have including disabled CPUs, and get information
594 * we need for SMP init.
596 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
597 acpi_parse_gic_cpu_interface, 0);
600 * In ACPI, SMP and CPU NUMA information is provided in separate
601 * static tables, namely the MADT and the SRAT.
603 * Thus, it is simpler to first create the cpu logical map through
604 * an MADT walk and then map the logical cpus to their node ids
607 acpi_map_cpus_to_nodes();
609 for (i = 0; i < nr_cpu_ids; i++)
610 early_map_cpu_to_node(i, acpi_numa_get_nid(i));
613 #define acpi_parse_and_init_cpus(...) do { } while (0)
617 * Enumerate the possible CPU set from the device tree and build the
618 * cpu logical map array containing MPIDR values related to logical
619 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
621 static void __init of_parse_and_init_cpus(void)
623 struct device_node *dn;
625 for_each_of_cpu_node(dn) {
626 u64 hwid = of_get_cpu_mpidr(dn);
628 if (hwid == INVALID_HWID)
631 if (is_mpidr_duplicate(cpu_count, hwid)) {
632 pr_err("%pOF: duplicate cpu reg properties in the DT\n",
638 * The numbering scheme requires that the boot CPU
639 * must be assigned logical id 0. Record it so that
640 * the logical map built from DT is validated and can
643 if (hwid == cpu_logical_map(0)) {
645 pr_err("%pOF: duplicate boot cpu reg property in DT\n",
650 bootcpu_valid = true;
651 early_map_cpu_to_node(0, of_node_to_nid(dn));
654 * cpu_logical_map has already been
655 * initialized and the boot cpu doesn't need
656 * the enable-method so continue without
662 if (cpu_count >= NR_CPUS)
665 pr_debug("cpu logical map 0x%llx\n", hwid);
666 cpu_logical_map(cpu_count) = hwid;
668 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
675 * Enumerate the possible CPU set from the device tree or ACPI and build the
676 * cpu logical map array containing MPIDR values related to logical
677 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
679 void __init smp_init_cpus(void)
684 of_parse_and_init_cpus();
686 acpi_parse_and_init_cpus();
688 if (cpu_count > nr_cpu_ids)
689 pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
690 cpu_count, nr_cpu_ids);
692 if (!bootcpu_valid) {
693 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
698 * We need to set the cpu_logical_map entries before enabling
699 * the cpus so that cpu processor description entries (DT cpu nodes
700 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
701 * with entries in cpu_logical_map while initializing the cpus.
702 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
704 for (i = 1; i < nr_cpu_ids; i++) {
705 if (cpu_logical_map(i) != INVALID_HWID) {
706 if (smp_cpu_setup(i))
707 cpu_logical_map(i) = INVALID_HWID;
712 void __init smp_prepare_cpus(unsigned int max_cpus)
716 unsigned int this_cpu;
720 this_cpu = smp_processor_id();
721 store_cpu_topology(this_cpu);
722 numa_store_cpu_info(this_cpu);
723 numa_add_cpu(this_cpu);
726 * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
727 * secondary CPUs present.
733 * Initialise the present map (which describes the set of CPUs
734 * actually populated at the present time) and release the
735 * secondaries from the bootloader.
737 for_each_possible_cpu(cpu) {
739 per_cpu(cpu_number, cpu) = cpu;
741 if (cpu == smp_processor_id())
747 err = cpu_ops[cpu]->cpu_prepare(cpu);
751 set_cpu_present(cpu, true);
752 numa_store_cpu_info(cpu);
756 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
758 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
760 __smp_cross_call = fn;
763 static const char *ipi_types[NR_IPI] __tracepoint_string = {
764 #define S(x,s) [x] = s
765 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
766 S(IPI_CALL_FUNC, "Function call interrupts"),
767 S(IPI_CPU_STOP, "CPU stop interrupts"),
768 S(IPI_CPU_CRASH_STOP, "CPU stop (for crash dump) interrupts"),
769 S(IPI_TIMER, "Timer broadcast interrupts"),
770 S(IPI_IRQ_WORK, "IRQ work interrupts"),
771 S(IPI_WAKEUP, "CPU wake-up interrupts"),
774 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
776 trace_ipi_raise(target, ipi_types[ipinr]);
777 __smp_cross_call(target, ipinr);
780 void show_ipi_list(struct seq_file *p, int prec)
784 for (i = 0; i < NR_IPI; i++) {
785 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
786 prec >= 4 ? " " : "");
787 for_each_online_cpu(cpu)
788 seq_printf(p, "%10u ",
789 __get_irq_stat(cpu, ipi_irqs[i]));
790 seq_printf(p, " %s\n", ipi_types[i]);
794 u64 smp_irq_stat_cpu(unsigned int cpu)
799 for (i = 0; i < NR_IPI; i++)
800 sum += __get_irq_stat(cpu, ipi_irqs[i]);
805 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
807 smp_cross_call(mask, IPI_CALL_FUNC);
810 void arch_send_call_function_single_ipi(int cpu)
812 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
815 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
816 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
818 smp_cross_call(mask, IPI_WAKEUP);
822 #ifdef CONFIG_IRQ_WORK
823 void arch_irq_work_raise(void)
825 if (__smp_cross_call)
826 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
830 static void local_cpu_stop(void)
832 set_cpu_online(smp_processor_id(), false);
835 sdei_mask_local_cpu();
840 * We need to implement panic_smp_self_stop() for parallel panic() calls, so
841 * that cpu_online_mask gets correctly updated and smp_send_stop() can skip
842 * CPUs that have already stopped themselves.
844 void panic_smp_self_stop(void)
849 #ifdef CONFIG_KEXEC_CORE
850 static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
853 static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
855 #ifdef CONFIG_KEXEC_CORE
856 crash_save_cpu(regs, cpu);
858 atomic_dec(&waiting_for_crash_ipi);
861 sdei_mask_local_cpu();
863 #ifdef CONFIG_HOTPLUG_CPU
864 if (cpu_ops[cpu]->cpu_die)
865 cpu_ops[cpu]->cpu_die(cpu);
874 * Main handler for inter-processor interrupts
876 void handle_IPI(int ipinr, struct pt_regs *regs)
878 unsigned int cpu = smp_processor_id();
879 struct pt_regs *old_regs = set_irq_regs(regs);
881 if ((unsigned)ipinr < NR_IPI) {
882 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
883 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
893 generic_smp_call_function_interrupt();
903 case IPI_CPU_CRASH_STOP:
904 if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
906 ipi_cpu_crash_stop(cpu, regs);
912 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
915 tick_receive_broadcast();
920 #ifdef CONFIG_IRQ_WORK
928 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
930 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
931 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
937 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
941 if ((unsigned)ipinr < NR_IPI)
942 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
943 set_irq_regs(old_regs);
946 void smp_send_reschedule(int cpu)
948 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
951 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
952 void tick_broadcast(const struct cpumask *mask)
954 smp_cross_call(mask, IPI_TIMER);
958 void smp_send_stop(void)
960 unsigned long timeout;
962 if (num_online_cpus() > 1) {
965 cpumask_copy(&mask, cpu_online_mask);
966 cpumask_clear_cpu(smp_processor_id(), &mask);
968 if (system_state <= SYSTEM_RUNNING)
969 pr_crit("SMP: stopping secondary CPUs\n");
970 smp_cross_call(&mask, IPI_CPU_STOP);
973 /* Wait up to one second for other CPUs to stop */
974 timeout = USEC_PER_SEC;
975 while (num_online_cpus() > 1 && timeout--)
978 if (num_online_cpus() > 1)
979 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
980 cpumask_pr_args(cpu_online_mask));
982 sdei_mask_local_cpu();
985 #ifdef CONFIG_KEXEC_CORE
986 void crash_smp_send_stop(void)
988 static int cpus_stopped;
990 unsigned long timeout;
993 * This function can be called twice in panic path, but obviously
994 * we execute this only once.
1001 if (num_online_cpus() == 1) {
1002 sdei_mask_local_cpu();
1006 cpumask_copy(&mask, cpu_online_mask);
1007 cpumask_clear_cpu(smp_processor_id(), &mask);
1009 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
1011 pr_crit("SMP: stopping secondary CPUs\n");
1012 smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
1014 /* Wait up to one second for other CPUs to stop */
1015 timeout = USEC_PER_SEC;
1016 while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
1019 if (atomic_read(&waiting_for_crash_ipi) > 0)
1020 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
1021 cpumask_pr_args(&mask));
1023 sdei_mask_local_cpu();
1026 bool smp_crash_stop_failed(void)
1028 return (atomic_read(&waiting_for_crash_ipi) > 0);
1033 * not supported here
1035 int setup_profiling_timer(unsigned int multiplier)
1040 static bool have_cpu_die(void)
1042 #ifdef CONFIG_HOTPLUG_CPU
1043 int any_cpu = raw_smp_processor_id();
1045 if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
1051 bool cpus_are_stuck_in_kernel(void)
1053 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
1055 return !!cpus_stuck_in_kernel || smp_spin_tables;