1 // SPDX-License-Identifier: GPL-2.0-only
3 * Based on arch/arm/kernel/ptrace.c
6 * edited by Linus Torvalds
7 * ARM modifications Copyright (C) 2000 Russell King
8 * Copyright (C) 2012 ARM Ltd.
11 #include <linux/audit.h>
12 #include <linux/compat.h>
13 #include <linux/kernel.h>
14 #include <linux/sched/signal.h>
15 #include <linux/sched/task_stack.h>
17 #include <linux/nospec.h>
18 #include <linux/smp.h>
19 #include <linux/ptrace.h>
20 #include <linux/user.h>
21 #include <linux/seccomp.h>
22 #include <linux/security.h>
23 #include <linux/init.h>
24 #include <linux/signal.h>
25 #include <linux/string.h>
26 #include <linux/uaccess.h>
27 #include <linux/perf_event.h>
28 #include <linux/hw_breakpoint.h>
29 #include <linux/regset.h>
30 #include <linux/tracehook.h>
31 #include <linux/elf.h>
33 #include <asm/compat.h>
34 #include <asm/cpufeature.h>
35 #include <asm/debug-monitors.h>
36 #include <asm/fpsimd.h>
38 #include <asm/pointer_auth.h>
39 #include <asm/stacktrace.h>
40 #include <asm/syscall.h>
41 #include <asm/traps.h>
42 #include <asm/system_misc.h>
44 #define CREATE_TRACE_POINTS
45 #include <trace/events/syscalls.h>
47 struct pt_regs_offset {
52 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
53 #define REG_OFFSET_END {.name = NULL, .offset = 0}
54 #define GPR_OFFSET_NAME(r) \
55 {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
57 static const struct pt_regs_offset regoffset_table[] = {
89 {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
92 REG_OFFSET_NAME(pstate),
97 * regs_query_register_offset() - query register offset from its name
98 * @name: the name of a register
100 * regs_query_register_offset() returns the offset of a register in struct
101 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
103 int regs_query_register_offset(const char *name)
105 const struct pt_regs_offset *roff;
107 for (roff = regoffset_table; roff->name != NULL; roff++)
108 if (!strcmp(roff->name, name))
114 * regs_within_kernel_stack() - check the address in the stack
115 * @regs: pt_regs which contains kernel stack pointer.
116 * @addr: address which is checked.
118 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
119 * If @addr is within the kernel stack, it returns true. If not, returns false.
121 static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
123 return ((addr & ~(THREAD_SIZE - 1)) ==
124 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
125 on_irq_stack(addr, sizeof(unsigned long), NULL);
129 * regs_get_kernel_stack_nth() - get Nth entry of the stack
130 * @regs: pt_regs which contains kernel stack pointer.
131 * @n: stack entry number.
133 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
134 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
137 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
139 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
142 if (regs_within_kernel_stack(regs, (unsigned long)addr))
149 * TODO: does not yet catch signals sent when the child dies.
150 * in exit.c or in signal.c.
154 * Called by kernel/ptrace.c when detaching..
156 void ptrace_disable(struct task_struct *child)
159 * This would be better off in core code, but PTRACE_DETACH has
160 * grown its fair share of arch-specific worts and changing it
161 * is likely to cause regressions on obscure architectures.
163 user_disable_single_step(child);
166 #ifdef CONFIG_HAVE_HW_BREAKPOINT
168 * Handle hitting a HW-breakpoint.
170 static void ptrace_hbptriggered(struct perf_event *bp,
171 struct perf_sample_data *data,
172 struct pt_regs *regs)
174 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
175 const char *desc = "Hardware breakpoint trap (ptrace)";
178 if (is_compat_task()) {
182 for (i = 0; i < ARM_MAX_BRP; ++i) {
183 if (current->thread.debug.hbp_break[i] == bp) {
184 si_errno = (i << 1) + 1;
189 for (i = 0; i < ARM_MAX_WRP; ++i) {
190 if (current->thread.debug.hbp_watch[i] == bp) {
191 si_errno = -((i << 1) + 1);
195 arm64_force_sig_ptrace_errno_trap(si_errno, bkpt->trigger,
200 arm64_force_sig_fault(SIGTRAP, TRAP_HWBKPT, bkpt->trigger, desc);
204 * Unregister breakpoints from this task and reset the pointers in
207 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
210 struct thread_struct *t = &tsk->thread;
212 for (i = 0; i < ARM_MAX_BRP; i++) {
213 if (t->debug.hbp_break[i]) {
214 unregister_hw_breakpoint(t->debug.hbp_break[i]);
215 t->debug.hbp_break[i] = NULL;
219 for (i = 0; i < ARM_MAX_WRP; i++) {
220 if (t->debug.hbp_watch[i]) {
221 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
222 t->debug.hbp_watch[i] = NULL;
227 void ptrace_hw_copy_thread(struct task_struct *tsk)
229 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
232 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
233 struct task_struct *tsk,
236 struct perf_event *bp = ERR_PTR(-EINVAL);
239 case NT_ARM_HW_BREAK:
240 if (idx >= ARM_MAX_BRP)
242 idx = array_index_nospec(idx, ARM_MAX_BRP);
243 bp = tsk->thread.debug.hbp_break[idx];
245 case NT_ARM_HW_WATCH:
246 if (idx >= ARM_MAX_WRP)
248 idx = array_index_nospec(idx, ARM_MAX_WRP);
249 bp = tsk->thread.debug.hbp_watch[idx];
257 static int ptrace_hbp_set_event(unsigned int note_type,
258 struct task_struct *tsk,
260 struct perf_event *bp)
265 case NT_ARM_HW_BREAK:
266 if (idx >= ARM_MAX_BRP)
268 idx = array_index_nospec(idx, ARM_MAX_BRP);
269 tsk->thread.debug.hbp_break[idx] = bp;
272 case NT_ARM_HW_WATCH:
273 if (idx >= ARM_MAX_WRP)
275 idx = array_index_nospec(idx, ARM_MAX_WRP);
276 tsk->thread.debug.hbp_watch[idx] = bp;
285 static struct perf_event *ptrace_hbp_create(unsigned int note_type,
286 struct task_struct *tsk,
289 struct perf_event *bp;
290 struct perf_event_attr attr;
294 case NT_ARM_HW_BREAK:
295 type = HW_BREAKPOINT_X;
297 case NT_ARM_HW_WATCH:
298 type = HW_BREAKPOINT_RW;
301 return ERR_PTR(-EINVAL);
304 ptrace_breakpoint_init(&attr);
307 * Initialise fields to sane defaults
308 * (i.e. values that will pass validation).
311 attr.bp_len = HW_BREAKPOINT_LEN_4;
315 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
319 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
326 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
327 struct arch_hw_breakpoint_ctrl ctrl,
328 struct perf_event_attr *attr)
330 int err, len, type, offset, disabled = !ctrl.enabled;
332 attr->disabled = disabled;
336 err = arch_bp_generic_fields(ctrl, &len, &type, &offset);
341 case NT_ARM_HW_BREAK:
342 if ((type & HW_BREAKPOINT_X) != type)
345 case NT_ARM_HW_WATCH:
346 if ((type & HW_BREAKPOINT_RW) != type)
354 attr->bp_type = type;
355 attr->bp_addr += offset;
360 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
366 case NT_ARM_HW_BREAK:
367 num = hw_breakpoint_slots(TYPE_INST);
369 case NT_ARM_HW_WATCH:
370 num = hw_breakpoint_slots(TYPE_DATA);
376 reg |= debug_monitors_arch();
384 static int ptrace_hbp_get_ctrl(unsigned int note_type,
385 struct task_struct *tsk,
389 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
394 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
398 static int ptrace_hbp_get_addr(unsigned int note_type,
399 struct task_struct *tsk,
403 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
408 *addr = bp ? counter_arch_bp(bp)->address : 0;
412 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
413 struct task_struct *tsk,
416 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
419 bp = ptrace_hbp_create(note_type, tsk, idx);
424 static int ptrace_hbp_set_ctrl(unsigned int note_type,
425 struct task_struct *tsk,
430 struct perf_event *bp;
431 struct perf_event_attr attr;
432 struct arch_hw_breakpoint_ctrl ctrl;
434 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
441 decode_ctrl_reg(uctrl, &ctrl);
442 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
446 return modify_user_hw_breakpoint(bp, &attr);
449 static int ptrace_hbp_set_addr(unsigned int note_type,
450 struct task_struct *tsk,
455 struct perf_event *bp;
456 struct perf_event_attr attr;
458 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
466 err = modify_user_hw_breakpoint(bp, &attr);
470 #define PTRACE_HBP_ADDR_SZ sizeof(u64)
471 #define PTRACE_HBP_CTRL_SZ sizeof(u32)
472 #define PTRACE_HBP_PAD_SZ sizeof(u32)
474 static int hw_break_get(struct task_struct *target,
475 const struct user_regset *regset,
478 unsigned int note_type = regset->core_note_type;
484 ret = ptrace_hbp_get_resource_info(note_type, &info);
488 membuf_write(&to, &info, sizeof(info));
489 membuf_zero(&to, sizeof(u32));
490 /* (address, ctrl) registers */
492 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
495 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
498 membuf_store(&to, addr);
499 membuf_store(&to, ctrl);
500 membuf_zero(&to, sizeof(u32));
506 static int hw_break_set(struct task_struct *target,
507 const struct user_regset *regset,
508 unsigned int pos, unsigned int count,
509 const void *kbuf, const void __user *ubuf)
511 unsigned int note_type = regset->core_note_type;
512 int ret, idx = 0, offset, limit;
516 /* Resource info and pad */
517 offset = offsetof(struct user_hwdebug_state, dbg_regs);
518 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
522 /* (address, ctrl) registers */
523 limit = regset->n * regset->size;
524 while (count && offset < limit) {
525 if (count < PTRACE_HBP_ADDR_SZ)
527 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
528 offset, offset + PTRACE_HBP_ADDR_SZ);
531 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
534 offset += PTRACE_HBP_ADDR_SZ;
538 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
539 offset, offset + PTRACE_HBP_CTRL_SZ);
542 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
545 offset += PTRACE_HBP_CTRL_SZ;
547 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
549 offset + PTRACE_HBP_PAD_SZ);
552 offset += PTRACE_HBP_PAD_SZ;
558 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
560 static int gpr_get(struct task_struct *target,
561 const struct user_regset *regset,
564 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
565 return membuf_write(&to, uregs, sizeof(*uregs));
568 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
569 unsigned int pos, unsigned int count,
570 const void *kbuf, const void __user *ubuf)
573 struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
575 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
579 if (!valid_user_regs(&newregs, target))
582 task_pt_regs(target)->user_regs = newregs;
586 static int fpr_active(struct task_struct *target, const struct user_regset *regset)
588 if (!system_supports_fpsimd())
594 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
596 static int __fpr_get(struct task_struct *target,
597 const struct user_regset *regset,
600 struct user_fpsimd_state *uregs;
602 sve_sync_to_fpsimd(target);
604 uregs = &target->thread.uw.fpsimd_state;
606 return membuf_write(&to, uregs, sizeof(*uregs));
609 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
612 if (!system_supports_fpsimd())
615 if (target == current)
616 fpsimd_preserve_current_state();
618 return __fpr_get(target, regset, to);
621 static int __fpr_set(struct task_struct *target,
622 const struct user_regset *regset,
623 unsigned int pos, unsigned int count,
624 const void *kbuf, const void __user *ubuf,
625 unsigned int start_pos)
628 struct user_fpsimd_state newstate;
631 * Ensure target->thread.uw.fpsimd_state is up to date, so that a
632 * short copyin can't resurrect stale data.
634 sve_sync_to_fpsimd(target);
636 newstate = target->thread.uw.fpsimd_state;
638 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate,
639 start_pos, start_pos + sizeof(newstate));
643 target->thread.uw.fpsimd_state = newstate;
648 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
649 unsigned int pos, unsigned int count,
650 const void *kbuf, const void __user *ubuf)
654 if (!system_supports_fpsimd())
657 ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, 0);
661 sve_sync_from_fpsimd_zeropad(target);
662 fpsimd_flush_task_state(target);
667 static int tls_get(struct task_struct *target, const struct user_regset *regset,
670 if (target == current)
671 tls_preserve_current_state();
673 return membuf_store(&to, target->thread.uw.tp_value);
676 static int tls_set(struct task_struct *target, const struct user_regset *regset,
677 unsigned int pos, unsigned int count,
678 const void *kbuf, const void __user *ubuf)
681 unsigned long tls = target->thread.uw.tp_value;
683 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
687 target->thread.uw.tp_value = tls;
691 static int system_call_get(struct task_struct *target,
692 const struct user_regset *regset,
695 return membuf_store(&to, task_pt_regs(target)->syscallno);
698 static int system_call_set(struct task_struct *target,
699 const struct user_regset *regset,
700 unsigned int pos, unsigned int count,
701 const void *kbuf, const void __user *ubuf)
703 int syscallno = task_pt_regs(target)->syscallno;
706 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
710 task_pt_regs(target)->syscallno = syscallno;
714 #ifdef CONFIG_ARM64_SVE
716 static void sve_init_header_from_task(struct user_sve_header *header,
717 struct task_struct *target)
721 memset(header, 0, sizeof(*header));
723 header->flags = test_tsk_thread_flag(target, TIF_SVE) ?
724 SVE_PT_REGS_SVE : SVE_PT_REGS_FPSIMD;
725 if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT))
726 header->flags |= SVE_PT_VL_INHERIT;
728 header->vl = target->thread.sve_vl;
729 vq = sve_vq_from_vl(header->vl);
731 header->max_vl = sve_max_vl;
732 header->size = SVE_PT_SIZE(vq, header->flags);
733 header->max_size = SVE_PT_SIZE(sve_vq_from_vl(header->max_vl),
737 static unsigned int sve_size_from_header(struct user_sve_header const *header)
739 return ALIGN(header->size, SVE_VQ_BYTES);
742 static int sve_get(struct task_struct *target,
743 const struct user_regset *regset,
746 struct user_sve_header header;
748 unsigned long start, end;
750 if (!system_supports_sve())
754 sve_init_header_from_task(&header, target);
755 vq = sve_vq_from_vl(header.vl);
757 membuf_write(&to, &header, sizeof(header));
759 if (target == current)
760 fpsimd_preserve_current_state();
762 /* Registers: FPSIMD-only case */
764 BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
765 if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD)
766 return __fpr_get(target, regset, to);
768 /* Otherwise: full SVE case */
770 BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
771 start = SVE_PT_SVE_OFFSET;
772 end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
773 membuf_write(&to, target->thread.sve_state, end - start);
776 end = SVE_PT_SVE_FPSR_OFFSET(vq);
777 membuf_zero(&to, end - start);
780 * Copy fpsr, and fpcr which must follow contiguously in
781 * struct fpsimd_state:
784 end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
785 membuf_write(&to, &target->thread.uw.fpsimd_state.fpsr, end - start);
788 end = sve_size_from_header(&header);
789 return membuf_zero(&to, end - start);
792 static int sve_set(struct task_struct *target,
793 const struct user_regset *regset,
794 unsigned int pos, unsigned int count,
795 const void *kbuf, const void __user *ubuf)
798 struct user_sve_header header;
800 unsigned long start, end;
802 if (!system_supports_sve())
806 if (count < sizeof(header))
808 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &header,
814 * Apart from SVE_PT_REGS_MASK, all SVE_PT_* flags are consumed by
815 * sve_set_vector_length(), which will also validate them for us:
817 ret = sve_set_vector_length(target, header.vl,
818 ((unsigned long)header.flags & ~SVE_PT_REGS_MASK) << 16);
822 /* Actual VL set may be less than the user asked for: */
823 vq = sve_vq_from_vl(target->thread.sve_vl);
825 /* Registers: FPSIMD-only case */
827 BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
828 if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD) {
829 ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,
830 SVE_PT_FPSIMD_OFFSET);
831 clear_tsk_thread_flag(target, TIF_SVE);
835 /* Otherwise: full SVE case */
838 * If setting a different VL from the requested VL and there is
839 * register data, the data layout will be wrong: don't even
840 * try to set the registers in this case.
842 if (count && vq != sve_vq_from_vl(header.vl)) {
850 * Ensure target->thread.sve_state is up to date with target's
851 * FPSIMD regs, so that a short copyin leaves trailing registers
854 fpsimd_sync_to_sve(target);
855 set_tsk_thread_flag(target, TIF_SVE);
857 BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
858 start = SVE_PT_SVE_OFFSET;
859 end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
860 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
861 target->thread.sve_state,
867 end = SVE_PT_SVE_FPSR_OFFSET(vq);
868 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
874 * Copy fpsr, and fpcr which must follow contiguously in
875 * struct fpsimd_state:
878 end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
879 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
880 &target->thread.uw.fpsimd_state.fpsr,
884 fpsimd_flush_task_state(target);
888 #endif /* CONFIG_ARM64_SVE */
890 #ifdef CONFIG_ARM64_PTR_AUTH
891 static int pac_mask_get(struct task_struct *target,
892 const struct user_regset *regset,
896 * The PAC bits can differ across data and instruction pointers
897 * depending on TCR_EL1.TBID*, which we may make use of in future, so
898 * we expose separate masks.
900 unsigned long mask = ptrauth_user_pac_mask();
901 struct user_pac_mask uregs = {
906 if (!system_supports_address_auth())
909 return membuf_write(&to, &uregs, sizeof(uregs));
912 static int pac_enabled_keys_get(struct task_struct *target,
913 const struct user_regset *regset,
916 long enabled_keys = ptrauth_get_enabled_keys(target);
918 if (IS_ERR_VALUE(enabled_keys))
921 return membuf_write(&to, &enabled_keys, sizeof(enabled_keys));
924 static int pac_enabled_keys_set(struct task_struct *target,
925 const struct user_regset *regset,
926 unsigned int pos, unsigned int count,
927 const void *kbuf, const void __user *ubuf)
930 long enabled_keys = ptrauth_get_enabled_keys(target);
932 if (IS_ERR_VALUE(enabled_keys))
935 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &enabled_keys, 0,
940 return ptrauth_set_enabled_keys(target, PR_PAC_ENABLED_KEYS_MASK,
944 #ifdef CONFIG_CHECKPOINT_RESTORE
945 static __uint128_t pac_key_to_user(const struct ptrauth_key *key)
947 return (__uint128_t)key->hi << 64 | key->lo;
950 static struct ptrauth_key pac_key_from_user(__uint128_t ukey)
952 struct ptrauth_key key = {
953 .lo = (unsigned long)ukey,
954 .hi = (unsigned long)(ukey >> 64),
960 static void pac_address_keys_to_user(struct user_pac_address_keys *ukeys,
961 const struct ptrauth_keys_user *keys)
963 ukeys->apiakey = pac_key_to_user(&keys->apia);
964 ukeys->apibkey = pac_key_to_user(&keys->apib);
965 ukeys->apdakey = pac_key_to_user(&keys->apda);
966 ukeys->apdbkey = pac_key_to_user(&keys->apdb);
969 static void pac_address_keys_from_user(struct ptrauth_keys_user *keys,
970 const struct user_pac_address_keys *ukeys)
972 keys->apia = pac_key_from_user(ukeys->apiakey);
973 keys->apib = pac_key_from_user(ukeys->apibkey);
974 keys->apda = pac_key_from_user(ukeys->apdakey);
975 keys->apdb = pac_key_from_user(ukeys->apdbkey);
978 static int pac_address_keys_get(struct task_struct *target,
979 const struct user_regset *regset,
982 struct ptrauth_keys_user *keys = &target->thread.keys_user;
983 struct user_pac_address_keys user_keys;
985 if (!system_supports_address_auth())
988 pac_address_keys_to_user(&user_keys, keys);
990 return membuf_write(&to, &user_keys, sizeof(user_keys));
993 static int pac_address_keys_set(struct task_struct *target,
994 const struct user_regset *regset,
995 unsigned int pos, unsigned int count,
996 const void *kbuf, const void __user *ubuf)
998 struct ptrauth_keys_user *keys = &target->thread.keys_user;
999 struct user_pac_address_keys user_keys;
1002 if (!system_supports_address_auth())
1005 pac_address_keys_to_user(&user_keys, keys);
1006 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1010 pac_address_keys_from_user(keys, &user_keys);
1015 static void pac_generic_keys_to_user(struct user_pac_generic_keys *ukeys,
1016 const struct ptrauth_keys_user *keys)
1018 ukeys->apgakey = pac_key_to_user(&keys->apga);
1021 static void pac_generic_keys_from_user(struct ptrauth_keys_user *keys,
1022 const struct user_pac_generic_keys *ukeys)
1024 keys->apga = pac_key_from_user(ukeys->apgakey);
1027 static int pac_generic_keys_get(struct task_struct *target,
1028 const struct user_regset *regset,
1031 struct ptrauth_keys_user *keys = &target->thread.keys_user;
1032 struct user_pac_generic_keys user_keys;
1034 if (!system_supports_generic_auth())
1037 pac_generic_keys_to_user(&user_keys, keys);
1039 return membuf_write(&to, &user_keys, sizeof(user_keys));
1042 static int pac_generic_keys_set(struct task_struct *target,
1043 const struct user_regset *regset,
1044 unsigned int pos, unsigned int count,
1045 const void *kbuf, const void __user *ubuf)
1047 struct ptrauth_keys_user *keys = &target->thread.keys_user;
1048 struct user_pac_generic_keys user_keys;
1051 if (!system_supports_generic_auth())
1054 pac_generic_keys_to_user(&user_keys, keys);
1055 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1059 pac_generic_keys_from_user(keys, &user_keys);
1063 #endif /* CONFIG_CHECKPOINT_RESTORE */
1064 #endif /* CONFIG_ARM64_PTR_AUTH */
1066 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
1067 static int tagged_addr_ctrl_get(struct task_struct *target,
1068 const struct user_regset *regset,
1071 long ctrl = get_tagged_addr_ctrl(target);
1073 if (IS_ERR_VALUE(ctrl))
1076 return membuf_write(&to, &ctrl, sizeof(ctrl));
1079 static int tagged_addr_ctrl_set(struct task_struct *target, const struct
1080 user_regset *regset, unsigned int pos,
1081 unsigned int count, const void *kbuf, const
1087 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1);
1091 return set_tagged_addr_ctrl(target, ctrl);
1095 enum aarch64_regset {
1099 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1104 #ifdef CONFIG_ARM64_SVE
1107 #ifdef CONFIG_ARM64_PTR_AUTH
1109 REGSET_PAC_ENABLED_KEYS,
1110 #ifdef CONFIG_CHECKPOINT_RESTORE
1115 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
1116 REGSET_TAGGED_ADDR_CTRL,
1120 static const struct user_regset aarch64_regsets[] = {
1122 .core_note_type = NT_PRSTATUS,
1123 .n = sizeof(struct user_pt_regs) / sizeof(u64),
1124 .size = sizeof(u64),
1125 .align = sizeof(u64),
1126 .regset_get = gpr_get,
1130 .core_note_type = NT_PRFPREG,
1131 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
1133 * We pretend we have 32-bit registers because the fpsr and
1134 * fpcr are 32-bits wide.
1136 .size = sizeof(u32),
1137 .align = sizeof(u32),
1138 .active = fpr_active,
1139 .regset_get = fpr_get,
1143 .core_note_type = NT_ARM_TLS,
1145 .size = sizeof(void *),
1146 .align = sizeof(void *),
1147 .regset_get = tls_get,
1150 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1151 [REGSET_HW_BREAK] = {
1152 .core_note_type = NT_ARM_HW_BREAK,
1153 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1154 .size = sizeof(u32),
1155 .align = sizeof(u32),
1156 .regset_get = hw_break_get,
1157 .set = hw_break_set,
1159 [REGSET_HW_WATCH] = {
1160 .core_note_type = NT_ARM_HW_WATCH,
1161 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1162 .size = sizeof(u32),
1163 .align = sizeof(u32),
1164 .regset_get = hw_break_get,
1165 .set = hw_break_set,
1168 [REGSET_SYSTEM_CALL] = {
1169 .core_note_type = NT_ARM_SYSTEM_CALL,
1171 .size = sizeof(int),
1172 .align = sizeof(int),
1173 .regset_get = system_call_get,
1174 .set = system_call_set,
1176 #ifdef CONFIG_ARM64_SVE
1177 [REGSET_SVE] = { /* Scalable Vector Extension */
1178 .core_note_type = NT_ARM_SVE,
1179 .n = DIV_ROUND_UP(SVE_PT_SIZE(SVE_VQ_MAX, SVE_PT_REGS_SVE),
1181 .size = SVE_VQ_BYTES,
1182 .align = SVE_VQ_BYTES,
1183 .regset_get = sve_get,
1187 #ifdef CONFIG_ARM64_PTR_AUTH
1188 [REGSET_PAC_MASK] = {
1189 .core_note_type = NT_ARM_PAC_MASK,
1190 .n = sizeof(struct user_pac_mask) / sizeof(u64),
1191 .size = sizeof(u64),
1192 .align = sizeof(u64),
1193 .regset_get = pac_mask_get,
1194 /* this cannot be set dynamically */
1196 [REGSET_PAC_ENABLED_KEYS] = {
1197 .core_note_type = NT_ARM_PAC_ENABLED_KEYS,
1199 .size = sizeof(long),
1200 .align = sizeof(long),
1201 .regset_get = pac_enabled_keys_get,
1202 .set = pac_enabled_keys_set,
1204 #ifdef CONFIG_CHECKPOINT_RESTORE
1205 [REGSET_PACA_KEYS] = {
1206 .core_note_type = NT_ARM_PACA_KEYS,
1207 .n = sizeof(struct user_pac_address_keys) / sizeof(__uint128_t),
1208 .size = sizeof(__uint128_t),
1209 .align = sizeof(__uint128_t),
1210 .regset_get = pac_address_keys_get,
1211 .set = pac_address_keys_set,
1213 [REGSET_PACG_KEYS] = {
1214 .core_note_type = NT_ARM_PACG_KEYS,
1215 .n = sizeof(struct user_pac_generic_keys) / sizeof(__uint128_t),
1216 .size = sizeof(__uint128_t),
1217 .align = sizeof(__uint128_t),
1218 .regset_get = pac_generic_keys_get,
1219 .set = pac_generic_keys_set,
1223 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
1224 [REGSET_TAGGED_ADDR_CTRL] = {
1225 .core_note_type = NT_ARM_TAGGED_ADDR_CTRL,
1227 .size = sizeof(long),
1228 .align = sizeof(long),
1229 .regset_get = tagged_addr_ctrl_get,
1230 .set = tagged_addr_ctrl_set,
1235 static const struct user_regset_view user_aarch64_view = {
1236 .name = "aarch64", .e_machine = EM_AARCH64,
1237 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
1240 #ifdef CONFIG_COMPAT
1241 enum compat_regset {
1246 static inline compat_ulong_t compat_get_user_reg(struct task_struct *task, int idx)
1248 struct pt_regs *regs = task_pt_regs(task);
1254 return pstate_to_compat_psr(regs->pstate);
1256 return regs->orig_x0;
1258 return regs->regs[idx];
1262 static int compat_gpr_get(struct task_struct *target,
1263 const struct user_regset *regset,
1269 membuf_store(&to, compat_get_user_reg(target, i++));
1273 static int compat_gpr_set(struct task_struct *target,
1274 const struct user_regset *regset,
1275 unsigned int pos, unsigned int count,
1276 const void *kbuf, const void __user *ubuf)
1278 struct pt_regs newregs;
1280 unsigned int i, start, num_regs;
1282 /* Calculate the number of AArch32 registers contained in count */
1283 num_regs = count / regset->size;
1285 /* Convert pos into an register number */
1286 start = pos / regset->size;
1288 if (start + num_regs > regset->n)
1291 newregs = *task_pt_regs(target);
1293 for (i = 0; i < num_regs; ++i) {
1294 unsigned int idx = start + i;
1298 memcpy(®, kbuf, sizeof(reg));
1299 kbuf += sizeof(reg);
1301 ret = copy_from_user(®, ubuf, sizeof(reg));
1307 ubuf += sizeof(reg);
1315 reg = compat_psr_to_pstate(reg);
1316 newregs.pstate = reg;
1319 newregs.orig_x0 = reg;
1322 newregs.regs[idx] = reg;
1327 if (valid_user_regs(&newregs.user_regs, target))
1328 *task_pt_regs(target) = newregs;
1335 static int compat_vfp_get(struct task_struct *target,
1336 const struct user_regset *regset,
1339 struct user_fpsimd_state *uregs;
1340 compat_ulong_t fpscr;
1342 if (!system_supports_fpsimd())
1345 uregs = &target->thread.uw.fpsimd_state;
1347 if (target == current)
1348 fpsimd_preserve_current_state();
1351 * The VFP registers are packed into the fpsimd_state, so they all sit
1352 * nicely together for us. We just need to create the fpscr separately.
1354 membuf_write(&to, uregs, VFP_STATE_SIZE - sizeof(compat_ulong_t));
1355 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
1356 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
1357 return membuf_store(&to, fpscr);
1360 static int compat_vfp_set(struct task_struct *target,
1361 const struct user_regset *regset,
1362 unsigned int pos, unsigned int count,
1363 const void *kbuf, const void __user *ubuf)
1365 struct user_fpsimd_state *uregs;
1366 compat_ulong_t fpscr;
1367 int ret, vregs_end_pos;
1369 if (!system_supports_fpsimd())
1372 uregs = &target->thread.uw.fpsimd_state;
1374 vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t);
1375 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
1378 if (count && !ret) {
1379 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fpscr,
1380 vregs_end_pos, VFP_STATE_SIZE);
1382 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
1383 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
1387 fpsimd_flush_task_state(target);
1391 static int compat_tls_get(struct task_struct *target,
1392 const struct user_regset *regset,
1395 return membuf_store(&to, (compat_ulong_t)target->thread.uw.tp_value);
1398 static int compat_tls_set(struct task_struct *target,
1399 const struct user_regset *regset, unsigned int pos,
1400 unsigned int count, const void *kbuf,
1401 const void __user *ubuf)
1404 compat_ulong_t tls = target->thread.uw.tp_value;
1406 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
1410 target->thread.uw.tp_value = tls;
1414 static const struct user_regset aarch32_regsets[] = {
1415 [REGSET_COMPAT_GPR] = {
1416 .core_note_type = NT_PRSTATUS,
1417 .n = COMPAT_ELF_NGREG,
1418 .size = sizeof(compat_elf_greg_t),
1419 .align = sizeof(compat_elf_greg_t),
1420 .regset_get = compat_gpr_get,
1421 .set = compat_gpr_set
1423 [REGSET_COMPAT_VFP] = {
1424 .core_note_type = NT_ARM_VFP,
1425 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1426 .size = sizeof(compat_ulong_t),
1427 .align = sizeof(compat_ulong_t),
1428 .active = fpr_active,
1429 .regset_get = compat_vfp_get,
1430 .set = compat_vfp_set
1434 static const struct user_regset_view user_aarch32_view = {
1435 .name = "aarch32", .e_machine = EM_ARM,
1436 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
1439 static const struct user_regset aarch32_ptrace_regsets[] = {
1441 .core_note_type = NT_PRSTATUS,
1442 .n = COMPAT_ELF_NGREG,
1443 .size = sizeof(compat_elf_greg_t),
1444 .align = sizeof(compat_elf_greg_t),
1445 .regset_get = compat_gpr_get,
1446 .set = compat_gpr_set
1449 .core_note_type = NT_ARM_VFP,
1450 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1451 .size = sizeof(compat_ulong_t),
1452 .align = sizeof(compat_ulong_t),
1453 .regset_get = compat_vfp_get,
1454 .set = compat_vfp_set
1457 .core_note_type = NT_ARM_TLS,
1459 .size = sizeof(compat_ulong_t),
1460 .align = sizeof(compat_ulong_t),
1461 .regset_get = compat_tls_get,
1462 .set = compat_tls_set,
1464 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1465 [REGSET_HW_BREAK] = {
1466 .core_note_type = NT_ARM_HW_BREAK,
1467 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1468 .size = sizeof(u32),
1469 .align = sizeof(u32),
1470 .regset_get = hw_break_get,
1471 .set = hw_break_set,
1473 [REGSET_HW_WATCH] = {
1474 .core_note_type = NT_ARM_HW_WATCH,
1475 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1476 .size = sizeof(u32),
1477 .align = sizeof(u32),
1478 .regset_get = hw_break_get,
1479 .set = hw_break_set,
1482 [REGSET_SYSTEM_CALL] = {
1483 .core_note_type = NT_ARM_SYSTEM_CALL,
1485 .size = sizeof(int),
1486 .align = sizeof(int),
1487 .regset_get = system_call_get,
1488 .set = system_call_set,
1492 static const struct user_regset_view user_aarch32_ptrace_view = {
1493 .name = "aarch32", .e_machine = EM_ARM,
1494 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
1497 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
1498 compat_ulong_t __user *ret)
1505 if (off == COMPAT_PT_TEXT_ADDR)
1506 tmp = tsk->mm->start_code;
1507 else if (off == COMPAT_PT_DATA_ADDR)
1508 tmp = tsk->mm->start_data;
1509 else if (off == COMPAT_PT_TEXT_END_ADDR)
1510 tmp = tsk->mm->end_code;
1511 else if (off < sizeof(compat_elf_gregset_t))
1512 tmp = compat_get_user_reg(tsk, off >> 2);
1513 else if (off >= COMPAT_USER_SZ)
1518 return put_user(tmp, ret);
1521 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
1524 struct pt_regs newregs = *task_pt_regs(tsk);
1525 unsigned int idx = off / 4;
1527 if (off & 3 || off >= COMPAT_USER_SZ)
1530 if (off >= sizeof(compat_elf_gregset_t))
1538 newregs.pstate = compat_psr_to_pstate(val);
1541 newregs.orig_x0 = val;
1544 newregs.regs[idx] = val;
1547 if (!valid_user_regs(&newregs.user_regs, tsk))
1550 *task_pt_regs(tsk) = newregs;
1554 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1557 * Convert a virtual register number into an index for a thread_info
1558 * breakpoint array. Breakpoints are identified using positive numbers
1559 * whilst watchpoints are negative. The registers are laid out as pairs
1560 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1561 * Register 0 is reserved for describing resource information.
1563 static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1565 return (abs(num) - 1) >> 1;
1568 static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1570 u8 num_brps, num_wrps, debug_arch, wp_len;
1573 num_brps = hw_breakpoint_slots(TYPE_INST);
1574 num_wrps = hw_breakpoint_slots(TYPE_DATA);
1576 debug_arch = debug_monitors_arch();
1590 static int compat_ptrace_hbp_get(unsigned int note_type,
1591 struct task_struct *tsk,
1598 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1601 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1604 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1611 static int compat_ptrace_hbp_set(unsigned int note_type,
1612 struct task_struct *tsk,
1619 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1623 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1626 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1632 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1633 compat_ulong_t __user *data)
1640 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1642 } else if (num == 0) {
1643 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1646 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1650 ret = put_user(kdata, data);
1655 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1656 compat_ulong_t __user *data)
1664 ret = get_user(kdata, data);
1669 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1671 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1675 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1677 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1678 compat_ulong_t caddr, compat_ulong_t cdata)
1680 unsigned long addr = caddr;
1681 unsigned long data = cdata;
1682 void __user *datap = compat_ptr(data);
1686 case PTRACE_PEEKUSR:
1687 ret = compat_ptrace_read_user(child, addr, datap);
1690 case PTRACE_POKEUSR:
1691 ret = compat_ptrace_write_user(child, addr, data);
1694 case COMPAT_PTRACE_GETREGS:
1695 ret = copy_regset_to_user(child,
1698 0, sizeof(compat_elf_gregset_t),
1702 case COMPAT_PTRACE_SETREGS:
1703 ret = copy_regset_from_user(child,
1706 0, sizeof(compat_elf_gregset_t),
1710 case COMPAT_PTRACE_GET_THREAD_AREA:
1711 ret = put_user((compat_ulong_t)child->thread.uw.tp_value,
1712 (compat_ulong_t __user *)datap);
1715 case COMPAT_PTRACE_SET_SYSCALL:
1716 task_pt_regs(child)->syscallno = data;
1720 case COMPAT_PTRACE_GETVFPREGS:
1721 ret = copy_regset_to_user(child,
1728 case COMPAT_PTRACE_SETVFPREGS:
1729 ret = copy_regset_from_user(child,
1736 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1737 case COMPAT_PTRACE_GETHBPREGS:
1738 ret = compat_ptrace_gethbpregs(child, addr, datap);
1741 case COMPAT_PTRACE_SETHBPREGS:
1742 ret = compat_ptrace_sethbpregs(child, addr, datap);
1747 ret = compat_ptrace_request(child, request, addr,
1754 #endif /* CONFIG_COMPAT */
1756 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1758 #ifdef CONFIG_COMPAT
1760 * Core dumping of 32-bit tasks or compat ptrace requests must use the
1761 * user_aarch32_view compatible with arm32. Native ptrace requests on
1762 * 32-bit children use an extended user_aarch32_ptrace_view to allow
1763 * access to the TLS register.
1765 if (is_compat_task())
1766 return &user_aarch32_view;
1767 else if (is_compat_thread(task_thread_info(task)))
1768 return &user_aarch32_ptrace_view;
1770 return &user_aarch64_view;
1773 long arch_ptrace(struct task_struct *child, long request,
1774 unsigned long addr, unsigned long data)
1777 case PTRACE_PEEKMTETAGS:
1778 case PTRACE_POKEMTETAGS:
1779 return mte_ptrace_copy_tags(child, request, addr, data);
1782 return ptrace_request(child, request, addr, data);
1785 enum ptrace_syscall_dir {
1786 PTRACE_SYSCALL_ENTER = 0,
1787 PTRACE_SYSCALL_EXIT,
1790 static void tracehook_report_syscall(struct pt_regs *regs,
1791 enum ptrace_syscall_dir dir)
1794 unsigned long saved_reg;
1797 * We have some ABI weirdness here in the way that we handle syscall
1798 * exit stops because we indicate whether or not the stop has been
1799 * signalled from syscall entry or syscall exit by clobbering a general
1800 * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee
1801 * and restoring its old value after the stop. This means that:
1803 * - Any writes by the tracer to this register during the stop are
1804 * ignored/discarded.
1806 * - The actual value of the register is not available during the stop,
1807 * so the tracer cannot save it and restore it later.
1809 * - Syscall stops behave differently to seccomp and pseudo-step traps
1810 * (the latter do not nobble any registers).
1812 regno = (is_compat_task() ? 12 : 7);
1813 saved_reg = regs->regs[regno];
1814 regs->regs[regno] = dir;
1816 if (dir == PTRACE_SYSCALL_ENTER) {
1817 if (tracehook_report_syscall_entry(regs))
1818 forget_syscall(regs);
1819 regs->regs[regno] = saved_reg;
1820 } else if (!test_thread_flag(TIF_SINGLESTEP)) {
1821 tracehook_report_syscall_exit(regs, 0);
1822 regs->regs[regno] = saved_reg;
1824 regs->regs[regno] = saved_reg;
1827 * Signal a pseudo-step exception since we are stepping but
1828 * tracer modifications to the registers may have rewound the
1831 tracehook_report_syscall_exit(regs, 1);
1835 int syscall_trace_enter(struct pt_regs *regs)
1837 unsigned long flags = READ_ONCE(current_thread_info()->flags);
1839 if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) {
1840 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
1841 if (flags & _TIF_SYSCALL_EMU)
1845 /* Do the secure computing after ptrace; failures should be fast. */
1846 if (secure_computing() == -1)
1849 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1850 trace_sys_enter(regs, regs->syscallno);
1852 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
1853 regs->regs[2], regs->regs[3]);
1855 return regs->syscallno;
1858 void syscall_trace_exit(struct pt_regs *regs)
1860 unsigned long flags = READ_ONCE(current_thread_info()->flags);
1862 audit_syscall_exit(regs);
1864 if (flags & _TIF_SYSCALL_TRACEPOINT)
1865 trace_sys_exit(regs, regs_return_value(regs));
1867 if (flags & (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP))
1868 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1874 * SPSR_ELx bits which are always architecturally RES0 per ARM DDI 0487D.a.
1875 * We permit userspace to set SSBS (AArch64 bit 12, AArch32 bit 23) which is
1876 * not described in ARM DDI 0487D.a.
1877 * We treat PAN and UAO as RES0 bits, as they are meaningless at EL0, and may
1878 * be allocated an EL0 meaning in future.
1879 * Userspace cannot use these until they have an architectural meaning.
1880 * Note that this follows the SPSR_ELx format, not the AArch32 PSR format.
1881 * We also reserve IL for the kernel; SS is handled dynamically.
1883 #define SPSR_EL1_AARCH64_RES0_BITS \
1884 (GENMASK_ULL(63, 32) | GENMASK_ULL(27, 26) | GENMASK_ULL(23, 22) | \
1885 GENMASK_ULL(20, 13) | GENMASK_ULL(5, 5))
1886 #define SPSR_EL1_AARCH32_RES0_BITS \
1887 (GENMASK_ULL(63, 32) | GENMASK_ULL(22, 22) | GENMASK_ULL(20, 20))
1889 static int valid_compat_regs(struct user_pt_regs *regs)
1891 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
1893 if (!system_supports_mixed_endian_el0()) {
1894 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1895 regs->pstate |= PSR_AA32_E_BIT;
1897 regs->pstate &= ~PSR_AA32_E_BIT;
1900 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
1901 (regs->pstate & PSR_AA32_A_BIT) == 0 &&
1902 (regs->pstate & PSR_AA32_I_BIT) == 0 &&
1903 (regs->pstate & PSR_AA32_F_BIT) == 0) {
1908 * Force PSR to a valid 32-bit EL0t, preserving the same bits as
1911 regs->pstate &= PSR_AA32_N_BIT | PSR_AA32_Z_BIT |
1912 PSR_AA32_C_BIT | PSR_AA32_V_BIT |
1913 PSR_AA32_Q_BIT | PSR_AA32_IT_MASK |
1914 PSR_AA32_GE_MASK | PSR_AA32_E_BIT |
1916 regs->pstate |= PSR_MODE32_BIT;
1921 static int valid_native_regs(struct user_pt_regs *regs)
1923 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
1925 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
1926 (regs->pstate & PSR_D_BIT) == 0 &&
1927 (regs->pstate & PSR_A_BIT) == 0 &&
1928 (regs->pstate & PSR_I_BIT) == 0 &&
1929 (regs->pstate & PSR_F_BIT) == 0) {
1933 /* Force PSR to a valid 64-bit EL0t */
1934 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
1940 * Are the current registers suitable for user mode? (used to maintain
1941 * security in signal handlers)
1943 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1945 /* https://lore.kernel.org/lkml/20191118131525.GA4180@willie-the-truck */
1946 user_regs_reset_single_step(regs, task);
1948 if (is_compat_thread(task_thread_info(task)))
1949 return valid_compat_regs(regs);
1951 return valid_native_regs(regs);