1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * FP/SIMD state saving and restoring
5 * Copyright (C) 2012 ARM Ltd.
6 * Author: Catalin Marinas <catalin.marinas@arm.com>
9 #include <linux/linkage.h>
11 #include <asm/assembler.h>
12 #include <asm/fpsimdmacros.h>
15 * Save the FP registers.
17 * x0 - pointer to struct fpsimd_state
19 SYM_FUNC_START(fpsimd_save_state)
22 SYM_FUNC_END(fpsimd_save_state)
25 * Load the FP registers.
27 * x0 - pointer to struct fpsimd_state
29 SYM_FUNC_START(fpsimd_load_state)
32 SYM_FUNC_END(fpsimd_load_state)
34 #ifdef CONFIG_ARM64_SVE
39 * x0 - pointer to buffer for state
40 * x1 - pointer to storage for FPSR
42 SYM_FUNC_START(sve_save_state)
45 SYM_FUNC_END(sve_save_state)
50 * x0 - pointer to buffer for state
51 * x1 - pointer to storage for FPSR
54 SYM_FUNC_START(sve_load_state)
55 sve_load 0, x1, x2, 3, x4
57 SYM_FUNC_END(sve_load_state)
59 SYM_FUNC_START(sve_get_vl)
62 SYM_FUNC_END(sve_get_vl)
64 SYM_FUNC_START(sve_set_vq)
65 sve_load_vq x0, x1, x2
67 SYM_FUNC_END(sve_set_vq)
70 * Load SVE state from FPSIMD state.
72 * x0 = pointer to struct fpsimd_state
75 * Each SVE vector will be loaded with the first 128-bits taken from FPSIMD
76 * and the rest zeroed. All the other SVE registers will be zeroed.
78 SYM_FUNC_START(sve_load_from_fpsimd_state)
79 sve_load_vq x1, x2, x3
83 SYM_FUNC_END(sve_load_from_fpsimd_state)
86 * Zero all SVE registers but the first 128-bits of each vector
88 * VQ must already be configured by caller, any further updates of VQ
89 * will need to ensure that the register state remains valid.
93 SYM_FUNC_START(sve_flush_live)
94 cbz x0, 1f // A VQ-1 of 0 is 128 bits so no extra Z state
98 SYM_FUNC_END(sve_flush_live)
100 #endif /* CONFIG_ARM64_SVE */