arch/arm64/include/asm/processor.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Based on arch/arm/include/asm/processor.h
   4  *
   5  * Copyright (C) 1995-1999 Russell King
   6  * Copyright (C) 2012 ARM Ltd.
   7  */
   8 #ifndef __ASM_PROCESSOR_H
   9 #define __ASM_PROCESSOR_H
  10
  11 #define KERNEL_DS               UL(-1)
  12 #define USER_DS                 ((UL(1) << VA_BITS) - 1)
  13
  14 /*
  15  * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
  16  * no point in shifting all network buffers by 2 bytes just to make some IP
  17  * header fields appear aligned in memory, potentially sacrificing some DMA
  18  * performance on some platforms.
  19  */
  20 #define NET_IP_ALIGN    0
  21
  22 #ifndef __ASSEMBLY__
  23
  24 #include <linux/build_bug.h>
  25 #include <linux/cache.h>
  26 #include <linux/init.h>
  27 #include <linux/stddef.h>
  28 #include <linux/string.h>
  29 #include <linux/thread_info.h>
  30
  31 #include <asm/alternative.h>
  32 #include <asm/cpufeature.h>
  33 #include <asm/hw_breakpoint.h>
  34 #include <asm/kasan.h>
  35 #include <asm/lse.h>
  36 #include <asm/pgtable-hwdef.h>
  37 #include <asm/pointer_auth.h>
  38 #include <asm/ptrace.h>
  39 #include <asm/types.h>
  40
  41 /*
  42  * TASK_SIZE - the maximum size of a user space task.
  43  * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
  44  */
  45
  46 #define DEFAULT_MAP_WINDOW_64   (UL(1) << VA_BITS_MIN)
  47 #define TASK_SIZE_64            (UL(1) << vabits_actual)
  48
  49 #ifdef CONFIG_COMPAT
  50 #if defined(CONFIG_ARM64_64K_PAGES) && defined(CONFIG_KUSER_HELPERS)
  51 /*
  52  * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
  53  * by the compat vectors page.
  54  */
  55 #define TASK_SIZE_32            UL(0x100000000)
  56 #else
  57 #define TASK_SIZE_32            (UL(0x100000000) - PAGE_SIZE)
  58 #endif /* CONFIG_ARM64_64K_PAGES */
  59 #define TASK_SIZE               (test_thread_flag(TIF_32BIT) ? \
  60                                 TASK_SIZE_32 : TASK_SIZE_64)
  61 #define TASK_SIZE_OF(tsk)       (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
  62                                 TASK_SIZE_32 : TASK_SIZE_64)
  63 #define DEFAULT_MAP_WINDOW      (test_thread_flag(TIF_32BIT) ? \
  64                                 TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
  65 #else
  66 #define TASK_SIZE               TASK_SIZE_64
  67 #define DEFAULT_MAP_WINDOW      DEFAULT_MAP_WINDOW_64
  68 #endif /* CONFIG_COMPAT */
  69
  70 #ifdef CONFIG_ARM64_FORCE_52BIT
  71 #define STACK_TOP_MAX           TASK_SIZE_64
  72 #define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 4))
  73 #else
  74 #define STACK_TOP_MAX           DEFAULT_MAP_WINDOW_64
  75 #define TASK_UNMAPPED_BASE      (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
  76 #endif /* CONFIG_ARM64_FORCE_52BIT */
  77
  78 #ifdef CONFIG_COMPAT
  79 #define AARCH32_VECTORS_BASE    0xffff0000
  80 #define STACK_TOP               (test_thread_flag(TIF_32BIT) ? \
  81                                 AARCH32_VECTORS_BASE : STACK_TOP_MAX)
  82 #else
  83 #define STACK_TOP               STACK_TOP_MAX
  84 #endif /* CONFIG_COMPAT */
  85
  86 #ifndef CONFIG_ARM64_FORCE_52BIT
  87 #define arch_get_mmap_end(addr) ((addr > DEFAULT_MAP_WINDOW) ? TASK_SIZE :\
  88                                 DEFAULT_MAP_WINDOW)
  89
  90 #define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
  91                                         base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
  92                                         base)
  93 #endif /* CONFIG_ARM64_FORCE_52BIT */
  94
  95 extern phys_addr_t arm64_dma_phys_limit;
  96 #define ARCH_LOW_ADDRESS_LIMIT  (arm64_dma_phys_limit - 1)
  97
  98 struct debug_info {
  99 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 100         /* Have we suspended stepping by a debugger? */
 101         int                     suspended_step;
 102         /* Allow breakpoints and watchpoints to be disabled for this thread. */
 103         int                     bps_disabled;
 104         int                     wps_disabled;
 105         /* Hardware breakpoints pinned to this task. */
 106         struct perf_event       *hbp_break[ARM_MAX_BRP];
 107         struct perf_event       *hbp_watch[ARM_MAX_WRP];
 108 #endif
 109 };
 110
 111 struct cpu_context {
 112         unsigned long x19;
 113         unsigned long x20;
 114         unsigned long x21;
 115         unsigned long x22;
 116         unsigned long x23;
 117         unsigned long x24;
 118         unsigned long x25;
 119         unsigned long x26;
 120         unsigned long x27;
 121         unsigned long x28;
 122         unsigned long fp;
 123         unsigned long sp;
 124         unsigned long pc;
 125 };
 126
 127 struct thread_struct {
 128         struct cpu_context      cpu_context;    /* cpu context */
 129
 130         /*
 131          * Whitelisted fields for hardened usercopy:
 132          * Maintainers must ensure manually that this contains no
 133          * implicit padding.
 134          */
 135         struct {
 136                 unsigned long   tp_value;       /* TLS register */
 137                 unsigned long   tp2_value;
 138                 struct user_fpsimd_state fpsimd_state;
 139         } uw;
 140
 141         unsigned int            fpsimd_cpu;
 142         void                    *sve_state;     /* SVE registers, if any */
 143         unsigned int            sve_vl;         /* SVE vector length */
 144         unsigned int            sve_vl_onexec;  /* SVE vl after next exec */
 145         unsigned long           fault_address;  /* fault info */
 146         unsigned long           fault_code;     /* ESR_EL1 value */
 147         struct debug_info       debug;          /* debugging */
 148 #ifdef CONFIG_ARM64_PTR_AUTH
 149         struct ptrauth_keys_user        keys_user;
 150         struct ptrauth_keys_kernel      keys_kernel;
 151 #endif
 152 };
 153
 154 static inline void arch_thread_struct_whitelist(unsigned long *offset,
 155                                                 unsigned long *size)
 156 {
 157         /* Verify that there is no padding among the whitelisted fields: */
 158         BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
 159                      sizeof_field(struct thread_struct, uw.tp_value) +
 160                      sizeof_field(struct thread_struct, uw.tp2_value) +
 161                      sizeof_field(struct thread_struct, uw.fpsimd_state));
 162
 163         *offset = offsetof(struct thread_struct, uw);
 164         *size = sizeof_field(struct thread_struct, uw);
 165 }
 166
 167 #ifdef CONFIG_COMPAT
 168 #define task_user_tls(t)                                                \
 169 ({                                                                      \
 170         unsigned long *__tls;                                           \
 171         if (is_compat_thread(task_thread_info(t)))                      \
 172                 __tls = &(t)->thread.uw.tp2_value;                      \
 173         else                                                            \
 174                 __tls = &(t)->thread.uw.tp_value;                       \
 175         __tls;                                                          \
 176  })
 177 #else
 178 #define task_user_tls(t)        (&(t)->thread.uw.tp_value)
 179 #endif
 180
 181 /* Sync TPIDR_EL0 back to thread_struct for current */
 182 void tls_preserve_current_state(void);
 183
 184 #define INIT_THREAD {                           \
 185         .fpsimd_cpu = NR_CPUS,                  \
 186 }
 187
 188 static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
 189 {
 190         memset(regs, 0, sizeof(*regs));
 191         forget_syscall(regs);
 192         regs->pc = pc;
 193
 194         if (system_uses_irq_prio_masking())
 195                 regs->pmr_save = GIC_PRIO_IRQON;
 196 }
 197
 198 static inline void set_ssbs_bit(struct pt_regs *regs)
 199 {
 200         regs->pstate |= PSR_SSBS_BIT;
 201 }
 202
 203 static inline void set_compat_ssbs_bit(struct pt_regs *regs)
 204 {
 205         regs->pstate |= PSR_AA32_SSBS_BIT;
 206 }
 207
 208 static inline void start_thread(struct pt_regs *regs, unsigned long pc,
 209                                 unsigned long sp)
 210 {
 211         start_thread_common(regs, pc);
 212         regs->pstate = PSR_MODE_EL0t;
 213
 214         if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
 215                 set_ssbs_bit(regs);
 216
 217         regs->sp = sp;
 218 }
 219
 220 static inline bool is_ttbr0_addr(unsigned long addr)
 221 {
 222         /* entry assembly clears tags for TTBR0 addrs */
 223         return addr < TASK_SIZE;
 224 }
 225
 226 static inline bool is_ttbr1_addr(unsigned long addr)
 227 {
 228         /* TTBR1 addresses may have a tag if KASAN_SW_TAGS is in use */
 229         return arch_kasan_reset_tag(addr) >= PAGE_OFFSET;
 230 }
 231
 232 #ifdef CONFIG_COMPAT
 233 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
 234                                        unsigned long sp)
 235 {
 236         start_thread_common(regs, pc);
 237         regs->pstate = PSR_AA32_MODE_USR;
 238         if (pc & 1)
 239                 regs->pstate |= PSR_AA32_T_BIT;
 240
 241 #ifdef __AARCH64EB__
 242         regs->pstate |= PSR_AA32_E_BIT;
 243 #endif
 244
 245         if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
 246                 set_compat_ssbs_bit(regs);
 247
 248         regs->compat_sp = sp;
 249 }
 250 #endif
 251
 252 /* Forward declaration, a strange C thing */
 253 struct task_struct;
 254
 255 /* Free all resources held by a thread. */
 256 extern void release_thread(struct task_struct *);
 257
 258 unsigned long get_wchan(struct task_struct *p);
 259
 260 static inline void cpu_relax(void)
 261 {
 262         asm volatile("yield" ::: "memory");
 263 }
 264
 265 /* Thread switching */
 266 extern struct task_struct *cpu_switch_to(struct task_struct *prev,
 267                                          struct task_struct *next);
 268
 269 #define task_pt_regs(p) \
 270         ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
 271
 272 #define KSTK_EIP(tsk)   ((unsigned long)task_pt_regs(tsk)->pc)
 273 #define KSTK_ESP(tsk)   user_stack_pointer(task_pt_regs(tsk))
 274
 275 /*
 276  * Prefetching support
 277  */
 278 #define ARCH_HAS_PREFETCH
 279 static inline void prefetch(const void *ptr)
 280 {
 281         asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
 282 }
 283
 284 #define ARCH_HAS_PREFETCHW
 285 static inline void prefetchw(const void *ptr)
 286 {
 287         asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
 288 }
 289
 290 #define ARCH_HAS_SPINLOCK_PREFETCH
 291 static inline void spin_lock_prefetch(const void *ptr)
 292 {
 293         asm volatile(ARM64_LSE_ATOMIC_INSN(
 294                      "prfm pstl1strm, %a0",
 295                      "nop") : : "p" (ptr));
 296 }
 297
 298 extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
 299 extern void __init minsigstksz_setup(void);
 300
 301 /*
 302  * Not at the top of the file due to a direct #include cycle between
 303  * <asm/fpsimd.h> and <asm/processor.h>.  Deferring this #include
 304  * ensures that contents of processor.h are visible to fpsimd.h even if
 305  * processor.h is included first.
 306  *
 307  * These prctl helpers are the only things in this file that require
 308  * fpsimd.h.  The core code expects them to be in this header.
 309  */
 310 #include <asm/fpsimd.h>
 311
 312 /* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
 313 #define SVE_SET_VL(arg) sve_set_current_vl(arg)
 314 #define SVE_GET_VL()    sve_get_current_vl()
 315
 316 /* PR_PAC_RESET_KEYS prctl */
 317 #define PAC_RESET_KEYS(tsk, arg)        ptrauth_prctl_reset_keys(tsk, arg)
 318
 319 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
 320 /* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
 321 long set_tagged_addr_ctrl(unsigned long arg);
 322 long get_tagged_addr_ctrl(void);
 323 #define SET_TAGGED_ADDR_CTRL(arg)       set_tagged_addr_ctrl(arg)
 324 #define GET_TAGGED_ADDR_CTRL()          get_tagged_addr_ctrl()
 325 #endif
 326
 327 /*
 328  * For CONFIG_GCC_PLUGIN_STACKLEAK
 329  *
 330  * These need to be macros because otherwise we get stuck in a nightmare
 331  * of header definitions for the use of task_stack_page.
 332  */
 333
 334 #define current_top_of_stack()                                                  \
 335 ({                                                                              \
 336         struct stack_info _info;                                                \
 337         BUG_ON(!on_accessible_stack(current, current_stack_pointer, &_info));   \
 338         _info.high;                                                             \
 339 })
 340 #define on_thread_stack()       (on_task_stack(current, current_stack_pointer, NULL))
 341
 342 #endif /* __ASSEMBLY__ */
 343 #endif /* __ASM_PROCESSOR_H */