2 * Copyright (C) 2012 ARM Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 #ifndef __ASM_PGTABLE_H
17 #define __ASM_PGTABLE_H
20 #include <asm/proc-fns.h>
22 #include <asm/memory.h>
23 #include <asm/pgtable-hwdef.h>
24 #include <asm/pgtable-prot.h>
29 * VMALLOC_START: beginning of the kernel vmalloc space
30 * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space
33 #define VMALLOC_START (MODULES_END)
34 #define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
36 #define vmemmap ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT))
38 #define FIRST_USER_ADDRESS 0UL
42 #include <asm/cmpxchg.h>
43 #include <asm/fixmap.h>
44 #include <linux/mmdebug.h>
45 #include <linux/mm_types.h>
46 #include <linux/sched.h>
48 extern void __pte_error(const char *file, int line, unsigned long val);
49 extern void __pmd_error(const char *file, int line, unsigned long val);
50 extern void __pud_error(const char *file, int line, unsigned long val);
51 extern void __pgd_error(const char *file, int line, unsigned long val);
54 * ZERO_PAGE is a global shared page that is always zero: used
55 * for zero-mapped memory areas etc..
57 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
58 #define ZERO_PAGE(vaddr) phys_to_page(__pa_symbol(empty_zero_page))
60 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
63 * Macros to convert between a physical address and its placement in a
64 * page table entry, taking care of 52-bit addresses.
66 #ifdef CONFIG_ARM64_PA_BITS_52
67 #define __pte_to_phys(pte) \
68 ((pte_val(pte) & PTE_ADDR_LOW) | ((pte_val(pte) & PTE_ADDR_HIGH) << 36))
69 #define __phys_to_pte_val(phys) (((phys) | ((phys) >> 36)) & PTE_ADDR_MASK)
71 #define __pte_to_phys(pte) (pte_val(pte) & PTE_ADDR_MASK)
72 #define __phys_to_pte_val(phys) (phys)
75 #define pte_pfn(pte) (__pte_to_phys(pte) >> PAGE_SHIFT)
76 #define pfn_pte(pfn,prot) \
77 __pte(__phys_to_pte_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
79 #define pte_none(pte) (!pte_val(pte))
80 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
81 #define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
84 * The following only work if pte_present(). Undefined behaviour otherwise.
86 #define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
87 #define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
88 #define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
89 #define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
90 #define pte_user_exec(pte) (!(pte_val(pte) & PTE_UXN))
91 #define pte_cont(pte) (!!(pte_val(pte) & PTE_CONT))
93 #define pte_cont_addr_end(addr, end) \
94 ({ unsigned long __boundary = ((addr) + CONT_PTE_SIZE) & CONT_PTE_MASK; \
95 (__boundary - 1 < (end) - 1) ? __boundary : (end); \
98 #define pmd_cont_addr_end(addr, end) \
99 ({ unsigned long __boundary = ((addr) + CONT_PMD_SIZE) & CONT_PMD_MASK; \
100 (__boundary - 1 < (end) - 1) ? __boundary : (end); \
103 #define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
104 #define pte_sw_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
105 #define pte_dirty(pte) (pte_sw_dirty(pte) || pte_hw_dirty(pte))
107 #define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID))
109 * Execute-only user mappings do not have the PTE_USER bit set. All valid
110 * kernel mappings have the PTE_UXN bit set.
112 #define pte_valid_not_user(pte) \
113 ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == (PTE_VALID | PTE_UXN))
114 #define pte_valid_young(pte) \
115 ((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
116 #define pte_valid_user(pte) \
117 ((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
120 * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
121 * so that we don't erroneously return false for pages that have been
122 * remapped as PROT_NONE but are yet to be flushed from the TLB.
124 #define pte_accessible(mm, pte) \
125 (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
128 * p??_access_permitted() is true for valid user mappings (subject to the
129 * write permission check) other than user execute-only which do not have the
130 * PTE_USER bit set. PROT_NONE mappings do not have the PTE_VALID bit set.
132 #define pte_access_permitted(pte, write) \
133 (pte_valid_user(pte) && (!(write) || pte_write(pte)))
134 #define pmd_access_permitted(pmd, write) \
135 (pte_access_permitted(pmd_pte(pmd), (write)))
136 #define pud_access_permitted(pud, write) \
137 (pte_access_permitted(pud_pte(pud), (write)))
139 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
141 pte_val(pte) &= ~pgprot_val(prot);
145 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
147 pte_val(pte) |= pgprot_val(prot);
151 static inline pte_t pte_wrprotect(pte_t pte)
153 pte = clear_pte_bit(pte, __pgprot(PTE_WRITE));
154 pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
158 static inline pte_t pte_mkwrite(pte_t pte)
160 pte = set_pte_bit(pte, __pgprot(PTE_WRITE));
161 pte = clear_pte_bit(pte, __pgprot(PTE_RDONLY));
165 static inline pte_t pte_mkclean(pte_t pte)
167 pte = clear_pte_bit(pte, __pgprot(PTE_DIRTY));
168 pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
173 static inline pte_t pte_mkdirty(pte_t pte)
175 pte = set_pte_bit(pte, __pgprot(PTE_DIRTY));
178 pte = clear_pte_bit(pte, __pgprot(PTE_RDONLY));
183 static inline pte_t pte_mkold(pte_t pte)
185 return clear_pte_bit(pte, __pgprot(PTE_AF));
188 static inline pte_t pte_mkyoung(pte_t pte)
190 return set_pte_bit(pte, __pgprot(PTE_AF));
193 static inline pte_t pte_mkspecial(pte_t pte)
195 return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
198 static inline pte_t pte_mkcont(pte_t pte)
200 pte = set_pte_bit(pte, __pgprot(PTE_CONT));
201 return set_pte_bit(pte, __pgprot(PTE_TYPE_PAGE));
204 static inline pte_t pte_mknoncont(pte_t pte)
206 return clear_pte_bit(pte, __pgprot(PTE_CONT));
209 static inline pte_t pte_mkpresent(pte_t pte)
211 return set_pte_bit(pte, __pgprot(PTE_VALID));
214 static inline pmd_t pmd_mkcont(pmd_t pmd)
216 return __pmd(pmd_val(pmd) | PMD_SECT_CONT);
219 static inline void set_pte(pte_t *ptep, pte_t pte)
221 WRITE_ONCE(*ptep, pte);
224 * Only if the new pte is valid and kernel, otherwise TLB maintenance
225 * or update_mmu_cache() have the necessary barriers.
227 if (pte_valid_not_user(pte)) {
233 extern void __sync_icache_dcache(pte_t pteval);
236 * PTE bits configuration in the presence of hardware Dirty Bit Management
237 * (PTE_WRITE == PTE_DBM):
239 * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw)
245 * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
246 * the page fault mechanism. Checking the dirty status of a pte becomes:
248 * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
250 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
251 pte_t *ptep, pte_t pte)
255 if (pte_present(pte) && pte_user_exec(pte) && !pte_special(pte))
256 __sync_icache_dcache(pte);
259 * If the existing pte is valid, check for potential race with
260 * hardware updates of the pte (ptep_set_access_flags safely changes
261 * valid ptes without going through an invalid entry).
263 old_pte = READ_ONCE(*ptep);
264 if (IS_ENABLED(CONFIG_DEBUG_VM) && pte_valid(old_pte) && pte_valid(pte) &&
265 (mm == current->active_mm || atomic_read(&mm->mm_users) > 1)) {
266 VM_WARN_ONCE(!pte_young(pte),
267 "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
268 __func__, pte_val(old_pte), pte_val(pte));
269 VM_WARN_ONCE(pte_write(old_pte) && !pte_dirty(pte),
270 "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
271 __func__, pte_val(old_pte), pte_val(pte));
277 #define __HAVE_ARCH_PTE_SAME
278 static inline int pte_same(pte_t pte_a, pte_t pte_b)
282 lhs = pte_val(pte_a);
283 rhs = pte_val(pte_b);
285 if (pte_present(pte_a))
288 if (pte_present(pte_b))
295 * Huge pte definitions.
297 #define pte_huge(pte) (!(pte_val(pte) & PTE_TABLE_BIT))
298 #define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
301 * Hugetlb definitions.
303 #define HUGE_MAX_HSTATE 4
304 #define HPAGE_SHIFT PMD_SHIFT
305 #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT)
306 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
307 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
309 static inline pte_t pgd_pte(pgd_t pgd)
311 return __pte(pgd_val(pgd));
314 static inline pte_t pud_pte(pud_t pud)
316 return __pte(pud_val(pud));
319 static inline pmd_t pud_pmd(pud_t pud)
321 return __pmd(pud_val(pud));
324 static inline pte_t pmd_pte(pmd_t pmd)
326 return __pte(pmd_val(pmd));
329 static inline pmd_t pte_pmd(pte_t pte)
331 return __pmd(pte_val(pte));
334 static inline pgprot_t mk_sect_prot(pgprot_t prot)
336 return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
339 #ifdef CONFIG_NUMA_BALANCING
341 * See the comment in include/asm-generic/pgtable.h
343 static inline int pte_protnone(pte_t pte)
345 return (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)) == PTE_PROT_NONE;
348 static inline int pmd_protnone(pmd_t pmd)
350 return pte_protnone(pmd_pte(pmd));
358 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
359 #define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
360 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
362 #define pmd_present(pmd) pte_present(pmd_pte(pmd))
363 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
364 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
365 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
366 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
367 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
368 #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
369 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
370 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
371 #define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_SECT_VALID))
373 #define pmd_thp_or_huge(pmd) (pmd_huge(pmd) || pmd_trans_huge(pmd))
375 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
377 #define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
379 #define __pmd_to_phys(pmd) __pte_to_phys(pmd_pte(pmd))
380 #define __phys_to_pmd_val(phys) __phys_to_pte_val(phys)
381 #define pmd_pfn(pmd) ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT)
382 #define pfn_pmd(pfn,prot) __pmd(__phys_to_pmd_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
383 #define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
385 #define pud_write(pud) pte_write(pud_pte(pud))
387 #define __pud_to_phys(pud) __pte_to_phys(pud_pte(pud))
388 #define __phys_to_pud_val(phys) __phys_to_pte_val(phys)
389 #define pud_pfn(pud) ((__pud_to_phys(pud) & PUD_MASK) >> PAGE_SHIFT)
390 #define pfn_pud(pfn,prot) __pud(__phys_to_pud_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
392 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
394 #define __pgd_to_phys(pgd) __pte_to_phys(pgd_pte(pgd))
395 #define __phys_to_pgd_val(phys) __phys_to_pte_val(phys)
397 #define __pgprot_modify(prot,mask,bits) \
398 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
401 * Mark the prot value as uncacheable and unbufferable.
403 #define pgprot_noncached(prot) \
404 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
405 #define pgprot_writecombine(prot) \
406 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
407 #define pgprot_device(prot) \
408 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
409 #define __HAVE_PHYS_MEM_ACCESS_PROT
411 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
412 unsigned long size, pgprot_t vma_prot);
414 #define pmd_none(pmd) (!pmd_val(pmd))
416 #define pmd_bad(pmd) (!(pmd_val(pmd) & PMD_TABLE_BIT))
418 #define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
420 #define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
423 #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS < 3
424 #define pud_sect(pud) (0)
425 #define pud_table(pud) (1)
427 #define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
429 #define pud_table(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
433 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
435 WRITE_ONCE(*pmdp, pmd);
440 static inline void pmd_clear(pmd_t *pmdp)
442 set_pmd(pmdp, __pmd(0));
445 static inline phys_addr_t pmd_page_paddr(pmd_t pmd)
447 return __pmd_to_phys(pmd);
450 /* Find an entry in the third-level page table. */
451 #define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
453 #define pte_offset_phys(dir,addr) (pmd_page_paddr(READ_ONCE(*(dir))) + pte_index(addr) * sizeof(pte_t))
454 #define pte_offset_kernel(dir,addr) ((pte_t *)__va(pte_offset_phys((dir), (addr))))
456 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
457 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
458 #define pte_unmap(pte) do { } while (0)
459 #define pte_unmap_nested(pte) do { } while (0)
461 #define pte_set_fixmap(addr) ((pte_t *)set_fixmap_offset(FIX_PTE, addr))
462 #define pte_set_fixmap_offset(pmd, addr) pte_set_fixmap(pte_offset_phys(pmd, addr))
463 #define pte_clear_fixmap() clear_fixmap(FIX_PTE)
465 #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(__pmd_to_phys(pmd)))
467 /* use ONLY for statically allocated translation tables */
468 #define pte_offset_kimg(dir,addr) ((pte_t *)__phys_to_kimg(pte_offset_phys((dir), (addr))))
471 * Conversion functions: convert a page and protection to a page entry,
472 * and a page entry and page directory to the page they refer to.
474 #define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
476 #if CONFIG_PGTABLE_LEVELS > 2
478 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
480 #define pud_none(pud) (!pud_val(pud))
481 #define pud_bad(pud) (!(pud_val(pud) & PUD_TABLE_BIT))
482 #define pud_present(pud) pte_present(pud_pte(pud))
484 static inline void set_pud(pud_t *pudp, pud_t pud)
486 WRITE_ONCE(*pudp, pud);
491 static inline void pud_clear(pud_t *pudp)
493 set_pud(pudp, __pud(0));
496 static inline phys_addr_t pud_page_paddr(pud_t pud)
498 return __pud_to_phys(pud);
501 /* Find an entry in the second-level page table. */
502 #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
504 #define pmd_offset_phys(dir, addr) (pud_page_paddr(READ_ONCE(*(dir))) + pmd_index(addr) * sizeof(pmd_t))
505 #define pmd_offset(dir, addr) ((pmd_t *)__va(pmd_offset_phys((dir), (addr))))
507 #define pmd_set_fixmap(addr) ((pmd_t *)set_fixmap_offset(FIX_PMD, addr))
508 #define pmd_set_fixmap_offset(pud, addr) pmd_set_fixmap(pmd_offset_phys(pud, addr))
509 #define pmd_clear_fixmap() clear_fixmap(FIX_PMD)
511 #define pud_page(pud) pfn_to_page(__phys_to_pfn(__pud_to_phys(pud)))
513 /* use ONLY for statically allocated translation tables */
514 #define pmd_offset_kimg(dir,addr) ((pmd_t *)__phys_to_kimg(pmd_offset_phys((dir), (addr))))
518 #define pud_page_paddr(pud) ({ BUILD_BUG(); 0; })
520 /* Match pmd_offset folding in <asm/generic/pgtable-nopmd.h> */
521 #define pmd_set_fixmap(addr) NULL
522 #define pmd_set_fixmap_offset(pudp, addr) ((pmd_t *)pudp)
523 #define pmd_clear_fixmap()
525 #define pmd_offset_kimg(dir,addr) ((pmd_t *)dir)
527 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
529 #if CONFIG_PGTABLE_LEVELS > 3
531 #define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
533 #define pgd_none(pgd) (!pgd_val(pgd))
534 #define pgd_bad(pgd) (!(pgd_val(pgd) & 2))
535 #define pgd_present(pgd) (pgd_val(pgd))
537 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
539 WRITE_ONCE(*pgdp, pgd);
543 static inline void pgd_clear(pgd_t *pgdp)
545 set_pgd(pgdp, __pgd(0));
548 static inline phys_addr_t pgd_page_paddr(pgd_t pgd)
550 return __pgd_to_phys(pgd);
553 /* Find an entry in the frst-level page table. */
554 #define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
556 #define pud_offset_phys(dir, addr) (pgd_page_paddr(READ_ONCE(*(dir))) + pud_index(addr) * sizeof(pud_t))
557 #define pud_offset(dir, addr) ((pud_t *)__va(pud_offset_phys((dir), (addr))))
559 #define pud_set_fixmap(addr) ((pud_t *)set_fixmap_offset(FIX_PUD, addr))
560 #define pud_set_fixmap_offset(pgd, addr) pud_set_fixmap(pud_offset_phys(pgd, addr))
561 #define pud_clear_fixmap() clear_fixmap(FIX_PUD)
563 #define pgd_page(pgd) pfn_to_page(__phys_to_pfn(__pgd_to_phys(pgd)))
565 /* use ONLY for statically allocated translation tables */
566 #define pud_offset_kimg(dir,addr) ((pud_t *)__phys_to_kimg(pud_offset_phys((dir), (addr))))
570 #define pgd_page_paddr(pgd) ({ BUILD_BUG(); 0;})
572 /* Match pud_offset folding in <asm/generic/pgtable-nopud.h> */
573 #define pud_set_fixmap(addr) NULL
574 #define pud_set_fixmap_offset(pgdp, addr) ((pud_t *)pgdp)
575 #define pud_clear_fixmap()
577 #define pud_offset_kimg(dir,addr) ((pud_t *)dir)
579 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
581 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
583 /* to find an entry in a page-table-directory */
584 #define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
586 #define pgd_offset_raw(pgd, addr) ((pgd) + pgd_index(addr))
588 #define pgd_offset(mm, addr) (pgd_offset_raw((mm)->pgd, (addr)))
590 /* to find an entry in a kernel page-table-directory */
591 #define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
593 #define pgd_set_fixmap(addr) ((pgd_t *)set_fixmap_offset(FIX_PGD, addr))
594 #define pgd_clear_fixmap() clear_fixmap(FIX_PGD)
596 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
598 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
599 PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
600 /* preserve the hardware dirty information */
601 if (pte_hw_dirty(pte))
602 pte = pte_mkdirty(pte);
603 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
607 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
609 return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
612 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
613 extern int ptep_set_access_flags(struct vm_area_struct *vma,
614 unsigned long address, pte_t *ptep,
615 pte_t entry, int dirty);
617 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
618 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
619 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
620 unsigned long address, pmd_t *pmdp,
621 pmd_t entry, int dirty)
623 return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
628 * Atomic pte/pmd modifications.
630 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
631 static inline int __ptep_test_and_clear_young(pte_t *ptep)
635 pte = READ_ONCE(*ptep);
638 pte = pte_mkold(pte);
639 pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
640 pte_val(old_pte), pte_val(pte));
641 } while (pte_val(pte) != pte_val(old_pte));
643 return pte_young(pte);
646 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
647 unsigned long address,
650 return __ptep_test_and_clear_young(ptep);
653 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
654 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
655 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
656 unsigned long address,
659 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
661 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
663 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
664 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
665 unsigned long address, pte_t *ptep)
667 return __pte(xchg_relaxed(&pte_val(*ptep), 0));
670 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
671 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
672 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
673 unsigned long address, pmd_t *pmdp)
675 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
677 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
680 * ptep_set_wrprotect - mark read-only while trasferring potential hardware
681 * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
683 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
684 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
688 pte = READ_ONCE(*ptep);
692 * If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY
693 * clear), set the PTE_DIRTY bit.
695 if (pte_hw_dirty(pte))
696 pte = pte_mkdirty(pte);
697 pte = pte_wrprotect(pte);
698 pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
699 pte_val(old_pte), pte_val(pte));
700 } while (pte_val(pte) != pte_val(old_pte));
703 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
704 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
705 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
706 unsigned long address, pmd_t *pmdp)
708 ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
711 #define pmdp_establish pmdp_establish
712 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
713 unsigned long address, pmd_t *pmdp, pmd_t pmd)
715 return __pmd(xchg_relaxed(&pmd_val(*pmdp), pmd_val(pmd)));
719 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
720 extern pgd_t swapper_pg_end[];
721 extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
722 extern pgd_t tramp_pg_dir[PTRS_PER_PGD];
725 * Encode and decode a swap entry:
726 * bits 0-1: present (must be zero)
727 * bits 2-7: swap type
728 * bits 8-57: swap offset
729 * bit 58: PTE_PROT_NONE (must be zero)
731 #define __SWP_TYPE_SHIFT 2
732 #define __SWP_TYPE_BITS 6
733 #define __SWP_OFFSET_BITS 50
734 #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
735 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
736 #define __SWP_OFFSET_MASK ((1UL << __SWP_OFFSET_BITS) - 1)
738 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
739 #define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
740 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
742 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
743 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
746 * Ensure that there are not more swap files than can be encoded in the kernel
749 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
751 extern int kern_addr_valid(unsigned long addr);
753 #include <asm-generic/pgtable.h>
755 void pgd_cache_init(void);
756 #define pgtable_cache_init pgd_cache_init
759 * On AArch64, the cache coherency is handled via the set_pte_at() function.
761 static inline void update_mmu_cache(struct vm_area_struct *vma,
762 unsigned long addr, pte_t *ptep)
765 * We don't do anything here, so there's a very small chance of
766 * us retaking a user fault which we just fixed up. The alternative
767 * is doing a dsb(ishst), but that penalises the fastpath.
771 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
773 #define kc_vaddr_to_offset(v) ((v) & ~VA_START)
774 #define kc_offset_to_vaddr(o) ((o) | VA_START)
776 #ifdef CONFIG_ARM64_PA_BITS_52
777 #define phys_to_ttbr(addr) (((addr) | ((addr) >> 46)) & TTBR_BADDR_MASK_52)
779 #define phys_to_ttbr(addr) (addr)
782 #endif /* !__ASSEMBLY__ */
784 #endif /* __ASM_PGTABLE_H */