Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64...
[linux-2.6-microblaze.git] / arch / arm64 / include / asm / cpufeature.h
1 /*
2  * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 #ifndef __ASM_CPUFEATURE_H
10 #define __ASM_CPUFEATURE_H
11
12 #include <asm/hwcap.h>
13 #include <asm/sysreg.h>
14
15 /*
16  * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
17  * in the kernel and for user space to keep track of which optional features
18  * are supported by the current system. So let's map feature 'x' to HWCAP_x.
19  * Note that HWCAP_x constants are bit fields so we need to take the log.
20  */
21
22 #define MAX_CPU_FEATURES        (8 * sizeof(elf_hwcap))
23 #define cpu_feature(x)          ilog2(HWCAP_ ## x)
24
25 #define ARM64_WORKAROUND_CLEAN_CACHE            0
26 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE    1
27 #define ARM64_WORKAROUND_845719                 2
28 #define ARM64_HAS_SYSREG_GIC_CPUIF              3
29 #define ARM64_HAS_PAN                           4
30 #define ARM64_HAS_LSE_ATOMICS                   5
31 #define ARM64_WORKAROUND_CAVIUM_23154           6
32 #define ARM64_WORKAROUND_834220                 7
33 #define ARM64_HAS_NO_HW_PREFETCH                8
34 #define ARM64_HAS_UAO                           9
35 #define ARM64_ALT_PAN_NOT_UAO                   10
36 #define ARM64_HAS_VIRT_HOST_EXTN                11
37 #define ARM64_WORKAROUND_CAVIUM_27456           12
38
39 #define ARM64_NCAPS                             13
40
41 #ifndef __ASSEMBLY__
42
43 #include <linux/kernel.h>
44
45 /* CPU feature register tracking */
46 enum ftr_type {
47         FTR_EXACT,      /* Use a predefined safe value */
48         FTR_LOWER_SAFE, /* Smaller value is safe */
49         FTR_HIGHER_SAFE,/* Bigger value is safe */
50 };
51
52 #define FTR_STRICT      true    /* SANITY check strict matching required */
53 #define FTR_NONSTRICT   false   /* SANITY check ignored */
54
55 #define FTR_SIGNED      true    /* Value should be treated as signed */
56 #define FTR_UNSIGNED    false   /* Value should be treated as unsigned */
57
58 struct arm64_ftr_bits {
59         bool            sign;   /* Value is signed ? */
60         bool            strict; /* CPU Sanity check: strict matching required ? */
61         enum ftr_type   type;
62         u8              shift;
63         u8              width;
64         s64             safe_val; /* safe value for discrete features */
65 };
66
67 /*
68  * @arm64_ftr_reg - Feature register
69  * @strict_mask         Bits which should match across all CPUs for sanity.
70  * @sys_val             Safe value across the CPUs (system view)
71  */
72 struct arm64_ftr_reg {
73         u32                     sys_id;
74         const char              *name;
75         u64                     strict_mask;
76         u64                     sys_val;
77         struct arm64_ftr_bits   *ftr_bits;
78 };
79
80 struct arm64_cpu_capabilities {
81         const char *desc;
82         u16 capability;
83         bool (*matches)(const struct arm64_cpu_capabilities *);
84         void (*enable)(void *);         /* Called on all active CPUs */
85         union {
86                 struct {        /* To be used for erratum handling only */
87                         u32 midr_model;
88                         u32 midr_range_min, midr_range_max;
89                 };
90
91                 struct {        /* Feature register checking */
92                         u32 sys_reg;
93                         u8 field_pos;
94                         u8 min_field_value;
95                         u8 hwcap_type;
96                         bool sign;
97                         unsigned long hwcap;
98                 };
99         };
100 };
101
102 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
103
104 static inline bool cpu_have_feature(unsigned int num)
105 {
106         return elf_hwcap & (1UL << num);
107 }
108
109 static inline bool cpus_have_cap(unsigned int num)
110 {
111         if (num >= ARM64_NCAPS)
112                 return false;
113         return test_bit(num, cpu_hwcaps);
114 }
115
116 static inline void cpus_set_cap(unsigned int num)
117 {
118         if (num >= ARM64_NCAPS)
119                 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
120                         num, ARM64_NCAPS);
121         else
122                 __set_bit(num, cpu_hwcaps);
123 }
124
125 static inline int __attribute_const__
126 cpuid_feature_extract_signed_field_width(u64 features, int field, int width)
127 {
128         return (s64)(features << (64 - width - field)) >> (64 - width);
129 }
130
131 static inline int __attribute_const__
132 cpuid_feature_extract_signed_field(u64 features, int field)
133 {
134         return cpuid_feature_extract_signed_field_width(features, field, 4);
135 }
136
137 static inline unsigned int __attribute_const__
138 cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
139 {
140         return (u64)(features << (64 - width - field)) >> (64 - width);
141 }
142
143 static inline unsigned int __attribute_const__
144 cpuid_feature_extract_unsigned_field(u64 features, int field)
145 {
146         return cpuid_feature_extract_unsigned_field_width(features, field, 4);
147 }
148
149 static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
150 {
151         return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
152 }
153
154 static inline int __attribute_const__
155 cpuid_feature_extract_field(u64 features, int field, bool sign)
156 {
157         return (sign) ?
158                 cpuid_feature_extract_signed_field(features, field) :
159                 cpuid_feature_extract_unsigned_field(features, field);
160 }
161
162 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
163 {
164         return (s64)cpuid_feature_extract_field(val, ftrp->shift, ftrp->sign);
165 }
166
167 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
168 {
169         return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
170                 cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
171 }
172
173 void __init setup_cpu_features(void);
174
175 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
176                             const char *info);
177 void check_local_cpu_errata(void);
178
179 void verify_local_cpu_capabilities(void);
180
181 u64 read_system_reg(u32 id);
182
183 static inline bool cpu_supports_mixed_endian_el0(void)
184 {
185         return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
186 }
187
188 static inline bool system_supports_mixed_endian_el0(void)
189 {
190         return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
191 }
192
193 #endif /* __ASSEMBLY__ */
194
195 #endif