arch/arm64/include/asm/asm-uaccess.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __ASM_ASM_UACCESS_H
   3 #define __ASM_ASM_UACCESS_H
   4
   5 #include <asm/alternative-macros.h>
   6 #include <asm/kernel-pgtable.h>
   7 #include <asm/mmu.h>
   8 #include <asm/sysreg.h>
   9 #include <asm/assembler.h>
  10
  11 /*
  12  * User access enabling/disabling macros.
  13  */
  14 #ifdef CONFIG_ARM64_SW_TTBR0_PAN
  15         .macro  __uaccess_ttbr0_disable, tmp1
  16         mrs     \tmp1, ttbr1_el1                        // swapper_pg_dir
  17         bic     \tmp1, \tmp1, #TTBR_ASID_MASK
  18         sub     \tmp1, \tmp1, #RESERVED_SWAPPER_OFFSET  // reserved_pg_dir
  19         msr     ttbr0_el1, \tmp1                        // set reserved TTBR0_EL1
  20         isb
  21         add     \tmp1, \tmp1, #RESERVED_SWAPPER_OFFSET
  22         msr     ttbr1_el1, \tmp1                // set reserved ASID
  23         isb
  24         .endm
  25
  26         .macro  __uaccess_ttbr0_enable, tmp1, tmp2
  27         get_current_task \tmp1
  28         ldr     \tmp1, [\tmp1, #TSK_TI_TTBR0]   // load saved TTBR0_EL1
  29         mrs     \tmp2, ttbr1_el1
  30         extr    \tmp2, \tmp2, \tmp1, #48
  31         ror     \tmp2, \tmp2, #16
  32         msr     ttbr1_el1, \tmp2                // set the active ASID
  33         isb
  34         msr     ttbr0_el1, \tmp1                // set the non-PAN TTBR0_EL1
  35         isb
  36         .endm
  37
  38         .macro  uaccess_ttbr0_disable, tmp1, tmp2
  39 alternative_if_not ARM64_HAS_PAN
  40         save_and_disable_irq \tmp2              // avoid preemption
  41         __uaccess_ttbr0_disable \tmp1
  42         restore_irq \tmp2
  43 alternative_else_nop_endif
  44         .endm
  45
  46         .macro  uaccess_ttbr0_enable, tmp1, tmp2, tmp3
  47 alternative_if_not ARM64_HAS_PAN
  48         save_and_disable_irq \tmp3              // avoid preemption
  49         __uaccess_ttbr0_enable \tmp1, \tmp2
  50         restore_irq \tmp3
  51 alternative_else_nop_endif
  52         .endm
  53 #else
  54         .macro  uaccess_ttbr0_disable, tmp1, tmp2
  55         .endm
  56
  57         .macro  uaccess_ttbr0_enable, tmp1, tmp2, tmp3
  58         .endm
  59 #endif
  60
  61 /*
  62  * Generate the assembly for LDTR/STTR with exception table entries.
  63  * This is complicated as there is no post-increment or pair versions of the
  64  * unprivileged instructions, and USER() only works for single instructions.
  65  */
  66         .macro user_ldp l, reg1, reg2, addr, post_inc
  67 8888:           ldtr    \reg1, [\addr];
  68 8889:           ldtr    \reg2, [\addr, #8];
  69                 add     \addr, \addr, \post_inc;
  70
  71                 _asm_extable    8888b,\l;
  72                 _asm_extable    8889b,\l;
  73         .endm
  74
  75         .macro user_stp l, reg1, reg2, addr, post_inc
  76 8888:           sttr    \reg1, [\addr];
  77 8889:           sttr    \reg2, [\addr, #8];
  78                 add     \addr, \addr, \post_inc;
  79
  80                 _asm_extable    8888b,\l;
  81                 _asm_extable    8889b,\l;
  82         .endm
  83
  84         .macro user_ldst l, inst, reg, addr, post_inc
  85 8888:           \inst           \reg, [\addr];
  86                 add             \addr, \addr, \post_inc;
  87
  88                 _asm_extable    8888b,\l;
  89         .endm
  90 #endif