1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_ALTERNATIVE_MACROS_H
3 #define __ASM_ALTERNATIVE_MACROS_H
5 #include <asm/cpucaps.h>
7 #define ARM64_CB_PATCH ARM64_NCAPS
9 /* A64 instructions are always 32 bits. */
10 #define AARCH64_INSN_SIZE 4
14 #include <linux/stringify.h>
16 #define ALTINSTR_ENTRY(feature) \
17 " .word 661b - .\n" /* label */ \
18 " .word 663f - .\n" /* new instruction */ \
19 " .hword " __stringify(feature) "\n" /* feature bit */ \
20 " .byte 662b-661b\n" /* source len */ \
21 " .byte 664f-663f\n" /* replacement len */
23 #define ALTINSTR_ENTRY_CB(feature, cb) \
24 " .word 661b - .\n" /* label */ \
25 " .word " __stringify(cb) "- .\n" /* callback */ \
26 " .hword " __stringify(feature) "\n" /* feature bit */ \
27 " .byte 662b-661b\n" /* source len */ \
28 " .byte 664f-663f\n" /* replacement len */
31 * alternative assembly primitive:
33 * If any of these .org directive fail, it means that insn1 and insn2
34 * don't have the same length. This used to be written as
36 * .if ((664b-663b) != (662b-661b))
37 * .error "Alternatives instruction length mismatch"
40 * but most assemblers die if insn1 or insn2 have a .inst. This should
41 * be fixed in a binutils release posterior to 2.25.51.0.2 (anything
42 * containing commit 4e4d08cf7399b606 or c1baaddf8861).
44 * Alternatives with callbacks do not generate replacement instructions.
46 #define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \
47 ".if "__stringify(cfg_enabled)" == 1\n" \
51 ".pushsection .altinstructions,\"a\"\n" \
52 ALTINSTR_ENTRY(feature) \
58 ".org . - (664b-663b) + (662b-661b)\n\t" \
59 ".org . - (662b-661b) + (664b-663b)\n\t" \
63 #define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb) \
64 ".if "__stringify(cfg_enabled)" == 1\n" \
68 ".pushsection .altinstructions,\"a\"\n" \
69 ALTINSTR_ENTRY_CB(feature, cb) \
75 #define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
76 __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))
78 #define ALTERNATIVE_CB(oldinstr, cb) \
79 __ALTERNATIVE_CFG_CB(oldinstr, ARM64_CB_PATCH, 1, cb)
82 #include <asm/assembler.h>
84 .macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
85 .word \orig_offset - .
92 .macro alternative_insn insn1, insn2, cap, enable = 1
95 662: .pushsection .altinstructions, "a"
96 altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
100 664: .org . - (664b-663b) + (662b-661b)
101 .org . - (662b-661b) + (664b-663b)
107 * Alternative sequences
109 * The code for the case where the capability is not present will be
110 * assembled and linked as normal. There are no restrictions on this
113 * The code for the case where the capability is present will be
114 * assembled into a special section to be used for dynamic patching.
115 * Code for that case must:
117 * 1. Be exactly the same length (in bytes) as the default code
120 * 2. Not contain a branch target that is used outside of the
121 * alternative sequence it is defined in (branches into an
122 * alternative sequence are not fixed up).
126 * Begin an alternative code sequence.
128 .macro alternative_if_not cap
129 .set .Lasm_alt_mode, 0
130 .pushsection .altinstructions, "a"
131 altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
136 .macro alternative_if cap
137 .set .Lasm_alt_mode, 1
138 .pushsection .altinstructions, "a"
139 altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f
142 .align 2 /* So GAS knows label 661 is suitably aligned */
146 .macro alternative_cb cb
147 .set .Lasm_alt_mode, 0
148 .pushsection .altinstructions, "a"
149 altinstruction_entry 661f, \cb, ARM64_CB_PATCH, 662f-661f, 0
155 * Provide the other half of the alternative code sequence.
157 .macro alternative_else
159 .if .Lasm_alt_mode==0
168 * Complete an alternative code sequence.
170 .macro alternative_endif
172 .org . - (664b-663b) + (662b-661b)
173 .org . - (662b-661b) + (664b-663b)
174 .if .Lasm_alt_mode==0
180 * Callback-based alternative epilogue
182 .macro alternative_cb_end
187 * Provides a trivial alternative or default sequence consisting solely
188 * of NOPs. The number of NOPs is chosen automatically to match the
191 .macro alternative_else_nop_endif
193 nops (662b-661b) / AARCH64_INSN_SIZE
197 #define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
198 alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
200 .macro user_alt, label, oldinstr, newinstr, cond
201 9999: alternative_insn "\oldinstr", "\newinstr", \cond
202 _asm_extable 9999b, \label
205 #endif /* __ASSEMBLY__ */
208 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
210 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
211 * N.B. If CONFIG_FOO is specified, but not selected, the whole block
212 * will be omitted, including oldinstr.
214 #define ALTERNATIVE(oldinstr, newinstr, ...) \
215 _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
217 #endif /* __ASM_ALTERNATIVE_MACROS_H */