arch/arm64/boot/dts/xilinx/zynqmp.dtsi

   1 /*
   2  * dts file for Xilinx ZynqMP
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  */
  13
  14 / {
  15         compatible = "xlnx,zynqmp";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         cpus {
  20                 #address-cells = <1>;
  21                 #size-cells = <0>;
  22
  23                 cpu0: cpu@0 {
  24                         compatible = "arm,cortex-a53", "arm,armv8";
  25                         device_type = "cpu";
  26                         enable-method = "psci";
  27                         operating-points-v2 = <&cpu_opp_table>;
  28                         reg = <0x0>;
  29                         cpu-idle-states = <&CPU_SLEEP_0>;
  30                 };
  31
  32                 cpu1: cpu@1 {
  33                         compatible = "arm,cortex-a53", "arm,armv8";
  34                         device_type = "cpu";
  35                         enable-method = "psci";
  36                         reg = <0x1>;
  37                         operating-points-v2 = <&cpu_opp_table>;
  38                         cpu-idle-states = <&CPU_SLEEP_0>;
  39                 };
  40
  41                 cpu2: cpu@2 {
  42                         compatible = "arm,cortex-a53", "arm,armv8";
  43                         device_type = "cpu";
  44                         enable-method = "psci";
  45                         reg = <0x2>;
  46                         operating-points-v2 = <&cpu_opp_table>;
  47                         cpu-idle-states = <&CPU_SLEEP_0>;
  48                 };
  49
  50                 cpu3: cpu@3 {
  51                         compatible = "arm,cortex-a53", "arm,armv8";
  52                         device_type = "cpu";
  53                         enable-method = "psci";
  54                         reg = <0x3>;
  55                         operating-points-v2 = <&cpu_opp_table>;
  56                         cpu-idle-states = <&CPU_SLEEP_0>;
  57                 };
  58
  59                 idle-states {
  60                         entry-method = "arm,psci";
  61
  62                         CPU_SLEEP_0: cpu-sleep-0 {
  63                                 compatible = "arm,idle-state";
  64                                 arm,psci-suspend-param = <0x40000000>;
  65                                 local-timer-stop;
  66                                 entry-latency-us = <300>;
  67                                 exit-latency-us = <600>;
  68                                 min-residency-us = <10000>;
  69                         };
  70                 };
  71         };
  72
  73         cpu_opp_table: cpu_opp_table {
  74                 compatible = "operating-points-v2";
  75                 opp-shared;
  76                 opp00 {
  77                         opp-hz = /bits/ 64 <1199999988>;
  78                         opp-microvolt = <1000000>;
  79                         clock-latency-ns = <500000>;
  80                 };
  81                 opp01 {
  82                         opp-hz = /bits/ 64 <599999994>;
  83                         opp-microvolt = <1000000>;
  84                         clock-latency-ns = <500000>;
  85                 };
  86                 opp02 {
  87                         opp-hz = /bits/ 64 <399999996>;
  88                         opp-microvolt = <1000000>;
  89                         clock-latency-ns = <500000>;
  90                 };
  91                 opp03 {
  92                         opp-hz = /bits/ 64 <299999997>;
  93                         opp-microvolt = <1000000>;
  94                         clock-latency-ns = <500000>;
  95                 };
  96         };
  97
  98         dcc: dcc {
  99                 compatible = "arm,dcc";
 100                 status = "disabled";
 101         };
 102
 103         pmu {
 104                 compatible = "arm,armv8-pmuv3";
 105                 interrupt-parent = <&gic>;
 106                 interrupts = <0 143 4>,
 107                              <0 144 4>,
 108                              <0 145 4>,
 109                              <0 146 4>;
 110         };
 111
 112         psci {
 113                 compatible = "arm,psci-0.2";
 114                 method = "smc";
 115         };
 116
 117         timer {
 118                 compatible = "arm,armv8-timer";
 119                 interrupt-parent = <&gic>;
 120                 interrupts = <1 13 0xf08>,
 121                              <1 14 0xf08>,
 122                              <1 11 0xf08>,
 123                              <1 10 0xf08>;
 124         };
 125
 126         amba_apu: amba_apu@0 {
 127                 compatible = "simple-bus";
 128                 #address-cells = <2>;
 129                 #size-cells = <1>;
 130                 ranges = <0 0 0 0 0xffffffff>;
 131
 132                 gic: interrupt-controller@f9010000 {
 133                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
 134                         #interrupt-cells = <3>;
 135                         reg = <0x0 0xf9010000 0x10000>,
 136                               <0x0 0xf9020000 0x20000>,
 137                               <0x0 0xf9040000 0x20000>,
 138                               <0x0 0xf9060000 0x20000>;
 139                         interrupt-controller;
 140                         interrupt-parent = <&gic>;
 141                         interrupts = <1 9 0xf04>;
 142                 };
 143         };
 144
 145         amba: amba {
 146                 compatible = "simple-bus";
 147                 #address-cells = <2>;
 148                 #size-cells = <2>;
 149                 ranges;
 150
 151                 can0: can@ff060000 {
 152                         compatible = "xlnx,zynq-can-1.0";
 153                         status = "disabled";
 154                         clock-names = "can_clk", "pclk";
 155                         reg = <0x0 0xff060000 0x0 0x1000>;
 156                         interrupts = <0 23 4>;
 157                         interrupt-parent = <&gic>;
 158                         tx-fifo-depth = <0x40>;
 159                         rx-fifo-depth = <0x40>;
 160                 };
 161
 162                 can1: can@ff070000 {
 163                         compatible = "xlnx,zynq-can-1.0";
 164                         status = "disabled";
 165                         clock-names = "can_clk", "pclk";
 166                         reg = <0x0 0xff070000 0x0 0x1000>;
 167                         interrupts = <0 24 4>;
 168                         interrupt-parent = <&gic>;
 169                         tx-fifo-depth = <0x40>;
 170                         rx-fifo-depth = <0x40>;
 171                 };
 172
 173                 cci: cci@fd6e0000 {
 174                         compatible = "arm,cci-400";
 175                         reg = <0x0 0xfd6e0000 0x0 0x9000>;
 176                         ranges = <0x0 0x0 0xfd6e0000 0x10000>;
 177                         #address-cells = <1>;
 178                         #size-cells = <1>;
 179
 180                         pmu@9000 {
 181                                 compatible = "arm,cci-400-pmu,r1";
 182                                 reg = <0x9000 0x5000>;
 183                                 interrupt-parent = <&gic>;
 184                                 interrupts = <0 123 4>,
 185                                              <0 123 4>,
 186                                              <0 123 4>,
 187                                              <0 123 4>,
 188                                              <0 123 4>;
 189                         };
 190                 };
 191
 192                 gem0: ethernet@ff0b0000 {
 193                         compatible = "cdns,gem";
 194                         status = "disabled";
 195                         interrupt-parent = <&gic>;
 196                         interrupts = <0 57 4>, <0 57 4>;
 197                         reg = <0x0 0xff0b0000 0x0 0x1000>;
 198                         clock-names = "pclk", "hclk", "tx_clk";
 199                         #address-cells = <1>;
 200                         #size-cells = <0>;
 201                 };
 202
 203                 gem1: ethernet@ff0c0000 {
 204                         compatible = "cdns,gem";
 205                         status = "disabled";
 206                         interrupt-parent = <&gic>;
 207                         interrupts = <0 59 4>, <0 59 4>;
 208                         reg = <0x0 0xff0c0000 0x0 0x1000>;
 209                         clock-names = "pclk", "hclk", "tx_clk";
 210                         #address-cells = <1>;
 211                         #size-cells = <0>;
 212                 };
 213
 214                 gem2: ethernet@ff0d0000 {
 215                         compatible = "cdns,gem";
 216                         status = "disabled";
 217                         interrupt-parent = <&gic>;
 218                         interrupts = <0 61 4>, <0 61 4>;
 219                         reg = <0x0 0xff0d0000 0x0 0x1000>;
 220                         clock-names = "pclk", "hclk", "tx_clk";
 221                         #address-cells = <1>;
 222                         #size-cells = <0>;
 223                 };
 224
 225                 gem3: ethernet@ff0e0000 {
 226                         compatible = "cdns,gem";
 227                         status = "disabled";
 228                         interrupt-parent = <&gic>;
 229                         interrupts = <0 63 4>, <0 63 4>;
 230                         reg = <0x0 0xff0e0000 0x0 0x1000>;
 231                         clock-names = "pclk", "hclk", "tx_clk";
 232                         #address-cells = <1>;
 233                         #size-cells = <0>;
 234                 };
 235
 236                 gpio: gpio@ff0a0000 {
 237                         compatible = "xlnx,zynqmp-gpio-1.0";
 238                         status = "disabled";
 239                         #gpio-cells = <0x2>;
 240                         interrupt-parent = <&gic>;
 241                         interrupts = <0 16 4>;
 242                         interrupt-controller;
 243                         #interrupt-cells = <2>;
 244                         reg = <0x0 0xff0a0000 0x0 0x1000>;
 245                 };
 246
 247                 i2c0: i2c@ff020000 {
 248                         compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
 249                         status = "disabled";
 250                         interrupt-parent = <&gic>;
 251                         interrupts = <0 17 4>;
 252                         reg = <0x0 0xff020000 0x0 0x1000>;
 253                         #address-cells = <1>;
 254                         #size-cells = <0>;
 255                 };
 256
 257                 i2c1: i2c@ff030000 {
 258                         compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
 259                         status = "disabled";
 260                         interrupt-parent = <&gic>;
 261                         interrupts = <0 18 4>;
 262                         reg = <0x0 0xff030000 0x0 0x1000>;
 263                         #address-cells = <1>;
 264                         #size-cells = <0>;
 265                 };
 266
 267                 pcie: pcie@fd0e0000 {
 268                         compatible = "xlnx,nwl-pcie-2.11";
 269                         status = "disabled";
 270                         #address-cells = <3>;
 271                         #size-cells = <2>;
 272                         #interrupt-cells = <1>;
 273                         msi-controller;
 274                         device_type = "pci";
 275                         interrupt-parent = <&gic>;
 276                         interrupts = <0 118 4>,
 277                                     <0 117 4>,
 278                                     <0 116 4>,
 279                                     <0 115 4>,  /* MSI_1 [63...32] */
 280                                     <0 114 4>;  /* MSI_0 [31...0] */
 281                         interrupt-names = "misc", "dummy", "intx",
 282                                           "msi1", "msi0";
 283                         msi-parent = <&pcie>;
 284                         reg = <0x0 0xfd0e0000 0x0 0x1000>,
 285                               <0x0 0xfd480000 0x0 0x1000>,
 286                               <0x80 0x00000000 0x0 0x1000000>;
 287                         reg-names = "breg", "pcireg", "cfg";
 288                         ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000  /* non-prefetchable memory */
 289                                   0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
 290                         bus-range = <0x00 0xff>;
 291                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 292                         interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
 293                                         <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
 294                                         <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
 295                                         <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
 296                         pcie_intc: legacy-interrupt-controller {
 297                                 interrupt-controller;
 298                                 #address-cells = <0>;
 299                                 #interrupt-cells = <1>;
 300                         };
 301                 };
 302
 303                 rtc: rtc@ffa60000 {
 304                         compatible = "xlnx,zynqmp-rtc";
 305                         status = "disabled";
 306                         reg = <0x0 0xffa60000 0x0 0x100>;
 307                         interrupt-parent = <&gic>;
 308                         interrupts = <0 26 4>, <0 27 4>;
 309                         interrupt-names = "alarm", "sec";
 310                         calibration = <0x8000>;
 311                 };
 312
 313                 sata: ahci@fd0c0000 {
 314                         compatible = "ceva,ahci-1v84";
 315                         status = "disabled";
 316                         reg = <0x0 0xfd0c0000 0x0 0x2000>;
 317                         interrupt-parent = <&gic>;
 318                         interrupts = <0 133 4>;
 319                 };
 320
 321                 sdhci0: sdhci@ff160000 {
 322                         compatible = "arasan,sdhci-8.9a";
 323                         status = "disabled";
 324                         interrupt-parent = <&gic>;
 325                         interrupts = <0 48 4>;
 326                         reg = <0x0 0xff160000 0x0 0x1000>;
 327                         clock-names = "clk_xin", "clk_ahb";
 328                 };
 329
 330                 sdhci1: sdhci@ff170000 {
 331                         compatible = "arasan,sdhci-8.9a";
 332                         status = "disabled";
 333                         interrupt-parent = <&gic>;
 334                         interrupts = <0 49 4>;
 335                         reg = <0x0 0xff170000 0x0 0x1000>;
 336                         clock-names = "clk_xin", "clk_ahb";
 337                 };
 338
 339                 smmu: smmu@fd800000 {
 340                         compatible = "arm,mmu-500";
 341                         reg = <0x0 0xfd800000 0x0 0x20000>;
 342                         #global-interrupts = <1>;
 343                         interrupt-parent = <&gic>;
 344                         interrupts = <0 155 4>,
 345                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 346                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 347                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 348                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 349                 };
 350
 351                 spi0: spi@ff040000 {
 352                         compatible = "cdns,spi-r1p6";
 353                         status = "disabled";
 354                         interrupt-parent = <&gic>;
 355                         interrupts = <0 19 4>;
 356                         reg = <0x0 0xff040000 0x0 0x1000>;
 357                         clock-names = "ref_clk", "pclk";
 358                         #address-cells = <1>;
 359                         #size-cells = <0>;
 360                 };
 361
 362                 spi1: spi@ff050000 {
 363                         compatible = "cdns,spi-r1p6";
 364                         status = "disabled";
 365                         interrupt-parent = <&gic>;
 366                         interrupts = <0 20 4>;
 367                         reg = <0x0 0xff050000 0x0 0x1000>;
 368                         clock-names = "ref_clk", "pclk";
 369                         #address-cells = <1>;
 370                         #size-cells = <0>;
 371                 };
 372
 373                 ttc0: timer@ff110000 {
 374                         compatible = "cdns,ttc";
 375                         status = "disabled";
 376                         interrupt-parent = <&gic>;
 377                         interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
 378                         reg = <0x0 0xff110000 0x0 0x1000>;
 379                         timer-width = <32>;
 380                 };
 381
 382                 ttc1: timer@ff120000 {
 383                         compatible = "cdns,ttc";
 384                         status = "disabled";
 385                         interrupt-parent = <&gic>;
 386                         interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
 387                         reg = <0x0 0xff120000 0x0 0x1000>;
 388                         timer-width = <32>;
 389                 };
 390
 391                 ttc2: timer@ff130000 {
 392                         compatible = "cdns,ttc";
 393                         status = "disabled";
 394                         interrupt-parent = <&gic>;
 395                         interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
 396                         reg = <0x0 0xff130000 0x0 0x1000>;
 397                         timer-width = <32>;
 398                 };
 399
 400                 ttc3: timer@ff140000 {
 401                         compatible = "cdns,ttc";
 402                         status = "disabled";
 403                         interrupt-parent = <&gic>;
 404                         interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
 405                         reg = <0x0 0xff140000 0x0 0x1000>;
 406                         timer-width = <32>;
 407                 };
 408
 409                 uart0: serial@ff000000 {
 410                         compatible = "cdns,uart-r1p8";
 411                         status = "disabled";
 412                         interrupt-parent = <&gic>;
 413                         interrupts = <0 21 4>;
 414                         reg = <0x0 0xff000000 0x0 0x1000>;
 415                         clock-names = "uart_clk", "pclk";
 416                 };
 417
 418                 uart1: serial@ff010000 {
 419                         compatible = "cdns,uart-r1p8";
 420                         status = "disabled";
 421                         interrupt-parent = <&gic>;
 422                         interrupts = <0 22 4>;
 423                         reg = <0x0 0xff010000 0x0 0x1000>;
 424                         clock-names = "uart_clk", "pclk";
 425                 };
 426
 427                 usb0: usb@fe200000 {
 428                         compatible = "snps,dwc3";
 429                         status = "disabled";
 430                         interrupt-parent = <&gic>;
 431                         interrupts = <0 65 4>;
 432                         reg = <0x0 0xfe200000 0x0 0x40000>;
 433                         clock-names = "clk_xin", "clk_ahb";
 434                 };
 435
 436                 usb1: usb@fe300000 {
 437                         compatible = "snps,dwc3";
 438                         status = "disabled";
 439                         interrupt-parent = <&gic>;
 440                         interrupts = <0 70 4>;
 441                         reg = <0x0 0xfe300000 0x0 0x40000>;
 442                         clock-names = "clk_xin", "clk_ahb";
 443                 };
 444
 445                 watchdog0: watchdog@fd4d0000 {
 446                         compatible = "cdns,wdt-r1p2";
 447                         status = "disabled";
 448                         interrupt-parent = <&gic>;
 449                         interrupts = <0 113 1>;
 450                         reg = <0x0 0xfd4d0000 0x0 0x1000>;
 451                         timeout-sec = <10>;
 452                 };
 453         };
 454 };