arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "k3-j7200-som-p0.dtsi"
   9 #include <dt-bindings/net/ti-dp83867.h>
  10
  11 / {
  12         chosen {
  13                 stdout-path = "serial2:115200n8";
  14                 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
  15         };
  16 };
  17
  18 &wkup_pmx0 {
  19         mcu_cpsw_pins_default: mcu-cpsw-pins-default {
  20                 pinctrl-single,pins = <
  21                         J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
  22                         J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
  23                         J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
  24                         J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
  25                         J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
  26                         J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
  27                         J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
  28                         J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
  29                         J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
  30                         J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
  31                         J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_TXC */
  32                         J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
  33                 >;
  34         };
  35
  36         mcu_mdio_pins_default: mcu-mdio1-pins-default {
  37                 pinctrl-single,pins = <
  38                         J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
  39                         J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
  40                 >;
  41         };
  42 };
  43
  44 &wkup_uart0 {
  45         /* Wakeup UART is used by System firmware */
  46         status = "disabled";
  47 };
  48
  49 &main_uart0 {
  50         /* Shared with ATF on this platform */
  51         power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
  52 };
  53
  54 &main_uart2 {
  55         /* MAIN UART 2 is used by R5F firmware */
  56         status = "disabled";
  57 };
  58
  59 &main_uart3 {
  60         /* UART not brought out */
  61         status = "disabled";
  62 };
  63
  64 &main_uart4 {
  65         /* UART not brought out */
  66         status = "disabled";
  67 };
  68
  69 &main_uart5 {
  70         /* UART not brought out */
  71         status = "disabled";
  72 };
  73
  74 &main_uart6 {
  75         /* UART not brought out */
  76         status = "disabled";
  77 };
  78
  79 &main_uart7 {
  80         /* UART not brought out */
  81         status = "disabled";
  82 };
  83
  84 &main_uart8 {
  85         /* UART not brought out */
  86         status = "disabled";
  87 };
  88
  89 &main_uart9 {
  90         /* UART not brought out */
  91         status = "disabled";
  92 };
  93
  94 &mcu_cpsw {
  95         pinctrl-names = "default";
  96         pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
  97 };
  98
  99 &davinci_mdio {
 100         phy0: ethernet-phy@0 {
 101                 reg = <0>;
 102                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 103                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 104         };
 105 };
 106
 107 &cpsw_port1 {
 108         phy-mode = "rgmii-rxid";
 109         phy-handle = <&phy0>;
 110 };