arch/arm64/boot/dts/ti/k3-am654-base-board.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "k3-am654.dtsi"
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/net/ti-dp83867.h>
  11
  12 / {
  13         compatible =  "ti,am654-evm", "ti,am654";
  14         model = "Texas Instruments AM654 Base Board";
  15
  16         chosen {
  17                 stdout-path = "serial2:115200n8";
  18                 bootargs = "earlycon=ns16550a,mmio32,0x02800000";
  19         };
  20
  21         memory@80000000 {
  22                 device_type = "memory";
  23                 /* 4G RAM */
  24                 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
  25                       <0x00000008 0x80000000 0x00000000 0x80000000>;
  26         };
  27
  28         reserved-memory {
  29                 #address-cells = <2>;
  30                 #size-cells = <2>;
  31                 ranges;
  32                 secure_ddr: secure-ddr@9e800000 {
  33                         reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
  34                         alignment = <0x1000>;
  35                         no-map;
  36                 };
  37         };
  38
  39         gpio-keys {
  40                 compatible = "gpio-keys";
  41                 autorepeat;
  42                 pinctrl-names = "default";
  43                 pinctrl-0 = <&push_button_pins_default>;
  44
  45                 sw5 {
  46                         label = "GPIO Key USER1";
  47                         linux,code = <BTN_0>;
  48                         gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
  49                 };
  50
  51                 sw6 {
  52                         label = "GPIO Key USER2";
  53                         linux,code = <BTN_1>;
  54                         gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
  55                 };
  56         };
  57
  58         clk_ov5640_fixed: clock {
  59                 compatible = "fixed-clock";
  60                 #clock-cells = <0>;
  61                 clock-frequency = <24000000>;
  62         };
  63 };
  64
  65 &wkup_pmx0 {
  66         wkup_i2c0_pins_default: wkup-i2c0-pins-default {
  67                 pinctrl-single,pins = <
  68                         AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
  69                         AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
  70                 >;
  71         };
  72
  73         push_button_pins_default: push-button-pins-default {
  74                 pinctrl-single,pins = <
  75                         AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
  76                         AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
  77                 >;
  78         };
  79
  80         mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
  81                 pinctrl-single,pins = <
  82                         AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
  83                         AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)   /* (U2) MCU_OSPI0_DQS */
  84                         AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */
  85                         AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */
  86                         AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */
  87                         AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */
  88                         AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */
  89                         AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */
  90                         AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */
  91                         AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
  92                         AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
  93                 >;
  94         };
  95
  96         wkup_pca554_default: wkup-pca554-default {
  97                 pinctrl-single,pins = <
  98                         AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
  99                 >;
 100         };
 101
 102         mcu_cpsw_pins_default: mcu-cpsw-pins-default {
 103                 pinctrl-single,pins = <
 104                         AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
 105                         AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
 106                         AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
 107                         AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
 108                         AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
 109                         AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
 110                         AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
 111                         AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
 112                         AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
 113                         AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
 114                         AM65X_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* (N1) MCU_RGMII1_TXC */
 115                         AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
 116                 >;
 117         };
 118
 119         mcu_mdio_pins_default: mcu-mdio1-pins-default {
 120                 pinctrl-single,pins = <
 121                         AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
 122                         AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
 123                 >;
 124         };
 125 };
 126
 127 &main_pmx0 {
 128         main_uart0_pins_default: main-uart0-pins-default {
 129                 pinctrl-single,pins = <
 130                         AM65X_IOPAD(0x01e4, PIN_INPUT, 0)       /* (AF11) UART0_RXD */
 131                         AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)      /* (AE11) UART0_TXD */
 132                         AM65X_IOPAD(0x01ec, PIN_INPUT, 0)       /* (AG11) UART0_CTSn */
 133                         AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)      /* (AD11) UART0_RTSn */
 134                 >;
 135         };
 136
 137         main_i2c2_pins_default: main-i2c2-pins-default {
 138                 pinctrl-single,pins = <
 139                         AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
 140                         AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
 141                 >;
 142         };
 143
 144         main_spi0_pins_default: main-spi0-pins-default {
 145                 pinctrl-single,pins = <
 146                         AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
 147                         AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
 148                         AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
 149                         AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
 150                 >;
 151         };
 152
 153         main_mmc0_pins_default: main-mmc0-pins-default {
 154                 pinctrl-single,pins = <
 155                         AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
 156                         AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
 157                         AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
 158                         AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
 159                         AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
 160                         AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
 161                         AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
 162                         AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
 163                         AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
 164                         AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
 165                         AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
 166                         AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
 167                 >;
 168         };
 169
 170         main_mmc1_pins_default: main-mmc1-pins-default {
 171                 pinctrl-single,pins = <
 172                         AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
 173                         AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
 174                         AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
 175                         AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
 176                         AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
 177                         AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
 178                         AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
 179                         AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
 180                 >;
 181         };
 182
 183         usb1_pins_default: usb1-pins-default {
 184                 pinctrl-single,pins = <
 185                         AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
 186                 >;
 187         };
 188 };
 189
 190 &main_pmx1 {
 191         main_i2c0_pins_default: main-i2c0-pins-default {
 192                 pinctrl-single,pins = <
 193                         AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
 194                         AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
 195                 >;
 196         };
 197
 198         main_i2c1_pins_default: main-i2c1-pins-default {
 199                 pinctrl-single,pins = <
 200                         AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
 201                         AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
 202                 >;
 203         };
 204
 205         ecap0_pins_default: ecap0-pins-default {
 206                 pinctrl-single,pins = <
 207                         AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
 208                 >;
 209         };
 210 };
 211
 212 &wkup_uart0 {
 213         /* Wakeup UART is used by System firmware */
 214         status = "disabled";
 215 };
 216
 217 &main_uart0 {
 218         pinctrl-names = "default";
 219         pinctrl-0 = <&main_uart0_pins_default>;
 220         power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
 221 };
 222
 223 &wkup_i2c0 {
 224         pinctrl-names = "default";
 225         pinctrl-0 = <&wkup_i2c0_pins_default>;
 226         clock-frequency = <400000>;
 227
 228         pca9554: gpio@39 {
 229                 compatible = "nxp,pca9554";
 230                 reg = <0x39>;
 231                 gpio-controller;
 232                 #gpio-cells = <2>;
 233                 pinctrl-names = "default";
 234                 pinctrl-0 = <&wkup_pca554_default>;
 235                 interrupt-parent = <&wkup_gpio0>;
 236                 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
 237                 interrupt-controller;
 238                 #interrupt-cells = <2>;
 239         };
 240 };
 241
 242 &main_i2c0 {
 243         pinctrl-names = "default";
 244         pinctrl-0 = <&main_i2c0_pins_default>;
 245         clock-frequency = <400000>;
 246
 247         pca9555: gpio@21 {
 248                 compatible = "nxp,pca9555";
 249                 reg = <0x21>;
 250                 gpio-controller;
 251                 #gpio-cells = <2>;
 252         };
 253 };
 254
 255 &main_i2c1 {
 256         pinctrl-names = "default";
 257         pinctrl-0 = <&main_i2c1_pins_default>;
 258         clock-frequency = <400000>;
 259
 260         ov5640: camera@3c {
 261                 compatible = "ovti,ov5640";
 262                 reg = <0x3c>;
 263
 264                 clocks = <&clk_ov5640_fixed>;
 265                 clock-names = "xclk";
 266
 267                 port {
 268                         csi2_cam0: endpoint {
 269                                 remote-endpoint = <&csi2_phy0>;
 270                                 clock-lanes = <0>;
 271                                 data-lanes = <1 2>;
 272                         };
 273                 };
 274         };
 275
 276 };
 277
 278 &main_i2c2 {
 279         pinctrl-names = "default";
 280         pinctrl-0 = <&main_i2c2_pins_default>;
 281         clock-frequency = <400000>;
 282 };
 283
 284 &ecap0 {
 285         pinctrl-names = "default";
 286         pinctrl-0 = <&ecap0_pins_default>;
 287 };
 288
 289 &main_spi0 {
 290         pinctrl-names = "default";
 291         pinctrl-0 = <&main_spi0_pins_default>;
 292         #address-cells = <1>;
 293         #size-cells= <0>;
 294         ti,pindir-d0-out-d1-in = <1>;
 295
 296         flash@0{
 297                 compatible = "jedec,spi-nor";
 298                 reg = <0x0>;
 299                 spi-tx-bus-width = <1>;
 300                 spi-rx-bus-width = <1>;
 301                 spi-max-frequency = <48000000>;
 302                 #address-cells = <1>;
 303                 #size-cells= <1>;
 304         };
 305 };
 306
 307 &sdhci0 {
 308         pinctrl-names = "default";
 309         pinctrl-0 = <&main_mmc0_pins_default>;
 310         bus-width = <8>;
 311         non-removable;
 312         ti,driver-strength-ohm = <50>;
 313         disable-wp;
 314 };
 315
 316 /*
 317  * Because of erratas i2025 and i2026 for silicon revision 1.0, the
 318  * SD card interface might fail. Boards with sr1.0 are recommended to
 319  * disable sdhci1
 320  */
 321 &sdhci1 {
 322         pinctrl-names = "default";
 323         pinctrl-0 = <&main_mmc1_pins_default>;
 324         ti,driver-strength-ohm = <50>;
 325         disable-wp;
 326 };
 327
 328 &dwc3_1 {
 329         status = "okay";
 330 };
 331
 332 &usb1_phy {
 333         status = "okay";
 334 };
 335
 336 &usb1 {
 337         pinctrl-names = "default";
 338         pinctrl-0 = <&usb1_pins_default>;
 339         dr_mode = "otg";
 340 };
 341
 342 &dwc3_0 {
 343         status = "disabled";
 344 };
 345
 346 &usb0_phy {
 347         status = "disabled";
 348 };
 349
 350 &tscadc0 {
 351         adc {
 352                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
 353         };
 354 };
 355
 356 &tscadc1 {
 357         adc {
 358                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
 359         };
 360 };
 361
 362 &serdes0 {
 363         status = "disabled";
 364 };
 365
 366 &serdes1 {
 367         status = "disabled";
 368 };
 369
 370 &pcie0_rc {
 371         status = "disabled";
 372 };
 373
 374 &pcie0_ep {
 375         status = "disabled";
 376 };
 377
 378 &pcie1_rc {
 379         status = "disabled";
 380 };
 381
 382 &pcie1_ep {
 383         status = "disabled";
 384 };
 385
 386 &mailbox0_cluster0 {
 387         interrupts = <436>;
 388
 389         mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
 390                 ti,mbox-tx = <1 0 0>;
 391                 ti,mbox-rx = <0 0 0>;
 392         };
 393 };
 394
 395 &mailbox0_cluster1 {
 396         interrupts = <432>;
 397
 398         mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
 399                 ti,mbox-tx = <1 0 0>;
 400                 ti,mbox-rx = <0 0 0>;
 401         };
 402 };
 403
 404 &mailbox0_cluster2 {
 405         status = "disabled";
 406 };
 407
 408 &mailbox0_cluster3 {
 409         status = "disabled";
 410 };
 411
 412 &mailbox0_cluster4 {
 413         status = "disabled";
 414 };
 415
 416 &mailbox0_cluster5 {
 417         status = "disabled";
 418 };
 419
 420 &mailbox0_cluster6 {
 421         status = "disabled";
 422 };
 423
 424 &mailbox0_cluster7 {
 425         status = "disabled";
 426 };
 427
 428 &mailbox0_cluster8 {
 429         status = "disabled";
 430 };
 431
 432 &mailbox0_cluster9 {
 433         status = "disabled";
 434 };
 435
 436 &mailbox0_cluster10 {
 437         status = "disabled";
 438 };
 439
 440 &mailbox0_cluster11 {
 441         status = "disabled";
 442 };
 443
 444 &ospi0 {
 445         pinctrl-names = "default";
 446         pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 447
 448         flash@0{
 449                 compatible = "jedec,spi-nor";
 450                 reg = <0x0>;
 451                 spi-tx-bus-width = <1>;
 452                 spi-rx-bus-width = <8>;
 453                 spi-max-frequency = <40000000>;
 454                 cdns,tshsl-ns = <60>;
 455                 cdns,tsd2d-ns = <60>;
 456                 cdns,tchsh-ns = <60>;
 457                 cdns,tslch-ns = <60>;
 458                 cdns,read-delay = <0>;
 459                 #address-cells = <1>;
 460                 #size-cells = <1>;
 461         };
 462 };
 463
 464 &csi2_0 {
 465         csi2_phy0: endpoint {
 466                 remote-endpoint = <&csi2_cam0>;
 467                 clock-lanes = <0>;
 468                 data-lanes = <1 2>;
 469         };
 470 };
 471
 472 &mcu_cpsw {
 473         pinctrl-names = "default";
 474         pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
 475 };
 476
 477 &davinci_mdio {
 478         phy0: ethernet-phy@0 {
 479                 reg = <0>;
 480                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 481                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 482         };
 483 };
 484
 485 &cpsw_port1 {
 486         phy-mode = "rgmii-rxid";
 487         phy-handle = <&phy0>;
 488 };