arch/arm64/boot/dts/ti/k3-am654-base-board.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "k3-am654.dtsi"
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/net/ti-dp83867.h>
  11
  12 / {
  13         compatible = "ti,am654-evm", "ti,am654";
  14         model = "Texas Instruments AM654 Base Board";
  15
  16         chosen {
  17                 stdout-path = "serial2:115200n8";
  18         };
  19
  20         memory@80000000 {
  21                 device_type = "memory";
  22                 /* 4G RAM */
  23                 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
  24                       <0x00000008 0x80000000 0x00000000 0x80000000>;
  25         };
  26
  27         reserved-memory {
  28                 #address-cells = <2>;
  29                 #size-cells = <2>;
  30                 ranges;
  31
  32                 secure_ddr: secure-ddr@9e800000 {
  33                         reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
  34                         alignment = <0x1000>;
  35                         no-map;
  36                 };
  37
  38                 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
  39                         compatible = "shared-dma-pool";
  40                         reg = <0 0xa0000000 0 0x100000>;
  41                         no-map;
  42                 };
  43
  44                 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
  45                         compatible = "shared-dma-pool";
  46                         reg = <0 0xa0100000 0 0xf00000>;
  47                         no-map;
  48                 };
  49
  50                 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
  51                         compatible = "shared-dma-pool";
  52                         reg = <0 0xa1000000 0 0x100000>;
  53                         no-map;
  54                 };
  55
  56                 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
  57                         compatible = "shared-dma-pool";
  58                         reg = <0 0xa1100000 0 0xf00000>;
  59                         no-map;
  60                 };
  61
  62                 rtos_ipc_memory_region: ipc-memories@a2000000 {
  63                         reg = <0x00 0xa2000000 0x00 0x00100000>;
  64                         alignment = <0x1000>;
  65                         no-map;
  66                 };
  67         };
  68
  69         gpio-keys {
  70                 compatible = "gpio-keys";
  71                 autorepeat;
  72                 pinctrl-names = "default";
  73                 pinctrl-0 = <&push_button_pins_default>;
  74
  75                 switch-5 {
  76                         label = "GPIO Key USER1";
  77                         linux,code = <BTN_0>;
  78                         gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
  79                 };
  80
  81                 switch-6 {
  82                         label = "GPIO Key USER2";
  83                         linux,code = <BTN_1>;
  84                         gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
  85                 };
  86         };
  87
  88         evm_12v0: fixedregulator-evm12v0 {
  89                 /* main supply */
  90                 compatible = "regulator-fixed";
  91                 regulator-name = "evm_12v0";
  92                 regulator-min-microvolt = <12000000>;
  93                 regulator-max-microvolt = <12000000>;
  94                 regulator-always-on;
  95                 regulator-boot-on;
  96         };
  97
  98         vcc3v3_io: fixedregulator-vcc3v3io {
  99                 /* Output of TPS54334 */
 100                 compatible = "regulator-fixed";
 101                 regulator-name = "vcc3v3_io";
 102                 regulator-min-microvolt = <3300000>;
 103                 regulator-max-microvolt = <3300000>;
 104                 regulator-always-on;
 105                 regulator-boot-on;
 106                 vin-supply = <&evm_12v0>;
 107         };
 108
 109         vdd_mmc1_sd: fixedregulator-sd {
 110                 compatible = "regulator-fixed";
 111                 regulator-name = "vdd_mmc1_sd";
 112                 regulator-min-microvolt = <3300000>;
 113                 regulator-max-microvolt = <3300000>;
 114                 regulator-boot-on;
 115                 enable-active-high;
 116                 vin-supply = <&vcc3v3_io>;
 117                 gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
 118         };
 119 };
 120
 121 &wkup_pmx0 {
 122         wkup_i2c0_pins_default: wkup-i2c0-pins-default {
 123                 pinctrl-single,pins = <
 124                         AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
 125                         AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
 126                 >;
 127         };
 128
 129         push_button_pins_default: push-button-pins-default {
 130                 pinctrl-single,pins = <
 131                         AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
 132                         AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
 133                 >;
 134         };
 135
 136         mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
 137                 pinctrl-single,pins = <
 138                         AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
 139                         AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)   /* (U2) MCU_OSPI0_DQS */
 140                         AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */
 141                         AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */
 142                         AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */
 143                         AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */
 144                         AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */
 145                         AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */
 146                         AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */
 147                         AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
 148                         AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
 149                 >;
 150         };
 151
 152         wkup_pca554_default: wkup-pca554-default {
 153                 pinctrl-single,pins = <
 154                         AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
 155                 >;
 156         };
 157
 158         mcu_cpsw_pins_default: mcu-cpsw-pins-default {
 159                 pinctrl-single,pins = <
 160                         AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
 161                         AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
 162                         AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
 163                         AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
 164                         AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
 165                         AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
 166                         AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
 167                         AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
 168                         AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
 169                         AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
 170                         AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */
 171                         AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
 172                 >;
 173         };
 174
 175         mcu_mdio_pins_default: mcu-mdio1-pins-default {
 176                 pinctrl-single,pins = <
 177                         AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
 178                         AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
 179                 >;
 180         };
 181 };
 182
 183 &main_pmx0 {
 184         main_uart0_pins_default: main-uart0-pins-default {
 185                 pinctrl-single,pins = <
 186                         AM65X_IOPAD(0x01e4, PIN_INPUT, 0)       /* (AF11) UART0_RXD */
 187                         AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)      /* (AE11) UART0_TXD */
 188                         AM65X_IOPAD(0x01ec, PIN_INPUT, 0)       /* (AG11) UART0_CTSn */
 189                         AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)      /* (AD11) UART0_RTSn */
 190                 >;
 191         };
 192
 193         main_i2c2_pins_default: main-i2c2-pins-default {
 194                 pinctrl-single,pins = <
 195                         AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
 196                         AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
 197                 >;
 198         };
 199
 200         main_spi0_pins_default: main-spi0-pins-default {
 201                 pinctrl-single,pins = <
 202                         AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
 203                         AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
 204                         AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
 205                         AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
 206                 >;
 207         };
 208
 209         main_mmc0_pins_default: main-mmc0-pins-default {
 210                 pinctrl-single,pins = <
 211                         AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
 212                         AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
 213                         AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
 214                         AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
 215                         AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
 216                         AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
 217                         AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
 218                         AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
 219                         AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
 220                         AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
 221                         AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
 222                         AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
 223                 >;
 224         };
 225
 226         main_mmc1_pins_default: main-mmc1-pins-default {
 227                 pinctrl-single,pins = <
 228                         AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
 229                         AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
 230                         AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
 231                         AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
 232                         AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
 233                         AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
 234                         AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
 235                         AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
 236                 >;
 237         };
 238
 239         usb1_pins_default: usb1-pins-default {
 240                 pinctrl-single,pins = <
 241                         AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
 242                 >;
 243         };
 244 };
 245
 246 &main_pmx1 {
 247         main_i2c0_pins_default: main-i2c0-pins-default {
 248                 pinctrl-single,pins = <
 249                         AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
 250                         AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
 251                 >;
 252         };
 253
 254         main_i2c1_pins_default: main-i2c1-pins-default {
 255                 pinctrl-single,pins = <
 256                         AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
 257                         AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
 258                 >;
 259         };
 260
 261         ecap0_pins_default: ecap0-pins-default {
 262                 pinctrl-single,pins = <
 263                         AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
 264                 >;
 265         };
 266 };
 267
 268 &wkup_uart0 {
 269         /* Wakeup UART is used by System firmware */
 270         status = "reserved";
 271 };
 272
 273 &mcu_uart0 {
 274         status = "okay";
 275         /* Default pinmux */
 276 };
 277
 278 &main_uart0 {
 279         status = "okay";
 280         pinctrl-names = "default";
 281         pinctrl-0 = <&main_uart0_pins_default>;
 282         power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
 283 };
 284
 285 &wkup_i2c0 {
 286         status = "okay";
 287         pinctrl-names = "default";
 288         pinctrl-0 = <&wkup_i2c0_pins_default>;
 289         clock-frequency = <400000>;
 290
 291         pca9554: gpio@39 {
 292                 compatible = "nxp,pca9554";
 293                 reg = <0x39>;
 294                 gpio-controller;
 295                 #gpio-cells = <2>;
 296                 pinctrl-names = "default";
 297                 pinctrl-0 = <&wkup_pca554_default>;
 298                 interrupt-parent = <&wkup_gpio0>;
 299                 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
 300                 interrupt-controller;
 301                 #interrupt-cells = <2>;
 302         };
 303 };
 304
 305 &mcu_i2c0 {
 306         status = "okay";
 307         /* Default pinmux */
 308 };
 309
 310 &main_i2c0 {
 311         status = "okay";
 312         pinctrl-names = "default";
 313         pinctrl-0 = <&main_i2c0_pins_default>;
 314         clock-frequency = <400000>;
 315
 316         pca9555: gpio@21 {
 317                 compatible = "nxp,pca9555";
 318                 reg = <0x21>;
 319                 gpio-controller;
 320                 #gpio-cells = <2>;
 321         };
 322 };
 323
 324 &main_i2c1 {
 325         status = "okay";
 326         pinctrl-names = "default";
 327         pinctrl-0 = <&main_i2c1_pins_default>;
 328         clock-frequency = <400000>;
 329 };
 330
 331 &main_i2c2 {
 332         status = "okay";
 333         pinctrl-names = "default";
 334         pinctrl-0 = <&main_i2c2_pins_default>;
 335         clock-frequency = <400000>;
 336 };
 337
 338 &ecap0 {
 339         status = "okay";
 340         pinctrl-names = "default";
 341         pinctrl-0 = <&ecap0_pins_default>;
 342 };
 343
 344 &main_spi0 {
 345         status = "okay";
 346         pinctrl-names = "default";
 347         pinctrl-0 = <&main_spi0_pins_default>;
 348         #address-cells = <1>;
 349         #size-cells = <0>;
 350         ti,pindir-d0-out-d1-in;
 351
 352         flash@0 {
 353                 compatible = "jedec,spi-nor";
 354                 reg = <0x0>;
 355                 spi-tx-bus-width = <1>;
 356                 spi-rx-bus-width = <1>;
 357                 spi-max-frequency = <48000000>;
 358         };
 359 };
 360
 361 &sdhci0 {
 362         pinctrl-names = "default";
 363         pinctrl-0 = <&main_mmc0_pins_default>;
 364         bus-width = <8>;
 365         non-removable;
 366         ti,driver-strength-ohm = <50>;
 367         disable-wp;
 368 };
 369
 370 /*
 371  * Because of erratas i2025 and i2026 for silicon revision 1.0, the
 372  * SD card interface might fail. Boards with sr1.0 are recommended to
 373  * disable sdhci1
 374  */
 375 &sdhci1 {
 376         vmmc-supply = <&vdd_mmc1_sd>;
 377         pinctrl-names = "default";
 378         pinctrl-0 = <&main_mmc1_pins_default>;
 379         ti,driver-strength-ohm = <50>;
 380         disable-wp;
 381 };
 382
 383 &usb1 {
 384         pinctrl-names = "default";
 385         pinctrl-0 = <&usb1_pins_default>;
 386         dr_mode = "otg";
 387 };
 388
 389 &dwc3_0 {
 390         status = "disabled";
 391 };
 392
 393 &usb0_phy {
 394         status = "disabled";
 395 };
 396
 397 &tscadc0 {
 398         adc {
 399                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
 400         };
 401 };
 402
 403 &tscadc1 {
 404         adc {
 405                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
 406         };
 407 };
 408
 409 &serdes0 {
 410         status = "disabled";
 411 };
 412
 413 &serdes1 {
 414         status = "disabled";
 415 };
 416
 417 &mailbox0_cluster0 {
 418         status = "okay";
 419         interrupts = <436>;
 420
 421         mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
 422                 ti,mbox-tx = <1 0 0>;
 423                 ti,mbox-rx = <0 0 0>;
 424         };
 425 };
 426
 427 &mailbox0_cluster1 {
 428         status = "okay";
 429         interrupts = <432>;
 430
 431         mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
 432                 ti,mbox-tx = <1 0 0>;
 433                 ti,mbox-rx = <0 0 0>;
 434         };
 435 };
 436
 437 &mcu_r5fss0_core0 {
 438         memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 439                         <&mcu_r5fss0_core0_memory_region>;
 440         mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
 441 };
 442
 443 &mcu_r5fss0_core1 {
 444         memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 445                         <&mcu_r5fss0_core1_memory_region>;
 446         mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
 447 };
 448
 449 &ospi0 {
 450         pinctrl-names = "default";
 451         pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 452
 453         flash@0 {
 454                 compatible = "jedec,spi-nor";
 455                 reg = <0x0>;
 456                 spi-tx-bus-width = <8>;
 457                 spi-rx-bus-width = <8>;
 458                 spi-max-frequency = <25000000>;
 459                 cdns,tshsl-ns = <60>;
 460                 cdns,tsd2d-ns = <60>;
 461                 cdns,tchsh-ns = <60>;
 462                 cdns,tslch-ns = <60>;
 463                 cdns,read-delay = <0>;
 464         };
 465 };
 466
 467 &mcu_cpsw {
 468         pinctrl-names = "default";
 469         pinctrl-0 = <&mcu_cpsw_pins_default>;
 470 };
 471
 472 &davinci_mdio {
 473         status = "okay";
 474         pinctrl-names = "default";
 475         pinctrl-0 = <&mcu_mdio_pins_default>;
 476
 477         phy0: ethernet-phy@0 {
 478                 reg = <0>;
 479                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 480                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 481         };
 482 };
 483
 484 &cpsw_port1 {
 485         phy-mode = "rgmii-rxid";
 486         phy-handle = <&phy0>;
 487 };
 488
 489 &dss {
 490         status = "disabled";
 491 };