arch/arm64/boot/dts/rockchip/rk3568.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
   4  */
   5
   6 #include "rk356x.dtsi"
   7
   8 / {
   9         compatible = "rockchip,rk3568";
  10
  11         qos_pcie3x1: qos@fe190080 {
  12                 compatible = "rockchip,rk3568-qos", "syscon";
  13                 reg = <0x0 0xfe190080 0x0 0x20>;
  14         };
  15
  16         qos_pcie3x2: qos@fe190100 {
  17                 compatible = "rockchip,rk3568-qos", "syscon";
  18                 reg = <0x0 0xfe190100 0x0 0x20>;
  19         };
  20
  21         qos_sata0: qos@fe190200 {
  22                 compatible = "rockchip,rk3568-qos", "syscon";
  23                 reg = <0x0 0xfe190200 0x0 0x20>;
  24         };
  25 };
  26
  27 &cpu0_opp_table {
  28         opp-1992000000 {
  29                 opp-hz = /bits/ 64 <1992000000>;
  30                 opp-microvolt = <1150000 1150000 1150000>;
  31         };
  32 };
  33
  34 &power {
  35         power-domain@RK3568_PD_PIPE {
  36                 reg = <RK3568_PD_PIPE>;
  37                 clocks = <&cru PCLK_PIPE>;
  38                 pm_qos = <&qos_pcie2x1>,
  39                          <&qos_pcie3x1>,
  40                          <&qos_pcie3x2>,
  41                          <&qos_sata0>,
  42                          <&qos_sata1>,
  43                          <&qos_sata2>,
  44                          <&qos_usb3_0>,
  45                          <&qos_usb3_1>;
  46                 #power-domain-cells = <0>;
  47         };
  48 };