arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
   4  */
   5
   6 #include <dt-bindings/pinctrl/rockchip.h>
   7 #include "rockchip-pinconf.dtsi"
   8
   9 /*
  10  * This file is auto generated by pin2dts tool, please keep these code
  11  * by adding changes at end of this file.
  12  */
  13 &pinctrl {
  14         acodec {
  15                 /omit-if-no-ref/
  16                 acodec_pins: acodec-pins {
  17                         rockchip,pins =
  18                                 /* acodec_adc_sync */
  19                                 <1 RK_PB1 5 &pcfg_pull_none>,
  20                                 /* acodec_adcclk */
  21                                 <1 RK_PA1 5 &pcfg_pull_none>,
  22                                 /* acodec_adcdata */
  23                                 <1 RK_PA0 5 &pcfg_pull_none>,
  24                                 /* acodec_dac_datal */
  25                                 <1 RK_PA7 5 &pcfg_pull_none>,
  26                                 /* acodec_dac_datar */
  27                                 <1 RK_PB0 5 &pcfg_pull_none>,
  28                                 /* acodec_dacclk */
  29                                 <1 RK_PA3 5 &pcfg_pull_none>,
  30                                 /* acodec_dacsync */
  31                                 <1 RK_PA5 5 &pcfg_pull_none>;
  32                 };
  33         };
  34
  35         audiopwm {
  36                 /omit-if-no-ref/
  37                 audiopwm_lout: audiopwm-lout {
  38                         rockchip,pins =
  39                                 /* audiopwm_lout */
  40                                 <1 RK_PA0 4 &pcfg_pull_none>;
  41                 };
  42
  43                 /omit-if-no-ref/
  44                 audiopwm_loutn: audiopwm-loutn {
  45                         rockchip,pins =
  46                                 /* audiopwm_loutn */
  47                                 <1 RK_PA1 6 &pcfg_pull_none>;
  48                 };
  49
  50                 /omit-if-no-ref/
  51                 audiopwm_loutp: audiopwm-loutp {
  52                         rockchip,pins =
  53                                 /* audiopwm_loutp */
  54                                 <1 RK_PA0 6 &pcfg_pull_none>;
  55                 };
  56
  57                 /omit-if-no-ref/
  58                 audiopwm_rout: audiopwm-rout {
  59                         rockchip,pins =
  60                                 /* audiopwm_rout */
  61                                 <1 RK_PA1 4 &pcfg_pull_none>;
  62                 };
  63
  64                 /omit-if-no-ref/
  65                 audiopwm_routn: audiopwm-routn {
  66                         rockchip,pins =
  67                                 /* audiopwm_routn */
  68                                 <1 RK_PA7 4 &pcfg_pull_none>;
  69                 };
  70
  71                 /omit-if-no-ref/
  72                 audiopwm_routp: audiopwm-routp {
  73                         rockchip,pins =
  74                                 /* audiopwm_routp */
  75                                 <1 RK_PA6 4 &pcfg_pull_none>;
  76                 };
  77         };
  78
  79         bt656 {
  80                 /omit-if-no-ref/
  81                 bt656m0_pins: bt656m0-pins {
  82                         rockchip,pins =
  83                                 /* bt656_clkm0 */
  84                                 <3 RK_PA0 2 &pcfg_pull_none>,
  85                                 /* bt656_d0m0 */
  86                                 <2 RK_PD0 2 &pcfg_pull_none>,
  87                                 /* bt656_d1m0 */
  88                                 <2 RK_PD1 2 &pcfg_pull_none>,
  89                                 /* bt656_d2m0 */
  90                                 <2 RK_PD2 2 &pcfg_pull_none>,
  91                                 /* bt656_d3m0 */
  92                                 <2 RK_PD3 2 &pcfg_pull_none>,
  93                                 /* bt656_d4m0 */
  94                                 <2 RK_PD4 2 &pcfg_pull_none>,
  95                                 /* bt656_d5m0 */
  96                                 <2 RK_PD5 2 &pcfg_pull_none>,
  97                                 /* bt656_d6m0 */
  98                                 <2 RK_PD6 2 &pcfg_pull_none>,
  99                                 /* bt656_d7m0 */
 100                                 <2 RK_PD7 2 &pcfg_pull_none>;
 101                 };
 102
 103                 /omit-if-no-ref/
 104                 bt656m1_pins: bt656m1-pins {
 105                         rockchip,pins =
 106                                 /* bt656_clkm1 */
 107                                 <4 RK_PB4 5 &pcfg_pull_none>,
 108                                 /* bt656_d0m1 */
 109                                 <3 RK_PC6 5 &pcfg_pull_none>,
 110                                 /* bt656_d1m1 */
 111                                 <3 RK_PC7 5 &pcfg_pull_none>,
 112                                 /* bt656_d2m1 */
 113                                 <3 RK_PD0 5 &pcfg_pull_none>,
 114                                 /* bt656_d3m1 */
 115                                 <3 RK_PD1 5 &pcfg_pull_none>,
 116                                 /* bt656_d4m1 */
 117                                 <3 RK_PD2 5 &pcfg_pull_none>,
 118                                 /* bt656_d5m1 */
 119                                 <3 RK_PD3 5 &pcfg_pull_none>,
 120                                 /* bt656_d6m1 */
 121                                 <3 RK_PD4 5 &pcfg_pull_none>,
 122                                 /* bt656_d7m1 */
 123                                 <3 RK_PD5 5 &pcfg_pull_none>;
 124                 };
 125         };
 126
 127         bt1120 {
 128                 /omit-if-no-ref/
 129                 bt1120_pins: bt1120-pins {
 130                         rockchip,pins =
 131                                 /* bt1120_clk */
 132                                 <3 RK_PA6 2 &pcfg_pull_none>,
 133                                 /* bt1120_d0 */
 134                                 <3 RK_PA1 2 &pcfg_pull_none>,
 135                                 /* bt1120_d1 */
 136                                 <3 RK_PA2 2 &pcfg_pull_none>,
 137                                 /* bt1120_d2 */
 138                                 <3 RK_PA3 2 &pcfg_pull_none>,
 139                                 /* bt1120_d3 */
 140                                 <3 RK_PA4 2 &pcfg_pull_none>,
 141                                 /* bt1120_d4 */
 142                                 <3 RK_PA5 2 &pcfg_pull_none>,
 143                                 /* bt1120_d5 */
 144                                 <3 RK_PA7 2 &pcfg_pull_none>,
 145                                 /* bt1120_d6 */
 146                                 <3 RK_PB0 2 &pcfg_pull_none>,
 147                                 /* bt1120_d7 */
 148                                 <3 RK_PB1 2 &pcfg_pull_none>,
 149                                 /* bt1120_d8 */
 150                                 <3 RK_PB2 2 &pcfg_pull_none>,
 151                                 /* bt1120_d9 */
 152                                 <3 RK_PB3 2 &pcfg_pull_none>,
 153                                 /* bt1120_d10 */
 154                                 <3 RK_PB4 2 &pcfg_pull_none>,
 155                                 /* bt1120_d11 */
 156                                 <3 RK_PB5 2 &pcfg_pull_none>,
 157                                 /* bt1120_d12 */
 158                                 <3 RK_PB6 2 &pcfg_pull_none>,
 159                                 /* bt1120_d13 */
 160                                 <3 RK_PC1 2 &pcfg_pull_none>,
 161                                 /* bt1120_d14 */
 162                                 <3 RK_PC2 2 &pcfg_pull_none>,
 163                                 /* bt1120_d15 */
 164                                 <3 RK_PC3 2 &pcfg_pull_none>;
 165                 };
 166         };
 167
 168         cam {
 169                 /omit-if-no-ref/
 170                 cam_clkout0: cam-clkout0 {
 171                         rockchip,pins =
 172                                 /* cam_clkout0 */
 173                                 <4 RK_PA7 1 &pcfg_pull_none>;
 174                 };
 175
 176                 /omit-if-no-ref/
 177                 cam_clkout1: cam-clkout1 {
 178                         rockchip,pins =
 179                                 /* cam_clkout1 */
 180                                 <4 RK_PB0 1 &pcfg_pull_none>;
 181                 };
 182         };
 183
 184         can0 {
 185                 /omit-if-no-ref/
 186                 can0m0_pins: can0m0-pins {
 187                         rockchip,pins =
 188                                 /* can0_rxm0 */
 189                                 <0 RK_PB4 2 &pcfg_pull_none>,
 190                                 /* can0_txm0 */
 191                                 <0 RK_PB3 2 &pcfg_pull_none>;
 192                 };
 193
 194                 /omit-if-no-ref/
 195                 can0m1_pins: can0m1-pins {
 196                         rockchip,pins =
 197                                 /* can0_rxm1 */
 198                                 <2 RK_PA2 4 &pcfg_pull_none>,
 199                                 /* can0_txm1 */
 200                                 <2 RK_PA1 4 &pcfg_pull_none>;
 201                 };
 202         };
 203
 204         can1 {
 205                 /omit-if-no-ref/
 206                 can1m0_pins: can1m0-pins {
 207                         rockchip,pins =
 208                                 /* can1_rxm0 */
 209                                 <1 RK_PA0 3 &pcfg_pull_none>,
 210                                 /* can1_txm0 */
 211                                 <1 RK_PA1 3 &pcfg_pull_none>;
 212                 };
 213
 214                 /omit-if-no-ref/
 215                 can1m1_pins: can1m1-pins {
 216                         rockchip,pins =
 217                                 /* can1_rxm1 */
 218                                 <4 RK_PC2 3 &pcfg_pull_none>,
 219                                 /* can1_txm1 */
 220                                 <4 RK_PC3 3 &pcfg_pull_none>;
 221                 };
 222         };
 223
 224         can2 {
 225                 /omit-if-no-ref/
 226                 can2m0_pins: can2m0-pins {
 227                         rockchip,pins =
 228                                 /* can2_rxm0 */
 229                                 <4 RK_PB4 3 &pcfg_pull_none>,
 230                                 /* can2_txm0 */
 231                                 <4 RK_PB5 3 &pcfg_pull_none>;
 232                 };
 233
 234                 /omit-if-no-ref/
 235                 can2m1_pins: can2m1-pins {
 236                         rockchip,pins =
 237                                 /* can2_rxm1 */
 238                                 <2 RK_PB1 4 &pcfg_pull_none>,
 239                                 /* can2_txm1 */
 240                                 <2 RK_PB2 4 &pcfg_pull_none>;
 241                 };
 242         };
 243
 244         cif {
 245                 /omit-if-no-ref/
 246                 cif_clk: cif-clk {
 247                         rockchip,pins =
 248                                 /* cif_clkout */
 249                                 <4 RK_PC0 1 &pcfg_pull_none>;
 250                 };
 251
 252                 /omit-if-no-ref/
 253                 cif_dvp_clk: cif-dvp-clk {
 254                         rockchip,pins =
 255                                 /* cif_clkin */
 256                                 <4 RK_PC1 1 &pcfg_pull_none>,
 257                                 /* cif_href */
 258                                 <4 RK_PB6 1 &pcfg_pull_none>,
 259                                 /* cif_vsync */
 260                                 <4 RK_PB7 1 &pcfg_pull_none>;
 261                 };
 262
 263                 /omit-if-no-ref/
 264                 cif_dvp_bus16: cif-dvp-bus16 {
 265                         rockchip,pins =
 266                                 /* cif_d8 */
 267                                 <3 RK_PD6 1 &pcfg_pull_none>,
 268                                 /* cif_d9 */
 269                                 <3 RK_PD7 1 &pcfg_pull_none>,
 270                                 /* cif_d10 */
 271                                 <4 RK_PA0 1 &pcfg_pull_none>,
 272                                 /* cif_d11 */
 273                                 <4 RK_PA1 1 &pcfg_pull_none>,
 274                                 /* cif_d12 */
 275                                 <4 RK_PA2 1 &pcfg_pull_none>,
 276                                 /* cif_d13 */
 277                                 <4 RK_PA3 1 &pcfg_pull_none>,
 278                                 /* cif_d14 */
 279                                 <4 RK_PA4 1 &pcfg_pull_none>,
 280                                 /* cif_d15 */
 281                                 <4 RK_PA5 1 &pcfg_pull_none>;
 282                 };
 283
 284                 /omit-if-no-ref/
 285                 cif_dvp_bus8: cif-dvp-bus8 {
 286                         rockchip,pins =
 287                                 /* cif_d0 */
 288                                 <3 RK_PC6 1 &pcfg_pull_none>,
 289                                 /* cif_d1 */
 290                                 <3 RK_PC7 1 &pcfg_pull_none>,
 291                                 /* cif_d2 */
 292                                 <3 RK_PD0 1 &pcfg_pull_none>,
 293                                 /* cif_d3 */
 294                                 <3 RK_PD1 1 &pcfg_pull_none>,
 295                                 /* cif_d4 */
 296                                 <3 RK_PD2 1 &pcfg_pull_none>,
 297                                 /* cif_d5 */
 298                                 <3 RK_PD3 1 &pcfg_pull_none>,
 299                                 /* cif_d6 */
 300                                 <3 RK_PD4 1 &pcfg_pull_none>,
 301                                 /* cif_d7 */
 302                                 <3 RK_PD5 1 &pcfg_pull_none>;
 303                 };
 304         };
 305
 306         clk32k {
 307                 /omit-if-no-ref/
 308                 clk32k_in: clk32k-in {
 309                         rockchip,pins =
 310                                 /* clk32k_in */
 311                                 <0 RK_PB0 1 &pcfg_pull_none>;
 312                 };
 313
 314                 /omit-if-no-ref/
 315                 clk32k_out0: clk32k-out0 {
 316                         rockchip,pins =
 317                                 /* clk32k_out0 */
 318                                 <0 RK_PB0 2 &pcfg_pull_none>;
 319                 };
 320
 321                 /omit-if-no-ref/
 322                 clk32k_out1: clk32k-out1 {
 323                         rockchip,pins =
 324                                 /* clk32k_out1 */
 325                                 <2 RK_PC6 1 &pcfg_pull_none>;
 326                 };
 327         };
 328
 329         cpu {
 330                 /omit-if-no-ref/
 331                 cpu_pins: cpu-pins {
 332                         rockchip,pins =
 333                                 /* cpu_avs */
 334                                 <0 RK_PB7 2 &pcfg_pull_none>;
 335                 };
 336         };
 337
 338         ebc {
 339                 /omit-if-no-ref/
 340                 ebc_extern: ebc-extern {
 341                         rockchip,pins =
 342                                 /* ebc_sdce1 */
 343                                 <4 RK_PA7 2 &pcfg_pull_none>,
 344                                 /* ebc_sdce2 */
 345                                 <4 RK_PB0 2 &pcfg_pull_none>,
 346                                 /* ebc_sdce3 */
 347                                 <4 RK_PB1 2 &pcfg_pull_none>,
 348                                 /* ebc_sdshr */
 349                                 <4 RK_PB5 2 &pcfg_pull_none>,
 350                                 /* ebc_vcom */
 351                                 <4 RK_PB2 2 &pcfg_pull_none>;
 352                 };
 353
 354                 /omit-if-no-ref/
 355                 ebc_pins: ebc-pins {
 356                         rockchip,pins =
 357                                 /* ebc_gdclk */
 358                                 <4 RK_PC0 2 &pcfg_pull_none>,
 359                                 /* ebc_gdoe */
 360                                 <4 RK_PB3 2 &pcfg_pull_none>,
 361                                 /* ebc_gdsp */
 362                                 <4 RK_PB4 2 &pcfg_pull_none>,
 363                                 /* ebc_sdce0 */
 364                                 <4 RK_PA6 2 &pcfg_pull_none>,
 365                                 /* ebc_sdclk */
 366                                 <4 RK_PC1 2 &pcfg_pull_none>,
 367                                 /* ebc_sddo0 */
 368                                 <3 RK_PC6 2 &pcfg_pull_none>,
 369                                 /* ebc_sddo1 */
 370                                 <3 RK_PC7 2 &pcfg_pull_none>,
 371                                 /* ebc_sddo2 */
 372                                 <3 RK_PD0 2 &pcfg_pull_none>,
 373                                 /* ebc_sddo3 */
 374                                 <3 RK_PD1 2 &pcfg_pull_none>,
 375                                 /* ebc_sddo4 */
 376                                 <3 RK_PD2 2 &pcfg_pull_none>,
 377                                 /* ebc_sddo5 */
 378                                 <3 RK_PD3 2 &pcfg_pull_none>,
 379                                 /* ebc_sddo6 */
 380                                 <3 RK_PD4 2 &pcfg_pull_none>,
 381                                 /* ebc_sddo7 */
 382                                 <3 RK_PD5 2 &pcfg_pull_none>,
 383                                 /* ebc_sddo8 */
 384                                 <3 RK_PD6 2 &pcfg_pull_none>,
 385                                 /* ebc_sddo9 */
 386                                 <3 RK_PD7 2 &pcfg_pull_none>,
 387                                 /* ebc_sddo10 */
 388                                 <4 RK_PA0 2 &pcfg_pull_none>,
 389                                 /* ebc_sddo11 */
 390                                 <4 RK_PA1 2 &pcfg_pull_none>,
 391                                 /* ebc_sddo12 */
 392                                 <4 RK_PA2 2 &pcfg_pull_none>,
 393                                 /* ebc_sddo13 */
 394                                 <4 RK_PA3 2 &pcfg_pull_none>,
 395                                 /* ebc_sddo14 */
 396                                 <4 RK_PA4 2 &pcfg_pull_none>,
 397                                 /* ebc_sddo15 */
 398                                 <4 RK_PA5 2 &pcfg_pull_none>,
 399                                 /* ebc_sdle */
 400                                 <4 RK_PB6 2 &pcfg_pull_none>,
 401                                 /* ebc_sdoe */
 402                                 <4 RK_PB7 2 &pcfg_pull_none>;
 403                 };
 404         };
 405
 406         edpdp {
 407                 /omit-if-no-ref/
 408                 edpdpm0_pins: edpdpm0-pins {
 409                         rockchip,pins =
 410                                 /* edpdp_hpdinm0 */
 411                                 <4 RK_PC4 1 &pcfg_pull_none>;
 412                 };
 413
 414                 /omit-if-no-ref/
 415                 edpdpm1_pins: edpdpm1-pins {
 416                         rockchip,pins =
 417                                 /* edpdp_hpdinm1 */
 418                                 <0 RK_PC2 2 &pcfg_pull_none>;
 419                 };
 420         };
 421
 422         emmc {
 423                 /omit-if-no-ref/
 424                 emmc_rstnout: emmc-rstnout {
 425                         rockchip,pins =
 426                                 /* emmc_rstn */
 427                                 <1 RK_PC7 1 &pcfg_pull_none>;
 428                 };
 429
 430                 /omit-if-no-ref/
 431                 emmc_bus8: emmc-bus8 {
 432                         rockchip,pins =
 433                                 /* emmc_d0 */
 434                                 <1 RK_PB4 1 &pcfg_pull_up_drv_level_2>,
 435                                 /* emmc_d1 */
 436                                 <1 RK_PB5 1 &pcfg_pull_up_drv_level_2>,
 437                                 /* emmc_d2 */
 438                                 <1 RK_PB6 1 &pcfg_pull_up_drv_level_2>,
 439                                 /* emmc_d3 */
 440                                 <1 RK_PB7 1 &pcfg_pull_up_drv_level_2>,
 441                                 /* emmc_d4 */
 442                                 <1 RK_PC0 1 &pcfg_pull_up_drv_level_2>,
 443                                 /* emmc_d5 */
 444                                 <1 RK_PC1 1 &pcfg_pull_up_drv_level_2>,
 445                                 /* emmc_d6 */
 446                                 <1 RK_PC2 1 &pcfg_pull_up_drv_level_2>,
 447                                 /* emmc_d7 */
 448                                 <1 RK_PC3 1 &pcfg_pull_up_drv_level_2>;
 449                 };
 450
 451                 /omit-if-no-ref/
 452                 emmc_clk: emmc-clk {
 453                         rockchip,pins =
 454                                 /* emmc_clkout */
 455                                 <1 RK_PC5 1 &pcfg_pull_up_drv_level_2>;
 456                 };
 457
 458                 /omit-if-no-ref/
 459                 emmc_cmd: emmc-cmd {
 460                         rockchip,pins =
 461                                 /* emmc_cmd */
 462                                 <1 RK_PC4 1 &pcfg_pull_up_drv_level_2>;
 463                 };
 464
 465                 /omit-if-no-ref/
 466                 emmc_datastrobe: emmc-datastrobe {
 467                         rockchip,pins =
 468                                 /* emmc_datastrobe */
 469                                 <1 RK_PC6 1 &pcfg_pull_none>;
 470                 };
 471         };
 472
 473         eth0 {
 474                 /omit-if-no-ref/
 475                 eth0_pins: eth0-pins {
 476                         rockchip,pins =
 477                                 /* eth0_refclko25m */
 478                                 <2 RK_PC1 2 &pcfg_pull_none>;
 479                 };
 480         };
 481
 482         eth1 {
 483                 /omit-if-no-ref/
 484                 eth1m0_pins: eth1m0-pins {
 485                         rockchip,pins =
 486                                 /* eth1_refclko25mm0 */
 487                                 <3 RK_PB0 3 &pcfg_pull_none>;
 488                 };
 489
 490                 /omit-if-no-ref/
 491                 eth1m1_pins: eth1m1-pins {
 492                         rockchip,pins =
 493                                 /* eth1_refclko25mm1 */
 494                                 <4 RK_PB3 3 &pcfg_pull_none>;
 495                 };
 496         };
 497
 498         flash {
 499                 /omit-if-no-ref/
 500                 flash_pins: flash-pins {
 501                         rockchip,pins =
 502                                 /* flash_ale */
 503                                 <1 RK_PD0 2 &pcfg_pull_none>,
 504                                 /* flash_cle */
 505                                 <1 RK_PC6 3 &pcfg_pull_none>,
 506                                 /* flash_cs0n */
 507                                 <1 RK_PD3 2 &pcfg_pull_none>,
 508                                 /* flash_cs1n */
 509                                 <1 RK_PD4 2 &pcfg_pull_none>,
 510                                 /* flash_d0 */
 511                                 <1 RK_PB4 2 &pcfg_pull_none>,
 512                                 /* flash_d1 */
 513                                 <1 RK_PB5 2 &pcfg_pull_none>,
 514                                 /* flash_d2 */
 515                                 <1 RK_PB6 2 &pcfg_pull_none>,
 516                                 /* flash_d3 */
 517                                 <1 RK_PB7 2 &pcfg_pull_none>,
 518                                 /* flash_d4 */
 519                                 <1 RK_PC0 2 &pcfg_pull_none>,
 520                                 /* flash_d5 */
 521                                 <1 RK_PC1 2 &pcfg_pull_none>,
 522                                 /* flash_d6 */
 523                                 <1 RK_PC2 2 &pcfg_pull_none>,
 524                                 /* flash_d7 */
 525                                 <1 RK_PC3 2 &pcfg_pull_none>,
 526                                 /* flash_dqs */
 527                                 <1 RK_PC5 2 &pcfg_pull_none>,
 528                                 /* flash_rdn */
 529                                 <1 RK_PD2 2 &pcfg_pull_none>,
 530                                 /* flash_rdy */
 531                                 <1 RK_PD1 2 &pcfg_pull_none>,
 532                                 /* flash_volsel */
 533                                 <0 RK_PA7 1 &pcfg_pull_none>,
 534                                 /* flash_wpn */
 535                                 <1 RK_PC7 3 &pcfg_pull_none>,
 536                                 /* flash_wrn */
 537                                 <1 RK_PC4 2 &pcfg_pull_none>;
 538                 };
 539         };
 540
 541         fspi {
 542                 /omit-if-no-ref/
 543                 fspi_pins: fspi-pins {
 544                         rockchip,pins =
 545                                 /* fspi_clk */
 546                                 <1 RK_PD0 1 &pcfg_pull_none>,
 547                                 /* fspi_cs0n */
 548                                 <1 RK_PD3 1 &pcfg_pull_none>,
 549                                 /* fspi_d0 */
 550                                 <1 RK_PD1 1 &pcfg_pull_none>,
 551                                 /* fspi_d1 */
 552                                 <1 RK_PD2 1 &pcfg_pull_none>,
 553                                 /* fspi_d2 */
 554                                 <1 RK_PC7 2 &pcfg_pull_none>,
 555                                 /* fspi_d3 */
 556                                 <1 RK_PD4 1 &pcfg_pull_none>;
 557                 };
 558
 559                 /omit-if-no-ref/
 560                 fspi_cs1: fspi-cs1 {
 561                         rockchip,pins =
 562                                 /* fspi_cs1n */
 563                                 <1 RK_PC6 2 &pcfg_pull_up>;
 564                 };
 565         };
 566
 567         gmac0 {
 568                 /omit-if-no-ref/
 569                 gmac0_miim: gmac0-miim {
 570                         rockchip,pins =
 571                                 /* gmac0_mdc */
 572                                 <2 RK_PC3 2 &pcfg_pull_none>,
 573                                 /* gmac0_mdio */
 574                                 <2 RK_PC4 2 &pcfg_pull_none>;
 575                 };
 576
 577                 /omit-if-no-ref/
 578                 gmac0_clkinout: gmac0-clkinout {
 579                         rockchip,pins =
 580                                 /* gmac0_mclkinout */
 581                                 <2 RK_PC2 2 &pcfg_pull_none>;
 582                 };
 583
 584                 /omit-if-no-ref/
 585                 gmac0_rx_er: gmac0-rx-er {
 586                         rockchip,pins =
 587                                 /* gmac0_rxer */
 588                                 <2 RK_PC5 2 &pcfg_pull_none>;
 589                 };
 590
 591                 /omit-if-no-ref/
 592                 gmac0_rx_bus2: gmac0-rx-bus2 {
 593                         rockchip,pins =
 594                                 /* gmac0_rxd0 */
 595                                 <2 RK_PB6 1 &pcfg_pull_none>,
 596                                 /* gmac0_rxd1 */
 597                                 <2 RK_PB7 2 &pcfg_pull_none>,
 598                                 /* gmac0_rxdvcrs */
 599                                 <2 RK_PC0 2 &pcfg_pull_none>;
 600                 };
 601
 602                 /omit-if-no-ref/
 603                 gmac0_tx_bus2: gmac0-tx-bus2 {
 604                         rockchip,pins =
 605                                 /* gmac0_txd0 */
 606                                 <2 RK_PB3 1 &pcfg_pull_none_drv_level_2>,
 607                                 /* gmac0_txd1 */
 608                                 <2 RK_PB4 1 &pcfg_pull_none_drv_level_2>,
 609                                 /* gmac0_txen */
 610                                 <2 RK_PB5 1 &pcfg_pull_none>;
 611                 };
 612
 613                 /omit-if-no-ref/
 614                 gmac0_rgmii_clk: gmac0-rgmii-clk {
 615                         rockchip,pins =
 616                                 /* gmac0_rxclk */
 617                                 <2 RK_PA5 2 &pcfg_pull_none>,
 618                                 /* gmac0_txclk */
 619                                 <2 RK_PB0 2 &pcfg_pull_none_drv_level_1>;
 620                 };
 621
 622                 /omit-if-no-ref/
 623                 gmac0_rgmii_bus: gmac0-rgmii-bus {
 624                         rockchip,pins =
 625                                 /* gmac0_rxd2 */
 626                                 <2 RK_PA3 2 &pcfg_pull_none>,
 627                                 /* gmac0_rxd3 */
 628                                 <2 RK_PA4 2 &pcfg_pull_none>,
 629                                 /* gmac0_txd2 */
 630                                 <2 RK_PA6 2 &pcfg_pull_none_drv_level_2>,
 631                                 /* gmac0_txd3 */
 632                                 <2 RK_PA7 2 &pcfg_pull_none_drv_level_2>;
 633                 };
 634         };
 635
 636         gmac1 {
 637                 /omit-if-no-ref/
 638                 gmac1m0_miim: gmac1m0-miim {
 639                         rockchip,pins =
 640                                 /* gmac1_mdcm0 */
 641                                 <3 RK_PC4 3 &pcfg_pull_none>,
 642                                 /* gmac1_mdiom0 */
 643                                 <3 RK_PC5 3 &pcfg_pull_none>;
 644                 };
 645
 646                 /omit-if-no-ref/
 647                 gmac1m0_clkinout: gmac1m0-clkinout {
 648                         rockchip,pins =
 649                                 /* gmac1_mclkinoutm0 */
 650                                 <3 RK_PC0 3 &pcfg_pull_none>;
 651                 };
 652
 653                 /omit-if-no-ref/
 654                 gmac1m0_rx_er: gmac1m0-rx-er {
 655                         rockchip,pins =
 656                                 /* gmac1_rxerm0 */
 657                                 <3 RK_PB4 3 &pcfg_pull_none>;
 658                 };
 659
 660                 /omit-if-no-ref/
 661                 gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
 662                         rockchip,pins =
 663                                 /* gmac1_rxd0m0 */
 664                                 <3 RK_PB1 3 &pcfg_pull_none>,
 665                                 /* gmac1_rxd1m0 */
 666                                 <3 RK_PB2 3 &pcfg_pull_none>,
 667                                 /* gmac1_rxdvcrsm0 */
 668                                 <3 RK_PB3 3 &pcfg_pull_none>;
 669                 };
 670
 671                 /omit-if-no-ref/
 672                 gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
 673                         rockchip,pins =
 674                                 /* gmac1_txd0m0 */
 675                                 <3 RK_PB5 3 &pcfg_pull_none_drv_level_2>,
 676                                 /* gmac1_txd1m0 */
 677                                 <3 RK_PB6 3 &pcfg_pull_none_drv_level_2>,
 678                                 /* gmac1_txenm0 */
 679                                 <3 RK_PB7 3 &pcfg_pull_none>;
 680                 };
 681
 682                 /omit-if-no-ref/
 683                 gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
 684                         rockchip,pins =
 685                                 /* gmac1_rxclkm0 */
 686                                 <3 RK_PA7 3 &pcfg_pull_none>,
 687                                 /* gmac1_txclkm0 */
 688                                 <3 RK_PA6 3 &pcfg_pull_none_drv_level_1>;
 689                 };
 690
 691                 /omit-if-no-ref/
 692                 gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
 693                         rockchip,pins =
 694                                 /* gmac1_rxd2m0 */
 695                                 <3 RK_PA4 3 &pcfg_pull_none>,
 696                                 /* gmac1_rxd3m0 */
 697                                 <3 RK_PA5 3 &pcfg_pull_none>,
 698                                 /* gmac1_txd2m0 */
 699                                 <3 RK_PA2 3 &pcfg_pull_none_drv_level_2>,
 700                                 /* gmac1_txd3m0 */
 701                                 <3 RK_PA3 3 &pcfg_pull_none_drv_level_2>;
 702                 };
 703
 704                 /omit-if-no-ref/
 705                 gmac1m1_miim: gmac1m1-miim {
 706                         rockchip,pins =
 707                                 /* gmac1_mdcm1 */
 708                                 <4 RK_PB6 3 &pcfg_pull_none>,
 709                                 /* gmac1_mdiom1 */
 710                                 <4 RK_PB7 3 &pcfg_pull_none>;
 711                 };
 712
 713                 /omit-if-no-ref/
 714                 gmac1m1_clkinout: gmac1m1-clkinout {
 715                         rockchip,pins =
 716                                 /* gmac1_mclkinoutm1 */
 717                                 <4 RK_PC1 3 &pcfg_pull_none>;
 718                 };
 719
 720                 /omit-if-no-ref/
 721                 gmac1m1_rx_er: gmac1m1-rx-er {
 722                         rockchip,pins =
 723                                 /* gmac1_rxerm1 */
 724                                 <4 RK_PB2 3 &pcfg_pull_none>;
 725                 };
 726
 727                 /omit-if-no-ref/
 728                 gmac1m1_rx_bus2: gmac1m1-rx-bus2 {
 729                         rockchip,pins =
 730                                 /* gmac1_rxd0m1 */
 731                                 <4 RK_PA7 3 &pcfg_pull_none>,
 732                                 /* gmac1_rxd1m1 */
 733                                 <4 RK_PB0 3 &pcfg_pull_none>,
 734                                 /* gmac1_rxdvcrsm1 */
 735                                 <4 RK_PB1 3 &pcfg_pull_none>;
 736                 };
 737
 738                 /omit-if-no-ref/
 739                 gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
 740                         rockchip,pins =
 741                                 /* gmac1_txd0m1 */
 742                                 <4 RK_PA4 3 &pcfg_pull_none_drv_level_2>,
 743                                 /* gmac1_txd1m1 */
 744                                 <4 RK_PA5 3 &pcfg_pull_none_drv_level_2>,
 745                                 /* gmac1_txenm1 */
 746                                 <4 RK_PA6 3 &pcfg_pull_none>;
 747                 };
 748
 749                 /omit-if-no-ref/
 750                 gmac1m1_rgmii_clk: gmac1m1-rgmii-clk {
 751                         rockchip,pins =
 752                                 /* gmac1_rxclkm1 */
 753                                 <4 RK_PA3 3 &pcfg_pull_none>,
 754                                 /* gmac1_txclkm1 */
 755                                 <4 RK_PA0 3 &pcfg_pull_none_drv_level_1>;
 756                 };
 757
 758                 /omit-if-no-ref/
 759                 gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
 760                         rockchip,pins =
 761                                 /* gmac1_rxd2m1 */
 762                                 <4 RK_PA1 3 &pcfg_pull_none>,
 763                                 /* gmac1_rxd3m1 */
 764                                 <4 RK_PA2 3 &pcfg_pull_none>,
 765                                 /* gmac1_txd2m1 */
 766                                 <3 RK_PD6 3 &pcfg_pull_none_drv_level_2>,
 767                                 /* gmac1_txd3m1 */
 768                                 <3 RK_PD7 3 &pcfg_pull_none_drv_level_2>;
 769                 };
 770         };
 771
 772         gpu {
 773                 /omit-if-no-ref/
 774                 gpu_pins: gpu-pins {
 775                         rockchip,pins =
 776                                 /* gpu_avs */
 777                                 <0 RK_PC0 2 &pcfg_pull_none>,
 778                                 /* gpu_pwren */
 779                                 <0 RK_PA6 4 &pcfg_pull_none>;
 780                 };
 781         };
 782
 783         hdmitx {
 784                 /omit-if-no-ref/
 785                 hdmitxm0_cec: hdmitxm0-cec {
 786                         rockchip,pins =
 787                                 /* hdmitxm0_cec */
 788                                 <4 RK_PD1 1 &pcfg_pull_none>;
 789                 };
 790
 791                 /omit-if-no-ref/
 792                 hdmitxm1_cec: hdmitxm1-cec {
 793                         rockchip,pins =
 794                                 /* hdmitxm1_cec */
 795                                 <0 RK_PC7 1 &pcfg_pull_none>;
 796                 };
 797
 798                 /omit-if-no-ref/
 799                 hdmitx_scl: hdmitx-scl {
 800                         rockchip,pins =
 801                                 /* hdmitx_scl */
 802                                 <4 RK_PC7 1 &pcfg_pull_none>;
 803                 };
 804
 805                 /omit-if-no-ref/
 806                 hdmitx_sda: hdmitx-sda {
 807                         rockchip,pins =
 808                                 /* hdmitx_sda */
 809                                 <4 RK_PD0 1 &pcfg_pull_none>;
 810                 };
 811         };
 812
 813         i2c0 {
 814                 /omit-if-no-ref/
 815                 i2c0_xfer: i2c0-xfer {
 816                         rockchip,pins =
 817                                 /* i2c0_scl */
 818                                 <0 RK_PB1 1 &pcfg_pull_none_smt>,
 819                                 /* i2c0_sda */
 820                                 <0 RK_PB2 1 &pcfg_pull_none_smt>;
 821                 };
 822         };
 823
 824         i2c1 {
 825                 /omit-if-no-ref/
 826                 i2c1_xfer: i2c1-xfer {
 827                         rockchip,pins =
 828                                 /* i2c1_scl */
 829                                 <0 RK_PB3 1 &pcfg_pull_none_smt>,
 830                                 /* i2c1_sda */
 831                                 <0 RK_PB4 1 &pcfg_pull_none_smt>;
 832                 };
 833         };
 834
 835         i2c2 {
 836                 /omit-if-no-ref/
 837                 i2c2m0_xfer: i2c2m0-xfer {
 838                         rockchip,pins =
 839                                 /* i2c2_sclm0 */
 840                                 <0 RK_PB5 1 &pcfg_pull_none_smt>,
 841                                 /* i2c2_sdam0 */
 842                                 <0 RK_PB6 1 &pcfg_pull_none_smt>;
 843                 };
 844
 845                 /omit-if-no-ref/
 846                 i2c2m1_xfer: i2c2m1-xfer {
 847                         rockchip,pins =
 848                                 /* i2c2_sclm1 */
 849                                 <4 RK_PB5 1 &pcfg_pull_none_smt>,
 850                                 /* i2c2_sdam1 */
 851                                 <4 RK_PB4 1 &pcfg_pull_none_smt>;
 852                 };
 853         };
 854
 855         i2c3 {
 856                 /omit-if-no-ref/
 857                 i2c3m0_xfer: i2c3m0-xfer {
 858                         rockchip,pins =
 859                                 /* i2c3_sclm0 */
 860                                 <1 RK_PA1 1 &pcfg_pull_none_smt>,
 861                                 /* i2c3_sdam0 */
 862                                 <1 RK_PA0 1 &pcfg_pull_none_smt>;
 863                 };
 864
 865                 /omit-if-no-ref/
 866                 i2c3m1_xfer: i2c3m1-xfer {
 867                         rockchip,pins =
 868                                 /* i2c3_sclm1 */
 869                                 <3 RK_PB5 4 &pcfg_pull_none_smt>,
 870                                 /* i2c3_sdam1 */
 871                                 <3 RK_PB6 4 &pcfg_pull_none_smt>;
 872                 };
 873         };
 874
 875         i2c4 {
 876                 /omit-if-no-ref/
 877                 i2c4m0_xfer: i2c4m0-xfer {
 878                         rockchip,pins =
 879                                 /* i2c4_sclm0 */
 880                                 <4 RK_PB3 1 &pcfg_pull_none_smt>,
 881                                 /* i2c4_sdam0 */
 882                                 <4 RK_PB2 1 &pcfg_pull_none_smt>;
 883                 };
 884
 885                 /omit-if-no-ref/
 886                 i2c4m1_xfer: i2c4m1-xfer {
 887                         rockchip,pins =
 888                                 /* i2c4_sclm1 */
 889                                 <2 RK_PB2 2 &pcfg_pull_none_smt>,
 890                                 /* i2c4_sdam1 */
 891                                 <2 RK_PB1 2 &pcfg_pull_none_smt>;
 892                 };
 893         };
 894
 895         i2c5 {
 896                 /omit-if-no-ref/
 897                 i2c5m0_xfer: i2c5m0-xfer {
 898                         rockchip,pins =
 899                                 /* i2c5_sclm0 */
 900                                 <3 RK_PB3 4 &pcfg_pull_none_smt>,
 901                                 /* i2c5_sdam0 */
 902                                 <3 RK_PB4 4 &pcfg_pull_none_smt>;
 903                 };
 904
 905                 /omit-if-no-ref/
 906                 i2c5m1_xfer: i2c5m1-xfer {
 907                         rockchip,pins =
 908                                 /* i2c5_sclm1 */
 909                                 <4 RK_PC7 2 &pcfg_pull_none_smt>,
 910                                 /* i2c5_sdam1 */
 911                                 <4 RK_PD0 2 &pcfg_pull_none_smt>;
 912                 };
 913         };
 914
 915         i2s1 {
 916                 /omit-if-no-ref/
 917                 i2s1m0_lrckrx: i2s1m0-lrckrx {
 918                         rockchip,pins =
 919                                 /* i2s1m0_lrckrx */
 920                                 <1 RK_PA6 1 &pcfg_pull_none>;
 921                 };
 922
 923                 /omit-if-no-ref/
 924                 i2s1m0_lrcktx: i2s1m0-lrcktx {
 925                         rockchip,pins =
 926                                 /* i2s1m0_lrcktx */
 927                                 <1 RK_PA5 1 &pcfg_pull_none>;
 928                 };
 929
 930                 /omit-if-no-ref/
 931                 i2s1m0_mclk: i2s1m0-mclk {
 932                         rockchip,pins =
 933                                 /* i2s1m0_mclk */
 934                                 <1 RK_PA2 1 &pcfg_pull_none>;
 935                 };
 936
 937                 /omit-if-no-ref/
 938                 i2s1m0_sclkrx: i2s1m0-sclkrx {
 939                         rockchip,pins =
 940                                 /* i2s1m0_sclkrx */
 941                                 <1 RK_PA4 1 &pcfg_pull_none>;
 942                 };
 943
 944                 /omit-if-no-ref/
 945                 i2s1m0_sclktx: i2s1m0-sclktx {
 946                         rockchip,pins =
 947                                 /* i2s1m0_sclktx */
 948                                 <1 RK_PA3 1 &pcfg_pull_none>;
 949                 };
 950
 951                 /omit-if-no-ref/
 952                 i2s1m0_sdi0: i2s1m0-sdi0 {
 953                         rockchip,pins =
 954                                 /* i2s1m0_sdi0 */
 955                                 <1 RK_PB3 1 &pcfg_pull_none>;
 956                 };
 957
 958                 /omit-if-no-ref/
 959                 i2s1m0_sdi1: i2s1m0-sdi1 {
 960                         rockchip,pins =
 961                                 /* i2s1m0_sdi1 */
 962                                 <1 RK_PB2 2 &pcfg_pull_none>;
 963                 };
 964
 965                 /omit-if-no-ref/
 966                 i2s1m0_sdi2: i2s1m0-sdi2 {
 967                         rockchip,pins =
 968                                 /* i2s1m0_sdi2 */
 969                                 <1 RK_PB1 2 &pcfg_pull_none>;
 970                 };
 971
 972                 /omit-if-no-ref/
 973                 i2s1m0_sdi3: i2s1m0-sdi3 {
 974                         rockchip,pins =
 975                                 /* i2s1m0_sdi3 */
 976                                 <1 RK_PB0 2 &pcfg_pull_none>;
 977                 };
 978
 979                 /omit-if-no-ref/
 980                 i2s1m0_sdo0: i2s1m0-sdo0 {
 981                         rockchip,pins =
 982                                 /* i2s1m0_sdo0 */
 983                                 <1 RK_PA7 1 &pcfg_pull_none>;
 984                 };
 985
 986                 /omit-if-no-ref/
 987                 i2s1m0_sdo1: i2s1m0-sdo1 {
 988                         rockchip,pins =
 989                                 /* i2s1m0_sdo1 */
 990                                 <1 RK_PB0 1 &pcfg_pull_none>;
 991                 };
 992
 993                 /omit-if-no-ref/
 994                 i2s1m0_sdo2: i2s1m0-sdo2 {
 995                         rockchip,pins =
 996                                 /* i2s1m0_sdo2 */
 997                                 <1 RK_PB1 1 &pcfg_pull_none>;
 998                 };
 999
1000                 /omit-if-no-ref/
1001                 i2s1m0_sdo3: i2s1m0-sdo3 {
1002                         rockchip,pins =
1003                                 /* i2s1m0_sdo3 */
1004                                 <1 RK_PB2 1 &pcfg_pull_none>;
1005                 };
1006
1007                 /omit-if-no-ref/
1008                 i2s1m1_lrckrx: i2s1m1-lrckrx {
1009                         rockchip,pins =
1010                                 /* i2s1m1_lrckrx */
1011                                 <4 RK_PA7 5 &pcfg_pull_none>;
1012                 };
1013
1014                 /omit-if-no-ref/
1015                 i2s1m1_lrcktx: i2s1m1-lrcktx {
1016                         rockchip,pins =
1017                                 /* i2s1m1_lrcktx */
1018                                 <3 RK_PD0 4 &pcfg_pull_none>;
1019                 };
1020
1021                 /omit-if-no-ref/
1022                 i2s1m1_mclk: i2s1m1-mclk {
1023                         rockchip,pins =
1024                                 /* i2s1m1_mclk */
1025                                 <3 RK_PC6 4 &pcfg_pull_none>;
1026                 };
1027
1028                 /omit-if-no-ref/
1029                 i2s1m1_sclkrx: i2s1m1-sclkrx {
1030                         rockchip,pins =
1031                                 /* i2s1m1_sclkrx */
1032                                 <4 RK_PA6 5 &pcfg_pull_none>;
1033                 };
1034
1035                 /omit-if-no-ref/
1036                 i2s1m1_sclktx: i2s1m1-sclktx {
1037                         rockchip,pins =
1038                                 /* i2s1m1_sclktx */
1039                                 <3 RK_PC7 4 &pcfg_pull_none>;
1040                 };
1041
1042                 /omit-if-no-ref/
1043                 i2s1m1_sdi0: i2s1m1-sdi0 {
1044                         rockchip,pins =
1045                                 /* i2s1m1_sdi0 */
1046                                 <3 RK_PD2 4 &pcfg_pull_none>;
1047                 };
1048
1049                 /omit-if-no-ref/
1050                 i2s1m1_sdi1: i2s1m1-sdi1 {
1051                         rockchip,pins =
1052                                 /* i2s1m1_sdi1 */
1053                                 <3 RK_PD3 4 &pcfg_pull_none>;
1054                 };
1055
1056                 /omit-if-no-ref/
1057                 i2s1m1_sdi2: i2s1m1-sdi2 {
1058                         rockchip,pins =
1059                                 /* i2s1m1_sdi2 */
1060                                 <3 RK_PD4 4 &pcfg_pull_none>;
1061                 };
1062
1063                 /omit-if-no-ref/
1064                 i2s1m1_sdi3: i2s1m1-sdi3 {
1065                         rockchip,pins =
1066                                 /* i2s1m1_sdi3 */
1067                                 <3 RK_PD5 4 &pcfg_pull_none>;
1068                 };
1069
1070                 /omit-if-no-ref/
1071                 i2s1m1_sdo0: i2s1m1-sdo0 {
1072                         rockchip,pins =
1073                                 /* i2s1m1_sdo0 */
1074                                 <3 RK_PD1 4 &pcfg_pull_none>;
1075                 };
1076
1077                 /omit-if-no-ref/
1078                 i2s1m1_sdo1: i2s1m1-sdo1 {
1079                         rockchip,pins =
1080                                 /* i2s1m1_sdo1 */
1081                                 <4 RK_PB0 5 &pcfg_pull_none>;
1082                 };
1083
1084                 /omit-if-no-ref/
1085                 i2s1m1_sdo2: i2s1m1-sdo2 {
1086                         rockchip,pins =
1087                                 /* i2s1m1_sdo2 */
1088                                 <4 RK_PB1 4 &pcfg_pull_none>;
1089                 };
1090
1091                 /omit-if-no-ref/
1092                 i2s1m1_sdo3: i2s1m1-sdo3 {
1093                         rockchip,pins =
1094                                 /* i2s1m1_sdo3 */
1095                                 <4 RK_PB5 4 &pcfg_pull_none>;
1096                 };
1097
1098                 /omit-if-no-ref/
1099                 i2s1m2_lrckrx: i2s1m2-lrckrx {
1100                         rockchip,pins =
1101                                 /* i2s1m2_lrckrx */
1102                                 <3 RK_PC5 5 &pcfg_pull_none>;
1103                 };
1104
1105                 /omit-if-no-ref/
1106                 i2s1m2_lrcktx: i2s1m2-lrcktx {
1107                         rockchip,pins =
1108                                 /* i2s1m2_lrcktx */
1109                                 <2 RK_PD2 5 &pcfg_pull_none>;
1110                 };
1111
1112                 /omit-if-no-ref/
1113                 i2s1m2_mclk: i2s1m2-mclk {
1114                         rockchip,pins =
1115                                 /* i2s1m2_mclk */
1116                                 <2 RK_PD0 5 &pcfg_pull_none>;
1117                 };
1118
1119                 /omit-if-no-ref/
1120                 i2s1m2_sclkrx: i2s1m2-sclkrx {
1121                         rockchip,pins =
1122                                 /* i2s1m2_sclkrx */
1123                                 <3 RK_PC3 5 &pcfg_pull_none>;
1124                 };
1125
1126                 /omit-if-no-ref/
1127                 i2s1m2_sclktx: i2s1m2-sclktx {
1128                         rockchip,pins =
1129                                 /* i2s1m2_sclktx */
1130                                 <2 RK_PD1 5 &pcfg_pull_none>;
1131                 };
1132
1133                 /omit-if-no-ref/
1134                 i2s1m2_sdi0: i2s1m2-sdi0 {
1135                         rockchip,pins =
1136                                 /* i2s1m2_sdi0 */
1137                                 <2 RK_PD3 5 &pcfg_pull_none>;
1138                 };
1139
1140                 /omit-if-no-ref/
1141                 i2s1m2_sdi1: i2s1m2-sdi1 {
1142                         rockchip,pins =
1143                                 /* i2s1m2_sdi1 */
1144                                 <2 RK_PD4 5 &pcfg_pull_none>;
1145                 };
1146
1147                 /omit-if-no-ref/
1148                 i2s1m2_sdi2: i2s1m2-sdi2 {
1149                         rockchip,pins =
1150                                 /* i2s1m2_sdi2 */
1151                                 <2 RK_PD5 5 &pcfg_pull_none>;
1152                 };
1153
1154                 /omit-if-no-ref/
1155                 i2s1m2_sdi3: i2s1m2-sdi3 {
1156                         rockchip,pins =
1157                                 /* i2s1m2_sdi3 */
1158                                 <2 RK_PD6 5 &pcfg_pull_none>;
1159                 };
1160
1161                 /omit-if-no-ref/
1162                 i2s1m2_sdo0: i2s1m2-sdo0 {
1163                         rockchip,pins =
1164                                 /* i2s1m2_sdo0 */
1165                                 <2 RK_PD7 5 &pcfg_pull_none>;
1166                 };
1167
1168                 /omit-if-no-ref/
1169                 i2s1m2_sdo1: i2s1m2-sdo1 {
1170                         rockchip,pins =
1171                                 /* i2s1m2_sdo1 */
1172                                 <3 RK_PA0 5 &pcfg_pull_none>;
1173                 };
1174
1175                 /omit-if-no-ref/
1176                 i2s1m2_sdo2: i2s1m2-sdo2 {
1177                         rockchip,pins =
1178                                 /* i2s1m2_sdo2 */
1179                                 <3 RK_PC1 5 &pcfg_pull_none>;
1180                 };
1181
1182                 /omit-if-no-ref/
1183                 i2s1m2_sdo3: i2s1m2-sdo3 {
1184                         rockchip,pins =
1185                                 /* i2s1m2_sdo3 */
1186                                 <3 RK_PC2 5 &pcfg_pull_none>;
1187                 };
1188         };
1189
1190         i2s2 {
1191                 /omit-if-no-ref/
1192                 i2s2m0_lrckrx: i2s2m0-lrckrx {
1193                         rockchip,pins =
1194                                 /* i2s2m0_lrckrx */
1195                                 <2 RK_PC0 1 &pcfg_pull_none>;
1196                 };
1197
1198                 /omit-if-no-ref/
1199                 i2s2m0_lrcktx: i2s2m0-lrcktx {
1200                         rockchip,pins =
1201                                 /* i2s2m0_lrcktx */
1202                                 <2 RK_PC3 1 &pcfg_pull_none>;
1203                 };
1204
1205                 /omit-if-no-ref/
1206                 i2s2m0_mclk: i2s2m0-mclk {
1207                         rockchip,pins =
1208                                 /* i2s2m0_mclk */
1209                                 <2 RK_PC1 1 &pcfg_pull_none>;
1210                 };
1211
1212                 /omit-if-no-ref/
1213                 i2s2m0_sclkrx: i2s2m0-sclkrx {
1214                         rockchip,pins =
1215                                 /* i2s2m0_sclkrx */
1216                                 <2 RK_PB7 1 &pcfg_pull_none>;
1217                 };
1218
1219                 /omit-if-no-ref/
1220                 i2s2m0_sclktx: i2s2m0-sclktx {
1221                         rockchip,pins =
1222                                 /* i2s2m0_sclktx */
1223                                 <2 RK_PC2 1 &pcfg_pull_none>;
1224                 };
1225
1226                 /omit-if-no-ref/
1227                 i2s2m0_sdi: i2s2m0-sdi {
1228                         rockchip,pins =
1229                                 /* i2s2m0_sdi */
1230                                 <2 RK_PC5 1 &pcfg_pull_none>;
1231                 };
1232
1233                 /omit-if-no-ref/
1234                 i2s2m0_sdo: i2s2m0-sdo {
1235                         rockchip,pins =
1236                                 /* i2s2m0_sdo */
1237                                 <2 RK_PC4 1 &pcfg_pull_none>;
1238                 };
1239
1240                 /omit-if-no-ref/
1241                 i2s2m1_lrckrx: i2s2m1-lrckrx {
1242                         rockchip,pins =
1243                                 /* i2s2m1_lrckrx */
1244                                 <4 RK_PA5 5 &pcfg_pull_none>;
1245                 };
1246
1247                 /omit-if-no-ref/
1248                 i2s2m1_lrcktx: i2s2m1-lrcktx {
1249                         rockchip,pins =
1250                                 /* i2s2m1_lrcktx */
1251                                 <4 RK_PA4 5 &pcfg_pull_none>;
1252                 };
1253
1254                 /omit-if-no-ref/
1255                 i2s2m1_mclk: i2s2m1-mclk {
1256                         rockchip,pins =
1257                                 /* i2s2m1_mclk */
1258                                 <4 RK_PB6 5 &pcfg_pull_none>;
1259                 };
1260
1261                 /omit-if-no-ref/
1262                 i2s2m1_sclkrx: i2s2m1-sclkrx {
1263                         rockchip,pins =
1264                                 /* i2s2m1_sclkrx */
1265                                 <4 RK_PC1 5 &pcfg_pull_none>;
1266                 };
1267
1268                 /omit-if-no-ref/
1269                 i2s2m1_sclktx: i2s2m1-sclktx {
1270                         rockchip,pins =
1271                                 /* i2s2m1_sclktx */
1272                                 <4 RK_PB7 4 &pcfg_pull_none>;
1273                 };
1274
1275                 /omit-if-no-ref/
1276                 i2s2m1_sdi: i2s2m1-sdi {
1277                         rockchip,pins =
1278                                 /* i2s2m1_sdi */
1279                                 <4 RK_PB2 5 &pcfg_pull_none>;
1280                 };
1281
1282                 /omit-if-no-ref/
1283                 i2s2m1_sdo: i2s2m1-sdo {
1284                         rockchip,pins =
1285                                 /* i2s2m1_sdo */
1286                                 <4 RK_PB3 5 &pcfg_pull_none>;
1287                 };
1288         };
1289
1290         i2s3 {
1291                 /omit-if-no-ref/
1292                 i2s3m0_lrck: i2s3m0-lrck {
1293                         rockchip,pins =
1294                                 /* i2s3m0_lrck */
1295                                 <3 RK_PA4 4 &pcfg_pull_none>;
1296                 };
1297
1298                 /omit-if-no-ref/
1299                 i2s3m0_mclk: i2s3m0-mclk {
1300                         rockchip,pins =
1301                                 /* i2s3m0_mclk */
1302                                 <3 RK_PA2 4 &pcfg_pull_none>;
1303                 };
1304
1305                 /omit-if-no-ref/
1306                 i2s3m0_sclk: i2s3m0-sclk {
1307                         rockchip,pins =
1308                                 /* i2s3m0_sclk */
1309                                 <3 RK_PA3 4 &pcfg_pull_none>;
1310                 };
1311
1312                 /omit-if-no-ref/
1313                 i2s3m0_sdi: i2s3m0-sdi {
1314                         rockchip,pins =
1315                                 /* i2s3m0_sdi */
1316                                 <3 RK_PA6 4 &pcfg_pull_none>;
1317                 };
1318
1319                 /omit-if-no-ref/
1320                 i2s3m0_sdo: i2s3m0-sdo {
1321                         rockchip,pins =
1322                                 /* i2s3m0_sdo */
1323                                 <3 RK_PA5 4 &pcfg_pull_none>;
1324                 };
1325
1326                 /omit-if-no-ref/
1327                 i2s3m1_lrck: i2s3m1-lrck {
1328                         rockchip,pins =
1329                                 /* i2s3m1_lrck */
1330                                 <4 RK_PC4 5 &pcfg_pull_none>;
1331                 };
1332
1333                 /omit-if-no-ref/
1334                 i2s3m1_mclk: i2s3m1-mclk {
1335                         rockchip,pins =
1336                                 /* i2s3m1_mclk */
1337                                 <4 RK_PC2 5 &pcfg_pull_none>;
1338                 };
1339
1340                 /omit-if-no-ref/
1341                 i2s3m1_sclk: i2s3m1-sclk {
1342                         rockchip,pins =
1343                                 /* i2s3m1_sclk */
1344                                 <4 RK_PC3 5 &pcfg_pull_none>;
1345                 };
1346
1347                 /omit-if-no-ref/
1348                 i2s3m1_sdi: i2s3m1-sdi {
1349                         rockchip,pins =
1350                                 /* i2s3m1_sdi */
1351                                 <4 RK_PC6 5 &pcfg_pull_none>;
1352                 };
1353
1354                 /omit-if-no-ref/
1355                 i2s3m1_sdo: i2s3m1-sdo {
1356                         rockchip,pins =
1357                                 /* i2s3m1_sdo */
1358                                 <4 RK_PC5 5 &pcfg_pull_none>;
1359                 };
1360         };
1361
1362         isp {
1363                 /omit-if-no-ref/
1364                 isp_pins: isp-pins {
1365                         rockchip,pins =
1366                                 /* isp_flashtrigin */
1367                                 <4 RK_PB4 4 &pcfg_pull_none>,
1368                                 /* isp_flashtrigout */
1369                                 <4 RK_PA6 1 &pcfg_pull_none>,
1370                                 /* isp_prelighttrig */
1371                                 <4 RK_PB1 1 &pcfg_pull_none>;
1372                 };
1373         };
1374
1375         jtag {
1376                 /omit-if-no-ref/
1377                 jtag_pins: jtag-pins {
1378                         rockchip,pins =
1379                                 /* jtag_tck */
1380                                 <1 RK_PD7 2 &pcfg_pull_none>,
1381                                 /* jtag_tms */
1382                                 <2 RK_PA0 2 &pcfg_pull_none>;
1383                 };
1384         };
1385
1386         lcdc {
1387                 /omit-if-no-ref/
1388                 lcdc_ctl: lcdc-ctl {
1389                         rockchip,pins =
1390                                 /* lcdc_clk */
1391                                 <3 RK_PA0 1 &pcfg_pull_none>,
1392                                 /* lcdc_d0 */
1393                                 <2 RK_PD0 1 &pcfg_pull_none>,
1394                                 /* lcdc_d1 */
1395                                 <2 RK_PD1 1 &pcfg_pull_none>,
1396                                 /* lcdc_d2 */
1397                                 <2 RK_PD2 1 &pcfg_pull_none>,
1398                                 /* lcdc_d3 */
1399                                 <2 RK_PD3 1 &pcfg_pull_none>,
1400                                 /* lcdc_d4 */
1401                                 <2 RK_PD4 1 &pcfg_pull_none>,
1402                                 /* lcdc_d5 */
1403                                 <2 RK_PD5 1 &pcfg_pull_none>,
1404                                 /* lcdc_d6 */
1405                                 <2 RK_PD6 1 &pcfg_pull_none>,
1406                                 /* lcdc_d7 */
1407                                 <2 RK_PD7 1 &pcfg_pull_none>,
1408                                 /* lcdc_d8 */
1409                                 <3 RK_PA1 1 &pcfg_pull_none>,
1410                                 /* lcdc_d9 */
1411                                 <3 RK_PA2 1 &pcfg_pull_none>,
1412                                 /* lcdc_d10 */
1413                                 <3 RK_PA3 1 &pcfg_pull_none>,
1414                                 /* lcdc_d11 */
1415                                 <3 RK_PA4 1 &pcfg_pull_none>,
1416                                 /* lcdc_d12 */
1417                                 <3 RK_PA5 1 &pcfg_pull_none>,
1418                                 /* lcdc_d13 */
1419                                 <3 RK_PA6 1 &pcfg_pull_none>,
1420                                 /* lcdc_d14 */
1421                                 <3 RK_PA7 1 &pcfg_pull_none>,
1422                                 /* lcdc_d15 */
1423                                 <3 RK_PB0 1 &pcfg_pull_none>,
1424                                 /* lcdc_d16 */
1425                                 <3 RK_PB1 1 &pcfg_pull_none>,
1426                                 /* lcdc_d17 */
1427                                 <3 RK_PB2 1 &pcfg_pull_none>,
1428                                 /* lcdc_d18 */
1429                                 <3 RK_PB3 1 &pcfg_pull_none>,
1430                                 /* lcdc_d19 */
1431                                 <3 RK_PB4 1 &pcfg_pull_none>,
1432                                 /* lcdc_d20 */
1433                                 <3 RK_PB5 1 &pcfg_pull_none>,
1434                                 /* lcdc_d21 */
1435                                 <3 RK_PB6 1 &pcfg_pull_none>,
1436                                 /* lcdc_d22 */
1437                                 <3 RK_PB7 1 &pcfg_pull_none>,
1438                                 /* lcdc_d23 */
1439                                 <3 RK_PC0 1 &pcfg_pull_none>,
1440                                 /* lcdc_den */
1441                                 <3 RK_PC3 1 &pcfg_pull_none>,
1442                                 /* lcdc_hsync */
1443                                 <3 RK_PC1 1 &pcfg_pull_none>,
1444                                 /* lcdc_vsync */
1445                                 <3 RK_PC2 1 &pcfg_pull_none>;
1446                 };
1447         };
1448
1449         mcu {
1450                 /omit-if-no-ref/
1451                 mcu_pins: mcu-pins {
1452                         rockchip,pins =
1453                                 /* mcu_jtagtck */
1454                                 <0 RK_PB4 4 &pcfg_pull_none>,
1455                                 /* mcu_jtagtdi */
1456                                 <0 RK_PC1 4 &pcfg_pull_none>,
1457                                 /* mcu_jtagtdo */
1458                                 <0 RK_PB3 4 &pcfg_pull_none>,
1459                                 /* mcu_jtagtms */
1460                                 <0 RK_PC2 4 &pcfg_pull_none>,
1461                                 /* mcu_jtagtrstn */
1462                                 <0 RK_PC3 4 &pcfg_pull_none>;
1463                 };
1464         };
1465
1466         npu {
1467                 /omit-if-no-ref/
1468                 npu_pins: npu-pins {
1469                         rockchip,pins =
1470                                 /* npu_avs */
1471                                 <0 RK_PC1 2 &pcfg_pull_none>;
1472                 };
1473         };
1474
1475         pcie20 {
1476                 /omit-if-no-ref/
1477                 pcie20m0_pins: pcie20m0-pins {
1478                         rockchip,pins =
1479                                 /* pcie20_clkreqnm0 */
1480                                 <0 RK_PA5 3 &pcfg_pull_none>,
1481                                 /* pcie20_perstnm0 */
1482                                 <0 RK_PB6 3 &pcfg_pull_none>,
1483                                 /* pcie20_wakenm0 */
1484                                 <0 RK_PB5 3 &pcfg_pull_none>;
1485                 };
1486
1487                 /omit-if-no-ref/
1488                 pcie20m1_pins: pcie20m1-pins {
1489                         rockchip,pins =
1490                                 /* pcie20_clkreqnm1 */
1491                                 <2 RK_PD0 4 &pcfg_pull_none>,
1492                                 /* pcie20_perstnm1 */
1493                                 <3 RK_PC1 4 &pcfg_pull_none>,
1494                                 /* pcie20_wakenm1 */
1495                                 <2 RK_PD1 4 &pcfg_pull_none>;
1496                 };
1497
1498                 /omit-if-no-ref/
1499                 pcie20m2_pins: pcie20m2-pins {
1500                         rockchip,pins =
1501                                 /* pcie20_clkreqnm2 */
1502                                 <1 RK_PB0 4 &pcfg_pull_none>,
1503                                 /* pcie20_perstnm2 */
1504                                 <1 RK_PB2 4 &pcfg_pull_none>,
1505                                 /* pcie20_wakenm2 */
1506                                 <1 RK_PB1 4 &pcfg_pull_none>;
1507                 };
1508
1509                 /omit-if-no-ref/
1510                 pcie20_buttonrstn: pcie20-buttonrstn {
1511                         rockchip,pins =
1512                                 /* pcie20_buttonrstn */
1513                                 <0 RK_PB4 3 &pcfg_pull_none>;
1514                 };
1515         };
1516
1517         pcie30x1 {
1518                 /omit-if-no-ref/
1519                 pcie30x1m0_pins: pcie30x1m0-pins {
1520                         rockchip,pins =
1521                                 /* pcie30x1_clkreqnm0 */
1522                                 <0 RK_PA4 3 &pcfg_pull_none>,
1523                                 /* pcie30x1_perstnm0 */
1524                                 <0 RK_PC3 3 &pcfg_pull_none>,
1525                                 /* pcie30x1_wakenm0 */
1526                                 <0 RK_PC2 3 &pcfg_pull_none>;
1527                 };
1528
1529                 /omit-if-no-ref/
1530                 pcie30x1m1_pins: pcie30x1m1-pins {
1531                         rockchip,pins =
1532                                 /* pcie30x1_clkreqnm1 */
1533                                 <2 RK_PD2 4 &pcfg_pull_none>,
1534                                 /* pcie30x1_perstnm1 */
1535                                 <3 RK_PA1 4 &pcfg_pull_none>,
1536                                 /* pcie30x1_wakenm1 */
1537                                 <2 RK_PD3 4 &pcfg_pull_none>;
1538                 };
1539
1540                 /omit-if-no-ref/
1541                 pcie30x1m2_pins: pcie30x1m2-pins {
1542                         rockchip,pins =
1543                                 /* pcie30x1_clkreqnm2 */
1544                                 <1 RK_PA5 4 &pcfg_pull_none>,
1545                                 /* pcie30x1_perstnm2 */
1546                                 <1 RK_PA2 4 &pcfg_pull_none>,
1547                                 /* pcie30x1_wakenm2 */
1548                                 <1 RK_PA3 4 &pcfg_pull_none>;
1549                 };
1550
1551                 /omit-if-no-ref/
1552                 pcie30x1_buttonrstn: pcie30x1-buttonrstn {
1553                         rockchip,pins =
1554                                 /* pcie30x1_buttonrstn */
1555                                 <0 RK_PB3 3 &pcfg_pull_none>;
1556                 };
1557         };
1558
1559         pcie30x2 {
1560                 /omit-if-no-ref/
1561                 pcie30x2m0_pins: pcie30x2m0-pins {
1562                         rockchip,pins =
1563                                 /* pcie30x2_clkreqnm0 */
1564                                 <0 RK_PA6 2 &pcfg_pull_none>,
1565                                 /* pcie30x2_perstnm0 */
1566                                 <0 RK_PC6 3 &pcfg_pull_none>,
1567                                 /* pcie30x2_wakenm0 */
1568                                 <0 RK_PC5 3 &pcfg_pull_none>;
1569                 };
1570
1571                 /omit-if-no-ref/
1572                 pcie30x2m1_pins: pcie30x2m1-pins {
1573                         rockchip,pins =
1574                                 /* pcie30x2_clkreqnm1 */
1575                                 <2 RK_PD4 4 &pcfg_pull_none>,
1576                                 /* pcie30x2_perstnm1 */
1577                                 <2 RK_PD6 4 &pcfg_pull_none>,
1578                                 /* pcie30x2_wakenm1 */
1579                                 <2 RK_PD5 4 &pcfg_pull_none>;
1580                 };
1581
1582                 /omit-if-no-ref/
1583                 pcie30x2m2_pins: pcie30x2m2-pins {
1584                         rockchip,pins =
1585                                 /* pcie30x2_clkreqnm2 */
1586                                 <4 RK_PC2 4 &pcfg_pull_none>,
1587                                 /* pcie30x2_perstnm2 */
1588                                 <4 RK_PC4 4 &pcfg_pull_none>,
1589                                 /* pcie30x2_wakenm2 */
1590                                 <4 RK_PC3 4 &pcfg_pull_none>;
1591                 };
1592
1593                 /omit-if-no-ref/
1594                 pcie30x2_buttonrstn: pcie30x2-buttonrstn {
1595                         rockchip,pins =
1596                                 /* pcie30x2_buttonrstn */
1597                                 <0 RK_PB0 3 &pcfg_pull_none>;
1598                 };
1599         };
1600
1601         pdm {
1602                 /omit-if-no-ref/
1603                 pdmm0_clk: pdmm0-clk {
1604                         rockchip,pins =
1605                                 /* pdm_clk0m0 */
1606                                 <1 RK_PA6 3 &pcfg_pull_none>;
1607                 };
1608
1609                 /omit-if-no-ref/
1610                 pdmm0_clk1: pdmm0-clk1 {
1611                         rockchip,pins =
1612                                 /* pdmm0_clk1 */
1613                                 <1 RK_PA4 3 &pcfg_pull_none>;
1614                 };
1615
1616                 /omit-if-no-ref/
1617                 pdmm0_sdi0: pdmm0-sdi0 {
1618                         rockchip,pins =
1619                                 /* pdmm0_sdi0 */
1620                                 <1 RK_PB3 2 &pcfg_pull_none>;
1621                 };
1622
1623                 /omit-if-no-ref/
1624                 pdmm0_sdi1: pdmm0-sdi1 {
1625                         rockchip,pins =
1626                                 /* pdmm0_sdi1 */
1627                                 <1 RK_PB2 3 &pcfg_pull_none>;
1628                 };
1629
1630                 /omit-if-no-ref/
1631                 pdmm0_sdi2: pdmm0-sdi2 {
1632                         rockchip,pins =
1633                                 /* pdmm0_sdi2 */
1634                                 <1 RK_PB1 3 &pcfg_pull_none>;
1635                 };
1636
1637                 /omit-if-no-ref/
1638                 pdmm0_sdi3: pdmm0-sdi3 {
1639                         rockchip,pins =
1640                                 /* pdmm0_sdi3 */
1641                                 <1 RK_PB0 3 &pcfg_pull_none>;
1642                 };
1643
1644                 /omit-if-no-ref/
1645                 pdmm1_clk: pdmm1-clk {
1646                         rockchip,pins =
1647                                 /* pdm_clk0m1 */
1648                                 <3 RK_PD6 5 &pcfg_pull_none>;
1649                 };
1650
1651                 /omit-if-no-ref/
1652                 pdmm1_clk1: pdmm1-clk1 {
1653                         rockchip,pins =
1654                                 /* pdmm1_clk1 */
1655                                 <4 RK_PA0 4 &pcfg_pull_none>;
1656                 };
1657
1658                 /omit-if-no-ref/
1659                 pdmm1_sdi0: pdmm1-sdi0 {
1660                         rockchip,pins =
1661                                 /* pdmm1_sdi0 */
1662                                 <3 RK_PD7 5 &pcfg_pull_none>;
1663                 };
1664
1665                 /omit-if-no-ref/
1666                 pdmm1_sdi1: pdmm1-sdi1 {
1667                         rockchip,pins =
1668                                 /* pdmm1_sdi1 */
1669                                 <4 RK_PA1 4 &pcfg_pull_none>;
1670                 };
1671
1672                 /omit-if-no-ref/
1673                 pdmm1_sdi2: pdmm1-sdi2 {
1674                         rockchip,pins =
1675                                 /* pdmm1_sdi2 */
1676                                 <4 RK_PA2 5 &pcfg_pull_none>;
1677                 };
1678
1679                 /omit-if-no-ref/
1680                 pdmm1_sdi3: pdmm1-sdi3 {
1681                         rockchip,pins =
1682                                 /* pdmm1_sdi3 */
1683                                 <4 RK_PA3 5 &pcfg_pull_none>;
1684                 };
1685
1686                 /omit-if-no-ref/
1687                 pdmm2_clk1: pdmm2-clk1 {
1688                         rockchip,pins =
1689                                 /* pdmm2_clk1 */
1690                                 <3 RK_PC4 5 &pcfg_pull_none>;
1691                 };
1692
1693                 /omit-if-no-ref/
1694                 pdmm2_sdi0: pdmm2-sdi0 {
1695                         rockchip,pins =
1696                                 /* pdmm2_sdi0 */
1697                                 <3 RK_PB3 5 &pcfg_pull_none>;
1698                 };
1699
1700                 /omit-if-no-ref/
1701                 pdmm2_sdi1: pdmm2-sdi1 {
1702                         rockchip,pins =
1703                                 /* pdmm2_sdi1 */
1704                                 <3 RK_PB4 5 &pcfg_pull_none>;
1705                 };
1706
1707                 /omit-if-no-ref/
1708                 pdmm2_sdi2: pdmm2-sdi2 {
1709                         rockchip,pins =
1710                                 /* pdmm2_sdi2 */
1711                                 <3 RK_PB7 5 &pcfg_pull_none>;
1712                 };
1713
1714                 /omit-if-no-ref/
1715                 pdmm2_sdi3: pdmm2-sdi3 {
1716                         rockchip,pins =
1717                                 /* pdmm2_sdi3 */
1718                                 <3 RK_PC0 5 &pcfg_pull_none>;
1719                 };
1720         };
1721
1722         pmic {
1723                 /omit-if-no-ref/
1724                 pmic_pins: pmic-pins {
1725                         rockchip,pins =
1726                                 /* pmic_sleep */
1727                                 <0 RK_PA2 1 &pcfg_pull_none>;
1728                 };
1729         };
1730
1731         pmu {
1732                 /omit-if-no-ref/
1733                 pmu_pins: pmu-pins {
1734                         rockchip,pins =
1735                                 /* pmu_debug0 */
1736                                 <0 RK_PA5 4 &pcfg_pull_none>,
1737                                 /* pmu_debug1 */
1738                                 <0 RK_PA6 3 &pcfg_pull_none>,
1739                                 /* pmu_debug2 */
1740                                 <0 RK_PC4 4 &pcfg_pull_none>,
1741                                 /* pmu_debug3 */
1742                                 <0 RK_PC5 4 &pcfg_pull_none>,
1743                                 /* pmu_debug4 */
1744                                 <0 RK_PC6 4 &pcfg_pull_none>,
1745                                 /* pmu_debug5 */
1746                                 <0 RK_PC7 4 &pcfg_pull_none>;
1747                 };
1748         };
1749
1750         pwm0 {
1751                 /omit-if-no-ref/
1752                 pwm0m0_pins: pwm0m0-pins {
1753                         rockchip,pins =
1754                                 /* pwm0_m0 */
1755                                 <0 RK_PB7 1 &pcfg_pull_none>;
1756                 };
1757
1758                 /omit-if-no-ref/
1759                 pwm0m1_pins: pwm0m1-pins {
1760                         rockchip,pins =
1761                                 /* pwm0_m1 */
1762                                 <0 RK_PC7 2 &pcfg_pull_none>;
1763                 };
1764         };
1765
1766         pwm1 {
1767                 /omit-if-no-ref/
1768                 pwm1m0_pins: pwm1m0-pins {
1769                         rockchip,pins =
1770                                 /* pwm1_m0 */
1771                                 <0 RK_PC0 1 &pcfg_pull_none>;
1772                 };
1773
1774                 /omit-if-no-ref/
1775                 pwm1m1_pins: pwm1m1-pins {
1776                         rockchip,pins =
1777                                 /* pwm1_m1 */
1778                                 <0 RK_PB5 4 &pcfg_pull_none>;
1779                 };
1780         };
1781
1782         pwm2 {
1783                 /omit-if-no-ref/
1784                 pwm2m0_pins: pwm2m0-pins {
1785                         rockchip,pins =
1786                                 /* pwm2_m0 */
1787                                 <0 RK_PC1 1 &pcfg_pull_none>;
1788                 };
1789
1790                 /omit-if-no-ref/
1791                 pwm2m1_pins: pwm2m1-pins {
1792                         rockchip,pins =
1793                                 /* pwm2_m1 */
1794                                 <0 RK_PB6 4 &pcfg_pull_none>;
1795                 };
1796         };
1797
1798         pwm3 {
1799                 /omit-if-no-ref/
1800                 pwm3_pins: pwm3-pins {
1801                         rockchip,pins =
1802                                 /* pwm3_ir */
1803                                 <0 RK_PC2 1 &pcfg_pull_none>;
1804                 };
1805         };
1806
1807         pwm4 {
1808                 /omit-if-no-ref/
1809                 pwm4_pins: pwm4-pins {
1810                         rockchip,pins =
1811                                 /* pwm4 */
1812                                 <0 RK_PC3 1 &pcfg_pull_none>;
1813                 };
1814         };
1815
1816         pwm5 {
1817                 /omit-if-no-ref/
1818                 pwm5_pins: pwm5-pins {
1819                         rockchip,pins =
1820                                 /* pwm5 */
1821                                 <0 RK_PC4 1 &pcfg_pull_none>;
1822                 };
1823         };
1824
1825         pwm6 {
1826                 /omit-if-no-ref/
1827                 pwm6_pins: pwm6-pins {
1828                         rockchip,pins =
1829                                 /* pwm6 */
1830                                 <0 RK_PC5 1 &pcfg_pull_none>;
1831                 };
1832         };
1833
1834         pwm7 {
1835                 /omit-if-no-ref/
1836                 pwm7_pins: pwm7-pins {
1837                         rockchip,pins =
1838                                 /* pwm7_ir */
1839                                 <0 RK_PC6 1 &pcfg_pull_none>;
1840                 };
1841         };
1842
1843         pwm8 {
1844                 /omit-if-no-ref/
1845                 pwm8m0_pins: pwm8m0-pins {
1846                         rockchip,pins =
1847                                 /* pwm8_m0 */
1848                                 <3 RK_PB1 5 &pcfg_pull_none>;
1849                 };
1850
1851                 /omit-if-no-ref/
1852                 pwm8m1_pins: pwm8m1-pins {
1853                         rockchip,pins =
1854                                 /* pwm8_m1 */
1855                                 <1 RK_PD5 4 &pcfg_pull_none>;
1856                 };
1857         };
1858
1859         pwm9 {
1860                 /omit-if-no-ref/
1861                 pwm9m0_pins: pwm9m0-pins {
1862                         rockchip,pins =
1863                                 /* pwm9_m0 */
1864                                 <3 RK_PB2 5 &pcfg_pull_none>;
1865                 };
1866
1867                 /omit-if-no-ref/
1868                 pwm9m1_pins: pwm9m1-pins {
1869                         rockchip,pins =
1870                                 /* pwm9_m1 */
1871                                 <1 RK_PD6 4 &pcfg_pull_none>;
1872                 };
1873         };
1874
1875         pwm10 {
1876                 /omit-if-no-ref/
1877                 pwm10m0_pins: pwm10m0-pins {
1878                         rockchip,pins =
1879                                 /* pwm10_m0 */
1880                                 <3 RK_PB5 5 &pcfg_pull_none>;
1881                 };
1882
1883                 /omit-if-no-ref/
1884                 pwm10m1_pins: pwm10m1-pins {
1885                         rockchip,pins =
1886                                 /* pwm10_m1 */
1887                                 <2 RK_PA1 2 &pcfg_pull_none>;
1888                 };
1889         };
1890
1891         pwm11 {
1892                 /omit-if-no-ref/
1893                 pwm11m0_pins: pwm11m0-pins {
1894                         rockchip,pins =
1895                                 /* pwm11_irm0 */
1896                                 <3 RK_PB6 5 &pcfg_pull_none>;
1897                 };
1898
1899                 /omit-if-no-ref/
1900                 pwm11m1_pins: pwm11m1-pins {
1901                         rockchip,pins =
1902                                 /* pwm11_irm1 */
1903                                 <4 RK_PC0 3 &pcfg_pull_none>;
1904                 };
1905         };
1906
1907         pwm12 {
1908                 /omit-if-no-ref/
1909                 pwm12m0_pins: pwm12m0-pins {
1910                         rockchip,pins =
1911                                 /* pwm12_m0 */
1912                                 <3 RK_PB7 2 &pcfg_pull_none>;
1913                 };
1914
1915                 /omit-if-no-ref/
1916                 pwm12m1_pins: pwm12m1-pins {
1917                         rockchip,pins =
1918                                 /* pwm12_m1 */
1919                                 <4 RK_PC5 1 &pcfg_pull_none>;
1920                 };
1921         };
1922
1923         pwm13 {
1924                 /omit-if-no-ref/
1925                 pwm13m0_pins: pwm13m0-pins {
1926                         rockchip,pins =
1927                                 /* pwm13_m0 */
1928                                 <3 RK_PC0 2 &pcfg_pull_none>;
1929                 };
1930
1931                 /omit-if-no-ref/
1932                 pwm13m1_pins: pwm13m1-pins {
1933                         rockchip,pins =
1934                                 /* pwm13_m1 */
1935                                 <4 RK_PC6 1 &pcfg_pull_none>;
1936                 };
1937         };
1938
1939         pwm14 {
1940                 /omit-if-no-ref/
1941                 pwm14m0_pins: pwm14m0-pins {
1942                         rockchip,pins =
1943                                 /* pwm14_m0 */
1944                                 <3 RK_PC4 1 &pcfg_pull_none>;
1945                 };
1946
1947                 /omit-if-no-ref/
1948                 pwm14m1_pins: pwm14m1-pins {
1949                         rockchip,pins =
1950                                 /* pwm14_m1 */
1951                                 <4 RK_PC2 1 &pcfg_pull_none>;
1952                 };
1953         };
1954
1955         pwm15 {
1956                 /omit-if-no-ref/
1957                 pwm15m0_pins: pwm15m0-pins {
1958                         rockchip,pins =
1959                                 /* pwm15_irm0 */
1960                                 <3 RK_PC5 1 &pcfg_pull_none>;
1961                 };
1962
1963                 /omit-if-no-ref/
1964                 pwm15m1_pins: pwm15m1-pins {
1965                         rockchip,pins =
1966                                 /* pwm15_irm1 */
1967                                 <4 RK_PC3 1 &pcfg_pull_none>;
1968                 };
1969         };
1970
1971         refclk {
1972                 /omit-if-no-ref/
1973                 refclk_pins: refclk-pins {
1974                         rockchip,pins =
1975                                 /* refclk_ou */
1976                                 <0 RK_PA0 1 &pcfg_pull_none>;
1977                 };
1978         };
1979
1980         sata {
1981                 /omit-if-no-ref/
1982                 sata_pins: sata-pins {
1983                         rockchip,pins =
1984                                 /* sata_cpdet */
1985                                 <0 RK_PA4 2 &pcfg_pull_none>,
1986                                 /* sata_cppod */
1987                                 <0 RK_PA6 1 &pcfg_pull_none>,
1988                                 /* sata_mpswitch */
1989                                 <0 RK_PA5 2 &pcfg_pull_none>;
1990                 };
1991         };
1992
1993         sata0 {
1994                 /omit-if-no-ref/
1995                 sata0_pins: sata0-pins {
1996                         rockchip,pins =
1997                                 /* sata0_actled */
1998                                 <4 RK_PC6 3 &pcfg_pull_none>;
1999                 };
2000         };
2001
2002         sata1 {
2003                 /omit-if-no-ref/
2004                 sata1_pins: sata1-pins {
2005                         rockchip,pins =
2006                                 /* sata1_actled */
2007                                 <4 RK_PC5 3 &pcfg_pull_none>;
2008                 };
2009         };
2010
2011         sata2 {
2012                 /omit-if-no-ref/
2013                 sata2_pins: sata2-pins {
2014                         rockchip,pins =
2015                                 /* sata2_actled */
2016                                 <4 RK_PC4 3 &pcfg_pull_none>;
2017                 };
2018         };
2019
2020         scr {
2021                 /omit-if-no-ref/
2022                 scr_pins: scr-pins {
2023                         rockchip,pins =
2024                                 /* scr_clk */
2025                                 <1 RK_PA2 3 &pcfg_pull_none>,
2026                                 /* scr_det */
2027                                 <1 RK_PA7 3 &pcfg_pull_up>,
2028                                 /* scr_io */
2029                                 <1 RK_PA3 3 &pcfg_pull_up>,
2030                                 /* scr_rst */
2031                                 <1 RK_PA5 3 &pcfg_pull_none>;
2032                 };
2033         };
2034
2035         sdmmc0 {
2036                 /omit-if-no-ref/
2037                 sdmmc0_bus4: sdmmc0-bus4 {
2038                         rockchip,pins =
2039                                 /* sdmmc0_d0 */
2040                                 <1 RK_PD5 1 &pcfg_pull_up_drv_level_2>,
2041                                 /* sdmmc0_d1 */
2042                                 <1 RK_PD6 1 &pcfg_pull_up_drv_level_2>,
2043                                 /* sdmmc0_d2 */
2044                                 <1 RK_PD7 1 &pcfg_pull_up_drv_level_2>,
2045                                 /* sdmmc0_d3 */
2046                                 <2 RK_PA0 1 &pcfg_pull_up_drv_level_2>;
2047                 };
2048
2049                 /omit-if-no-ref/
2050                 sdmmc0_clk: sdmmc0-clk {
2051                         rockchip,pins =
2052                                 /* sdmmc0_clk */
2053                                 <2 RK_PA2 1 &pcfg_pull_up_drv_level_2>;
2054                 };
2055
2056                 /omit-if-no-ref/
2057                 sdmmc0_cmd: sdmmc0-cmd {
2058                         rockchip,pins =
2059                                 /* sdmmc0_cmd */
2060                                 <2 RK_PA1 1 &pcfg_pull_up_drv_level_2>;
2061                 };
2062
2063                 /omit-if-no-ref/
2064                 sdmmc0_det: sdmmc0-det {
2065                         rockchip,pins =
2066                                 /* sdmmc0_det */
2067                                 <0 RK_PA4 1 &pcfg_pull_up>;
2068                 };
2069
2070                 /omit-if-no-ref/
2071                 sdmmc0_pwren: sdmmc0-pwren {
2072                         rockchip,pins =
2073                                 /* sdmmc0_pwren */
2074                                 <0 RK_PA5 1 &pcfg_pull_none>;
2075                 };
2076         };
2077
2078         sdmmc1 {
2079                 /omit-if-no-ref/
2080                 sdmmc1_bus4: sdmmc1-bus4 {
2081                         rockchip,pins =
2082                                 /* sdmmc1_d0 */
2083                                 <2 RK_PA3 1 &pcfg_pull_up_drv_level_2>,
2084                                 /* sdmmc1_d1 */
2085                                 <2 RK_PA4 1 &pcfg_pull_up_drv_level_2>,
2086                                 /* sdmmc1_d2 */
2087                                 <2 RK_PA5 1 &pcfg_pull_up_drv_level_2>,
2088                                 /* sdmmc1_d3 */
2089                                 <2 RK_PA6 1 &pcfg_pull_up_drv_level_2>;
2090                 };
2091
2092                 /omit-if-no-ref/
2093                 sdmmc1_clk: sdmmc1-clk {
2094                         rockchip,pins =
2095                                 /* sdmmc1_clk */
2096                                 <2 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
2097                 };
2098
2099                 /omit-if-no-ref/
2100                 sdmmc1_cmd: sdmmc1-cmd {
2101                         rockchip,pins =
2102                                 /* sdmmc1_cmd */
2103                                 <2 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
2104                 };
2105
2106                 /omit-if-no-ref/
2107                 sdmmc1_det: sdmmc1-det {
2108                         rockchip,pins =
2109                                 /* sdmmc1_det */
2110                                 <2 RK_PB2 1 &pcfg_pull_up>;
2111                 };
2112
2113                 /omit-if-no-ref/
2114                 sdmmc1_pwren: sdmmc1-pwren {
2115                         rockchip,pins =
2116                                 /* sdmmc1_pwren */
2117                                 <2 RK_PB1 1 &pcfg_pull_none>;
2118                 };
2119         };
2120
2121         sdmmc2 {
2122                 /omit-if-no-ref/
2123                 sdmmc2m0_bus4: sdmmc2m0-bus4 {
2124                         rockchip,pins =
2125                                 /* sdmmc2_d0m0 */
2126                                 <3 RK_PC6 3 &pcfg_pull_up_drv_level_2>,
2127                                 /* sdmmc2_d1m0 */
2128                                 <3 RK_PC7 3 &pcfg_pull_up_drv_level_2>,
2129                                 /* sdmmc2_d2m0 */
2130                                 <3 RK_PD0 3 &pcfg_pull_up_drv_level_2>,
2131                                 /* sdmmc2_d3m0 */
2132                                 <3 RK_PD1 3 &pcfg_pull_up_drv_level_2>;
2133                 };
2134
2135                 /omit-if-no-ref/
2136                 sdmmc2m0_clk: sdmmc2m0-clk {
2137                         rockchip,pins =
2138                                 /* sdmmc2_clkm0 */
2139                                 <3 RK_PD3 3 &pcfg_pull_up_drv_level_2>;
2140                 };
2141
2142                 /omit-if-no-ref/
2143                 sdmmc2m0_cmd: sdmmc2m0-cmd {
2144                         rockchip,pins =
2145                                 /* sdmmc2_cmdm0 */
2146                                 <3 RK_PD2 3 &pcfg_pull_up_drv_level_2>;
2147                 };
2148
2149                 /omit-if-no-ref/
2150                 sdmmc2m0_det: sdmmc2m0-det {
2151                         rockchip,pins =
2152                                 /* sdmmc2_detm0 */
2153                                 <3 RK_PD4 3 &pcfg_pull_up>;
2154                 };
2155
2156                 /omit-if-no-ref/
2157                 sdmmc2m0_pwren: sdmmc2m0-pwren {
2158                         rockchip,pins =
2159                                 /* sdmmc2m0_pwren */
2160                                 <3 RK_PD5 3 &pcfg_pull_none>;
2161                 };
2162
2163                 /omit-if-no-ref/
2164                 sdmmc2m1_bus4: sdmmc2m1-bus4 {
2165                         rockchip,pins =
2166                                 /* sdmmc2_d0m1 */
2167                                 <3 RK_PA1 5 &pcfg_pull_up_drv_level_2>,
2168                                 /* sdmmc2_d1m1 */
2169                                 <3 RK_PA2 5 &pcfg_pull_up_drv_level_2>,
2170                                 /* sdmmc2_d2m1 */
2171                                 <3 RK_PA3 5 &pcfg_pull_up_drv_level_2>,
2172                                 /* sdmmc2_d3m1 */
2173                                 <3 RK_PA4 5 &pcfg_pull_up_drv_level_2>;
2174                 };
2175
2176                 /omit-if-no-ref/
2177                 sdmmc2m1_clk: sdmmc2m1-clk {
2178                         rockchip,pins =
2179                                 /* sdmmc2_clkm1 */
2180                                 <3 RK_PA6 5 &pcfg_pull_up_drv_level_2>;
2181                 };
2182
2183                 /omit-if-no-ref/
2184                 sdmmc2m1_cmd: sdmmc2m1-cmd {
2185                         rockchip,pins =
2186                                 /* sdmmc2_cmdm1 */
2187                                 <3 RK_PA5 5 &pcfg_pull_up_drv_level_2>;
2188                 };
2189
2190                 /omit-if-no-ref/
2191                 sdmmc2m1_det: sdmmc2m1-det {
2192                         rockchip,pins =
2193                                 /* sdmmc2_detm1 */
2194                                 <3 RK_PA7 4 &pcfg_pull_up>;
2195                 };
2196
2197                 /omit-if-no-ref/
2198                 sdmmc2m1_pwren: sdmmc2m1-pwren {
2199                         rockchip,pins =
2200                                 /* sdmmc2m1_pwren */
2201                                 <3 RK_PB0 4 &pcfg_pull_none>;
2202                 };
2203         };
2204
2205         spdif {
2206                 /omit-if-no-ref/
2207                 spdifm0_tx: spdifm0-tx {
2208                         rockchip,pins =
2209                                 /* spdifm0_tx */
2210                                 <1 RK_PA4 4 &pcfg_pull_none>;
2211                 };
2212
2213                 /omit-if-no-ref/
2214                 spdifm1_tx: spdifm1-tx {
2215                         rockchip,pins =
2216                                 /* spdifm1_tx */
2217                                 <3 RK_PC5 2 &pcfg_pull_none>;
2218                 };
2219
2220                 /omit-if-no-ref/
2221                 spdifm2_tx: spdifm2-tx {
2222                         rockchip,pins =
2223                                 /* spdifm2_tx */
2224                                 <4 RK_PC4 2 &pcfg_pull_none>;
2225                 };
2226         };
2227
2228         spi0 {
2229                 /omit-if-no-ref/
2230                 spi0m0_pins: spi0m0-pins {
2231                         rockchip,pins =
2232                                 /* spi0_clkm0 */
2233                                 <0 RK_PB5 2 &pcfg_pull_none>,
2234                                 /* spi0_misom0 */
2235                                 <0 RK_PC5 2 &pcfg_pull_none>,
2236                                 /* spi0_mosim0 */
2237                                 <0 RK_PB6 2 &pcfg_pull_none>;
2238                 };
2239
2240                 /omit-if-no-ref/
2241                 spi0m0_cs0: spi0m0-cs0 {
2242                         rockchip,pins =
2243                                 /* spi0_cs0m0 */
2244                                 <0 RK_PC6 2 &pcfg_pull_none>;
2245                 };
2246
2247                 /omit-if-no-ref/
2248                 spi0m0_cs1: spi0m0-cs1 {
2249                         rockchip,pins =
2250                                 /* spi0_cs1m0 */
2251                                 <0 RK_PC4 2 &pcfg_pull_none>;
2252                 };
2253
2254                 /omit-if-no-ref/
2255                 spi0m1_pins: spi0m1-pins {
2256                         rockchip,pins =
2257                                 /* spi0_clkm1 */
2258                                 <2 RK_PD3 3 &pcfg_pull_none>,
2259                                 /* spi0_misom1 */
2260                                 <2 RK_PD0 3 &pcfg_pull_none>,
2261                                 /* spi0_mosim1 */
2262                                 <2 RK_PD1 3 &pcfg_pull_none>;
2263                 };
2264
2265                 /omit-if-no-ref/
2266                 spi0m1_cs0: spi0m1-cs0 {
2267                         rockchip,pins =
2268                                 /* spi0_cs0m1 */
2269                                 <2 RK_PD2 3 &pcfg_pull_none>;
2270                 };
2271         };
2272
2273         spi1 {
2274                 /omit-if-no-ref/
2275                 spi1m0_pins: spi1m0-pins {
2276                         rockchip,pins =
2277                                 /* spi1_clkm0 */
2278                                 <2 RK_PB5 3 &pcfg_pull_none>,
2279                                 /* spi1_misom0 */
2280                                 <2 RK_PB6 3 &pcfg_pull_none>,
2281                                 /* spi1_mosim0 */
2282                                 <2 RK_PB7 4 &pcfg_pull_none>;
2283                 };
2284
2285                 /omit-if-no-ref/
2286                 spi1m0_cs0: spi1m0-cs0 {
2287                         rockchip,pins =
2288                                 /* spi1_cs0m0 */
2289                                 <2 RK_PC0 4 &pcfg_pull_none>;
2290                 };
2291
2292                 /omit-if-no-ref/
2293                 spi1m0_cs1: spi1m0-cs1 {
2294                         rockchip,pins =
2295                                 /* spi1_cs1m0 */
2296                                 <2 RK_PC6 3 &pcfg_pull_none>;
2297                 };
2298
2299                 /omit-if-no-ref/
2300                 spi1m1_pins: spi1m1-pins {
2301                         rockchip,pins =
2302                                 /* spi1_clkm1 */
2303                                 <3 RK_PC3 3 &pcfg_pull_none>,
2304                                 /* spi1_misom1 */
2305                                 <3 RK_PC2 3 &pcfg_pull_none>,
2306                                 /* spi1_mosim1 */
2307                                 <3 RK_PC1 3 &pcfg_pull_none>;
2308                 };
2309
2310                 /omit-if-no-ref/
2311                 spi1m1_cs0: spi1m1-cs0 {
2312                         rockchip,pins =
2313                                 /* spi1_cs0m1 */
2314                                 <3 RK_PA1 3 &pcfg_pull_none>;
2315                 };
2316         };
2317
2318         spi2 {
2319                 /omit-if-no-ref/
2320                 spi2m0_pins: spi2m0-pins {
2321                         rockchip,pins =
2322                                 /* spi2_clkm0 */
2323                                 <2 RK_PC1 4 &pcfg_pull_none>,
2324                                 /* spi2_misom0 */
2325                                 <2 RK_PC2 4 &pcfg_pull_none>,
2326                                 /* spi2_mosim0 */
2327                                 <2 RK_PC3 4 &pcfg_pull_none>;
2328                 };
2329
2330                 /omit-if-no-ref/
2331                 spi2m0_cs0: spi2m0-cs0 {
2332                         rockchip,pins =
2333                                 /* spi2_cs0m0 */
2334                                 <2 RK_PC4 4 &pcfg_pull_none>;
2335                 };
2336
2337                 /omit-if-no-ref/
2338                 spi2m0_cs1: spi2m0-cs1 {
2339                         rockchip,pins =
2340                                 /* spi2_cs1m0 */
2341                                 <2 RK_PC5 4 &pcfg_pull_none>;
2342                 };
2343
2344                 /omit-if-no-ref/
2345                 spi2m1_pins: spi2m1-pins {
2346                         rockchip,pins =
2347                                 /* spi2_clkm1 */
2348                                 <3 RK_PA0 3 &pcfg_pull_none>,
2349                                 /* spi2_misom1 */
2350                                 <2 RK_PD7 3 &pcfg_pull_none>,
2351                                 /* spi2_mosim1 */
2352                                 <2 RK_PD6 3 &pcfg_pull_none>;
2353                 };
2354
2355                 /omit-if-no-ref/
2356                 spi2m1_cs0: spi2m1-cs0 {
2357                         rockchip,pins =
2358                                 /* spi2_cs0m1 */
2359                                 <2 RK_PD5 3 &pcfg_pull_none>;
2360                 };
2361
2362                 /omit-if-no-ref/
2363                 spi2m1_cs1: spi2m1-cs1 {
2364                         rockchip,pins =
2365                                 /* spi2_cs1m1 */
2366                                 <2 RK_PD4 3 &pcfg_pull_none>;
2367                 };
2368         };
2369
2370         spi3 {
2371                 /omit-if-no-ref/
2372                 spi3m0_pins: spi3m0-pins {
2373                         rockchip,pins =
2374                                 /* spi3_clkm0 */
2375                                 <4 RK_PB3 4 &pcfg_pull_none>,
2376                                 /* spi3_misom0 */
2377                                 <4 RK_PB0 4 &pcfg_pull_none>,
2378                                 /* spi3_mosim0 */
2379                                 <4 RK_PB2 4 &pcfg_pull_none>;
2380                 };
2381
2382                 /omit-if-no-ref/
2383                 spi3m0_cs0: spi3m0-cs0 {
2384                         rockchip,pins =
2385                                 /* spi3_cs0m0 */
2386                                 <4 RK_PA6 4 &pcfg_pull_none>;
2387                 };
2388
2389                 /omit-if-no-ref/
2390                 spi3m0_cs1: spi3m0-cs1 {
2391                         rockchip,pins =
2392                                 /* spi3_cs1m0 */
2393                                 <4 RK_PA7 4 &pcfg_pull_none>;
2394                 };
2395
2396                 /omit-if-no-ref/
2397                 spi3m1_pins: spi3m1-pins {
2398                         rockchip,pins =
2399                                 /* spi3_clkm1 */
2400                                 <4 RK_PC2 2 &pcfg_pull_none>,
2401                                 /* spi3_misom1 */
2402                                 <4 RK_PC5 2 &pcfg_pull_none>,
2403                                 /* spi3_mosim1 */
2404                                 <4 RK_PC3 2 &pcfg_pull_none>;
2405                 };
2406
2407                 /omit-if-no-ref/
2408                 spi3m1_cs0: spi3m1-cs0 {
2409                         rockchip,pins =
2410                                 /* spi3_cs0m1 */
2411                                 <4 RK_PC6 2 &pcfg_pull_none>;
2412                 };
2413
2414                 /omit-if-no-ref/
2415                 spi3m1_cs1: spi3m1-cs1 {
2416                         rockchip,pins =
2417                                 /* spi3_cs1m1 */
2418                                 <4 RK_PD1 2 &pcfg_pull_none>;
2419                 };
2420         };
2421
2422         tsadc {
2423                 /omit-if-no-ref/
2424                 tsadcm0_shut: tsadcm0-shut {
2425                         rockchip,pins =
2426                                 /* tsadcm0_shut */
2427                                 <0 RK_PA1 1 &pcfg_pull_none>;
2428                 };
2429
2430                 /omit-if-no-ref/
2431                 tsadcm1_shut: tsadcm1-shut {
2432                         rockchip,pins =
2433                                 /* tsadcm1_shut */
2434                                 <0 RK_PA2 2 &pcfg_pull_none>;
2435                 };
2436
2437                 /omit-if-no-ref/
2438                 tsadc_shutorg: tsadc-shutorg {
2439                         rockchip,pins =
2440                                 /* tsadc_shutorg */
2441                                 <0 RK_PA1 2 &pcfg_pull_none>;
2442                 };
2443         };
2444
2445         uart0 {
2446                 /omit-if-no-ref/
2447                 uart0_xfer: uart0-xfer {
2448                         rockchip,pins =
2449                                 /* uart0_rx */
2450                                 <0 RK_PC0 3 &pcfg_pull_up>,
2451                                 /* uart0_tx */
2452                                 <0 RK_PC1 3 &pcfg_pull_up>;
2453                 };
2454
2455                 /omit-if-no-ref/
2456                 uart0_ctsn: uart0-ctsn {
2457                         rockchip,pins =
2458                                 /* uart0_ctsn */
2459                                 <0 RK_PC7 3 &pcfg_pull_none>;
2460                 };
2461
2462                 /omit-if-no-ref/
2463                 uart0_rtsn: uart0-rtsn {
2464                         rockchip,pins =
2465                                 /* uart0_rtsn */
2466                                 <0 RK_PC4 3 &pcfg_pull_none>;
2467                 };
2468         };
2469
2470         uart1 {
2471                 /omit-if-no-ref/
2472                 uart1m0_xfer: uart1m0-xfer {
2473                         rockchip,pins =
2474                                 /* uart1_rxm0 */
2475                                 <2 RK_PB3 2 &pcfg_pull_up>,
2476                                 /* uart1_txm0 */
2477                                 <2 RK_PB4 2 &pcfg_pull_up>;
2478                 };
2479
2480                 /omit-if-no-ref/
2481                 uart1m0_ctsn: uart1m0-ctsn {
2482                         rockchip,pins =
2483                                 /* uart1m0_ctsn */
2484                                 <2 RK_PB6 2 &pcfg_pull_none>;
2485                 };
2486
2487                 /omit-if-no-ref/
2488                 uart1m0_rtsn: uart1m0-rtsn {
2489                         rockchip,pins =
2490                                 /* uart1m0_rtsn */
2491                                 <2 RK_PB5 2 &pcfg_pull_none>;
2492                 };
2493
2494                 /omit-if-no-ref/
2495                 uart1m1_xfer: uart1m1-xfer {
2496                         rockchip,pins =
2497                                 /* uart1_rxm1 */
2498                                 <3 RK_PD7 4 &pcfg_pull_up>,
2499                                 /* uart1_txm1 */
2500                                 <3 RK_PD6 4 &pcfg_pull_up>;
2501                 };
2502
2503                 /omit-if-no-ref/
2504                 uart1m1_ctsn: uart1m1-ctsn {
2505                         rockchip,pins =
2506                                 /* uart1m1_ctsn */
2507                                 <4 RK_PC1 4 &pcfg_pull_none>;
2508                 };
2509
2510                 /omit-if-no-ref/
2511                 uart1m1_rtsn: uart1m1-rtsn {
2512                         rockchip,pins =
2513                                 /* uart1m1_rtsn */
2514                                 <4 RK_PB6 4 &pcfg_pull_none>;
2515                 };
2516         };
2517
2518         uart2 {
2519                 /omit-if-no-ref/
2520                 uart2m0_xfer: uart2m0-xfer {
2521                         rockchip,pins =
2522                                 /* uart2_rxm0 */
2523                                 <0 RK_PD0 1 &pcfg_pull_up>,
2524                                 /* uart2_txm0 */
2525                                 <0 RK_PD1 1 &pcfg_pull_up>;
2526                 };
2527
2528                 /omit-if-no-ref/
2529                 uart2m1_xfer: uart2m1-xfer {
2530                         rockchip,pins =
2531                                 /* uart2_rxm1 */
2532                                 <1 RK_PD6 2 &pcfg_pull_up>,
2533                                 /* uart2_txm1 */
2534                                 <1 RK_PD5 2 &pcfg_pull_up>;
2535                 };
2536         };
2537
2538         uart3 {
2539                 /omit-if-no-ref/
2540                 uart3m0_xfer: uart3m0-xfer {
2541                         rockchip,pins =
2542                                 /* uart3_rxm0 */
2543                                 <1 RK_PA0 2 &pcfg_pull_up>,
2544                                 /* uart3_txm0 */
2545                                 <1 RK_PA1 2 &pcfg_pull_up>;
2546                 };
2547
2548                 /omit-if-no-ref/
2549                 uart3m0_ctsn: uart3m0-ctsn {
2550                         rockchip,pins =
2551                                 /* uart3m0_ctsn */
2552                                 <1 RK_PA3 2 &pcfg_pull_none>;
2553                 };
2554
2555                 /omit-if-no-ref/
2556                 uart3m0_rtsn: uart3m0-rtsn {
2557                         rockchip,pins =
2558                                 /* uart3m0_rtsn */
2559                                 <1 RK_PA2 2 &pcfg_pull_none>;
2560                 };
2561
2562                 /omit-if-no-ref/
2563                 uart3m1_xfer: uart3m1-xfer {
2564                         rockchip,pins =
2565                                 /* uart3_rxm1 */
2566                                 <3 RK_PC0 4 &pcfg_pull_up>,
2567                                 /* uart3_txm1 */
2568                                 <3 RK_PB7 4 &pcfg_pull_up>;
2569                 };
2570         };
2571
2572         uart4 {
2573                 /omit-if-no-ref/
2574                 uart4m0_xfer: uart4m0-xfer {
2575                         rockchip,pins =
2576                                 /* uart4_rxm0 */
2577                                 <1 RK_PA4 2 &pcfg_pull_up>,
2578                                 /* uart4_txm0 */
2579                                 <1 RK_PA6 2 &pcfg_pull_up>;
2580                 };
2581
2582                 /omit-if-no-ref/
2583                 uart4m0_ctsn: uart4m0-ctsn {
2584                         rockchip,pins =
2585                                 /* uart4m0_ctsn */
2586                                 <1 RK_PA7 2 &pcfg_pull_none>;
2587                 };
2588
2589                 /omit-if-no-ref/
2590                 uart4m0_rtsn: uart4m0-rtsn {
2591                         rockchip,pins =
2592                                 /* uart4m0_rtsn */
2593                                 <1 RK_PA5 2 &pcfg_pull_none>;
2594                 };
2595
2596                 /omit-if-no-ref/
2597                 uart4m1_xfer: uart4m1-xfer {
2598                         rockchip,pins =
2599                                 /* uart4_rxm1 */
2600                                 <3 RK_PB1 4 &pcfg_pull_up>,
2601                                 /* uart4_txm1 */
2602                                 <3 RK_PB2 4 &pcfg_pull_up>;
2603                 };
2604         };
2605
2606         uart5 {
2607                 /omit-if-no-ref/
2608                 uart5m0_xfer: uart5m0-xfer {
2609                         rockchip,pins =
2610                                 /* uart5_rxm0 */
2611                                 <2 RK_PA1 3 &pcfg_pull_up>,
2612                                 /* uart5_txm0 */
2613                                 <2 RK_PA2 3 &pcfg_pull_up>;
2614                 };
2615
2616                 /omit-if-no-ref/
2617                 uart5m0_ctsn: uart5m0-ctsn {
2618                         rockchip,pins =
2619                                 /* uart5m0_ctsn */
2620                                 <1 RK_PD7 3 &pcfg_pull_none>;
2621                 };
2622
2623                 /omit-if-no-ref/
2624                 uart5m0_rtsn: uart5m0-rtsn {
2625                         rockchip,pins =
2626                                 /* uart5m0_rtsn */
2627                                 <2 RK_PA0 3 &pcfg_pull_none>;
2628                 };
2629
2630                 /omit-if-no-ref/
2631                 uart5m1_xfer: uart5m1-xfer {
2632                         rockchip,pins =
2633                                 /* uart5_rxm1 */
2634                                 <3 RK_PC3 4 &pcfg_pull_up>,
2635                                 /* uart5_txm1 */
2636                                 <3 RK_PC2 4 &pcfg_pull_up>;
2637                 };
2638         };
2639
2640         uart6 {
2641                 /omit-if-no-ref/
2642                 uart6m0_xfer: uart6m0-xfer {
2643                         rockchip,pins =
2644                                 /* uart6_rxm0 */
2645                                 <2 RK_PA3 3 &pcfg_pull_up>,
2646                                 /* uart6_txm0 */
2647                                 <2 RK_PA4 3 &pcfg_pull_up>;
2648                 };
2649
2650                 /omit-if-no-ref/
2651                 uart6m0_ctsn: uart6m0-ctsn {
2652                         rockchip,pins =
2653                                 /* uart6m0_ctsn */
2654                                 <2 RK_PC0 3 &pcfg_pull_none>;
2655                 };
2656
2657                 /omit-if-no-ref/
2658                 uart6m0_rtsn: uart6m0-rtsn {
2659                         rockchip,pins =
2660                                 /* uart6m0_rtsn */
2661                                 <2 RK_PB7 3 &pcfg_pull_none>;
2662                 };
2663
2664                 /omit-if-no-ref/
2665                 uart6m1_xfer: uart6m1-xfer {
2666                         rockchip,pins =
2667                                 /* uart6_rxm1 */
2668                                 <1 RK_PD6 3 &pcfg_pull_up>,
2669                                 /* uart6_txm1 */
2670                                 <1 RK_PD5 3 &pcfg_pull_up>;
2671                 };
2672         };
2673
2674         uart7 {
2675                 /omit-if-no-ref/
2676                 uart7m0_xfer: uart7m0-xfer {
2677                         rockchip,pins =
2678                                 /* uart7_rxm0 */
2679                                 <2 RK_PA5 3 &pcfg_pull_up>,
2680                                 /* uart7_txm0 */
2681                                 <2 RK_PA6 3 &pcfg_pull_up>;
2682                 };
2683
2684                 /omit-if-no-ref/
2685                 uart7m0_ctsn: uart7m0-ctsn {
2686                         rockchip,pins =
2687                                 /* uart7m0_ctsn */
2688                                 <2 RK_PC2 3 &pcfg_pull_none>;
2689                 };
2690
2691                 /omit-if-no-ref/
2692                 uart7m0_rtsn: uart7m0-rtsn {
2693                         rockchip,pins =
2694                                 /* uart7m0_rtsn */
2695                                 <2 RK_PC1 3 &pcfg_pull_none>;
2696                 };
2697
2698                 /omit-if-no-ref/
2699                 uart7m1_xfer: uart7m1-xfer {
2700                         rockchip,pins =
2701                                 /* uart7_rxm1 */
2702                                 <3 RK_PC5 4 &pcfg_pull_up>,
2703                                 /* uart7_txm1 */
2704                                 <3 RK_PC4 4 &pcfg_pull_up>;
2705                 };
2706
2707                 /omit-if-no-ref/
2708                 uart7m2_xfer: uart7m2-xfer {
2709                         rockchip,pins =
2710                                 /* uart7_rxm2 */
2711                                 <4 RK_PA3 4 &pcfg_pull_up>,
2712                                 /* uart7_txm2 */
2713                                 <4 RK_PA2 4 &pcfg_pull_up>;
2714                 };
2715         };
2716
2717         uart8 {
2718                 /omit-if-no-ref/
2719                 uart8m0_xfer: uart8m0-xfer {
2720                         rockchip,pins =
2721                                 /* uart8_rxm0 */
2722                                 <2 RK_PC6 2 &pcfg_pull_up>,
2723                                 /* uart8_txm0 */
2724                                 <2 RK_PC5 3 &pcfg_pull_up>;
2725                 };
2726
2727                 /omit-if-no-ref/
2728                 uart8m0_ctsn: uart8m0-ctsn {
2729                         rockchip,pins =
2730                                 /* uart8m0_ctsn */
2731                                 <2 RK_PB2 3 &pcfg_pull_none>;
2732                 };
2733
2734                 /omit-if-no-ref/
2735                 uart8m0_rtsn: uart8m0-rtsn {
2736                         rockchip,pins =
2737                                 /* uart8m0_rtsn */
2738                                 <2 RK_PB1 3 &pcfg_pull_none>;
2739                 };
2740
2741                 /omit-if-no-ref/
2742                 uart8m1_xfer: uart8m1-xfer {
2743                         rockchip,pins =
2744                                 /* uart8_rxm1 */
2745                                 <3 RK_PA0 4 &pcfg_pull_up>,
2746                                 /* uart8_txm1 */
2747                                 <2 RK_PD7 4 &pcfg_pull_up>;
2748                 };
2749         };
2750
2751         uart9 {
2752                 /omit-if-no-ref/
2753                 uart9m0_xfer: uart9m0-xfer {
2754                         rockchip,pins =
2755                                 /* uart9_rxm0 */
2756                                 <2 RK_PA7 3 &pcfg_pull_up>,
2757                                 /* uart9_txm0 */
2758                                 <2 RK_PB0 3 &pcfg_pull_up>;
2759                 };
2760
2761                 /omit-if-no-ref/
2762                 uart9m0_ctsn: uart9m0-ctsn {
2763                         rockchip,pins =
2764                                 /* uart9m0_ctsn */
2765                                 <2 RK_PC4 3 &pcfg_pull_none>;
2766                 };
2767
2768                 /omit-if-no-ref/
2769                 uart9m0_rtsn: uart9m0-rtsn {
2770                         rockchip,pins =
2771                                 /* uart9m0_rtsn */
2772                                 <2 RK_PC3 3 &pcfg_pull_none>;
2773                 };
2774
2775                 /omit-if-no-ref/
2776                 uart9m1_xfer: uart9m1-xfer {
2777                         rockchip,pins =
2778                                 /* uart9_rxm1 */
2779                                 <4 RK_PC6 4 &pcfg_pull_up>,
2780                                 /* uart9_txm1 */
2781                                 <4 RK_PC5 4 &pcfg_pull_up>;
2782                 };
2783
2784                 /omit-if-no-ref/
2785                 uart9m2_xfer: uart9m2-xfer {
2786                         rockchip,pins =
2787                                 /* uart9_rxm2 */
2788                                 <4 RK_PA5 4 &pcfg_pull_up>,
2789                                 /* uart9_txm2 */
2790                                 <4 RK_PA4 4 &pcfg_pull_up>;
2791                 };
2792         };
2793
2794         vop {
2795                 /omit-if-no-ref/
2796                 vopm0_pins: vopm0-pins {
2797                         rockchip,pins =
2798                                 /* vop_pwmm0 */
2799                                 <0 RK_PC3 2 &pcfg_pull_none>;
2800                 };
2801
2802                 /omit-if-no-ref/
2803                 vopm1_pins: vopm1-pins {
2804                         rockchip,pins =
2805                                 /* vop_pwmm1 */
2806                                 <3 RK_PC4 2 &pcfg_pull_none>;
2807                 };
2808         };
2809 };
2810
2811 /*
2812  * This part is edited handly.
2813  */
2814 &pinctrl {
2815         spi0-hs {
2816                 /omit-if-no-ref/
2817                 spi0m0_pins_hs: spi0m0-pins {
2818                         rockchip,pins =
2819                                 /* spi0_clkm0 */
2820                                 <0 RK_PB5 2 &pcfg_pull_up_drv_level_1>,
2821                                 /* spi0_misom0 */
2822                                 <0 RK_PC5 2 &pcfg_pull_up_drv_level_1>,
2823                                 /* spi0_mosim0 */
2824                                 <0 RK_PB6 2 &pcfg_pull_up_drv_level_1>;
2825                 };
2826
2827                 /omit-if-no-ref/
2828                 spi0m0_cs0_hs: spi0m0-cs0 {
2829                         rockchip,pins =
2830                                 /* spi0_cs0m0 */
2831                                 <0 RK_PC6 2 &pcfg_pull_up_drv_level_1>;
2832                 };
2833
2834                 /omit-if-no-ref/
2835                 spi0m0_cs1_hs: spi0m0-cs1 {
2836                         rockchip,pins =
2837                                 /* spi0_cs1m0 */
2838                                 <0 RK_PC4 2 &pcfg_pull_up_drv_level_1>;
2839                 };
2840
2841                 /omit-if-no-ref/
2842                 spi0m1_pins_hs: spi0m1-pins {
2843                         rockchip,pins =
2844                                 /* spi0_clkm1 */
2845                                 <2 RK_PD3 3 &pcfg_pull_up_drv_level_1>,
2846                                 /* spi0_misom1 */
2847                                 <2 RK_PD0 3 &pcfg_pull_up_drv_level_1>,
2848                                 /* spi0_mosim1 */
2849                                 <2 RK_PD1 3 &pcfg_pull_up_drv_level_1>;
2850                 };
2851
2852                 /omit-if-no-ref/
2853                 spi0m1_cs0_hs: spi0m1-cs0 {
2854                         rockchip,pins =
2855                                 /* spi0_cs0m1 */
2856                                 <2 RK_PD2 3 &pcfg_pull_up_drv_level_1>;
2857                 };
2858         };
2859
2860         spi1-hs {
2861                 /omit-if-no-ref/
2862                 spi1m0_pins_hs: spi1m0-pins {
2863                         rockchip,pins =
2864                                 /* spi1_clkm0 */
2865                                 <2 RK_PB5 3 &pcfg_pull_up_drv_level_1>,
2866                                 /* spi1_misom0 */
2867                                 <2 RK_PB6 3 &pcfg_pull_up_drv_level_1>,
2868                                 /* spi1_mosim0 */
2869                                 <2 RK_PB7 4 &pcfg_pull_up_drv_level_1>;
2870                 };
2871
2872                 /omit-if-no-ref/
2873                 spi1m0_cs0_hs: spi1m0-cs0 {
2874                         rockchip,pins =
2875                                 /* spi1_cs0m0 */
2876                                 <2 RK_PC0 4 &pcfg_pull_up_drv_level_1>;
2877                 };
2878
2879                 /omit-if-no-ref/
2880                 spi1m0_cs1_hs: spi1m0-cs1 {
2881                         rockchip,pins =
2882                                 /* spi1_cs1m0 */
2883                                 <2 RK_PC6 3 &pcfg_pull_up_drv_level_1>;
2884                 };
2885
2886                 /omit-if-no-ref/
2887                 spi1m1_pins_hs: spi1m1-pins {
2888                         rockchip,pins =
2889                                 /* spi1_clkm1 */
2890                                 <3 RK_PC3 3 &pcfg_pull_up_drv_level_1>,
2891                                 /* spi1_misom1 */
2892                                 <3 RK_PC2 3 &pcfg_pull_up_drv_level_1>,
2893                                 /* spi1_mosim1 */
2894                                 <3 RK_PC1 3 &pcfg_pull_up_drv_level_1>;
2895                 };
2896
2897                 /omit-if-no-ref/
2898                 spi1m1_cs0_hs: spi1m1-cs0 {
2899                         rockchip,pins =
2900                                 /* spi1_cs0m1 */
2901                                 <3 RK_PA1 3 &pcfg_pull_up_drv_level_1>;
2902                 };
2903         };
2904
2905         spi2-hs {
2906                 /omit-if-no-ref/
2907                 spi2m0_pins_hs: spi2m0-pins {
2908                         rockchip,pins =
2909                                 /* spi2_clkm0 */
2910                                 <2 RK_PC1 4 &pcfg_pull_up_drv_level_1>,
2911                                 /* spi2_misom0 */
2912                                 <2 RK_PC2 4 &pcfg_pull_up_drv_level_1>,
2913                                 /* spi2_mosim0 */
2914                                 <2 RK_PC3 4 &pcfg_pull_up_drv_level_1>;
2915                 };
2916
2917                 /omit-if-no-ref/
2918                 spi2m0_cs0_hs: spi2m0-cs0 {
2919                         rockchip,pins =
2920                                 /* spi2_cs0m0 */
2921                                 <2 RK_PC4 4 &pcfg_pull_up_drv_level_1>;
2922                 };
2923
2924                 /omit-if-no-ref/
2925                 spi2m0_cs1_hs: spi2m0-cs1 {
2926                         rockchip,pins =
2927                                 /* spi2_cs1m0 */
2928                                 <2 RK_PC5 4 &pcfg_pull_up_drv_level_1>;
2929                 };
2930
2931                 /omit-if-no-ref/
2932                 spi2m1_pins_hs: spi2m1-pins {
2933                         rockchip,pins =
2934                                 /* spi2_clkm1 */
2935                                 <3 RK_PA0 3 &pcfg_pull_up_drv_level_1>,
2936                                 /* spi2_misom1 */
2937                                 <2 RK_PD7 3 &pcfg_pull_up_drv_level_1>,
2938                                 /* spi2_mosim1 */
2939                                 <2 RK_PD6 3 &pcfg_pull_up_drv_level_1>;
2940                 };
2941
2942                 /omit-if-no-ref/
2943                 spi2m1_cs0_hs: spi2m1-cs0 {
2944                         rockchip,pins =
2945                                 /* spi2_cs0m1 */
2946                                 <2 RK_PD5 3 &pcfg_pull_up_drv_level_1>;
2947                 };
2948
2949                 /omit-if-no-ref/
2950                 spi2m1_cs1_hs: spi2m1-cs1 {
2951                         rockchip,pins =
2952                                 /* spi2_cs1m1 */
2953                                 <2 RK_PD4 3 &pcfg_pull_up_drv_level_1>;
2954                 };
2955         };
2956
2957         spi3-hs {
2958                 /omit-if-no-ref/
2959                 spi3m0_pins_hs: spi3m0-pins {
2960                         rockchip,pins =
2961                                 /* spi3_clkm0 */
2962                                 <4 RK_PB3 4 &pcfg_pull_up_drv_level_1>,
2963                                 /* spi3_misom0 */
2964                                 <4 RK_PB0 4 &pcfg_pull_up_drv_level_1>,
2965                                 /* spi3_mosim0 */
2966                                 <4 RK_PB2 4 &pcfg_pull_up_drv_level_1>;
2967                 };
2968
2969                 /omit-if-no-ref/
2970                 spi3m0_cs0_hs: spi3m0-cs0 {
2971                         rockchip,pins =
2972                                 /* spi3_cs0m0 */
2973                                 <4 RK_PA6 4 &pcfg_pull_up_drv_level_1>;
2974                 };
2975
2976                 /omit-if-no-ref/
2977                 spi3m0_cs1_hs: spi3m0-cs1 {
2978                         rockchip,pins =
2979                                 /* spi3_cs1m0 */
2980                                 <4 RK_PA7 4 &pcfg_pull_up_drv_level_1>;
2981                 };
2982
2983                 /omit-if-no-ref/
2984                 spi3m1_pins_hs: spi3m1-pins {
2985                         rockchip,pins =
2986                                 /* spi3_clkm1 */
2987                                 <4 RK_PC2 2 &pcfg_pull_up_drv_level_1>,
2988                                 /* spi3_misom1 */
2989                                 <4 RK_PC5 2 &pcfg_pull_up_drv_level_1>,
2990                                 /* spi3_mosim1 */
2991                                 <4 RK_PC3 2 &pcfg_pull_up_drv_level_1>;
2992                 };
2993
2994                 /omit-if-no-ref/
2995                 spi3m1_cs0_hs: spi3m1-cs0 {
2996                         rockchip,pins =
2997                                 /* spi3_cs0m1 */
2998                                 <4 RK_PC6 2 &pcfg_pull_up_drv_level_1>;
2999                 };
3000
3001                 /omit-if-no-ref/
3002                 spi3m1_cs1_hs: spi3m1-cs1 {
3003                         rockchip,pins =
3004                                 /* spi3_cs1m1 */
3005                                 <4 RK_PD1 2 &pcfg_pull_up_drv_level_1>;
3006                 };
3007         };
3008
3009         gmac-txd-level3 {
3010                 /omit-if-no-ref/
3011                 gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 {
3012                         rockchip,pins =
3013                                 /* gmac0_txd0 */
3014                                 <2 RK_PB3 1 &pcfg_pull_none_drv_level_3>,
3015                                 /* gmac0_txd1 */
3016                                 <2 RK_PB4 1 &pcfg_pull_none_drv_level_3>,
3017                                 /* gmac0_txen */
3018                                 <2 RK_PB5 1 &pcfg_pull_none>;
3019                 };
3020
3021                 /omit-if-no-ref/
3022                 gmac0_rgmii_bus_level3: gmac0-rgmii-bus-level3 {
3023                         rockchip,pins =
3024                                 /* gmac0_rxd2 */
3025                                 <2 RK_PA3 2 &pcfg_pull_none>,
3026                                 /* gmac0_rxd3 */
3027                                 <2 RK_PA4 2 &pcfg_pull_none>,
3028                                 /* gmac0_txd2 */
3029                                 <2 RK_PA6 2 &pcfg_pull_none_drv_level_3>,
3030                                 /* gmac0_txd3 */
3031                                 <2 RK_PA7 2 &pcfg_pull_none_drv_level_3>;
3032                 };
3033
3034                 /omit-if-no-ref/
3035                 gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 {
3036                         rockchip,pins =
3037                                 /* gmac1_txd0m0 */
3038                                 <3 RK_PB5 3 &pcfg_pull_none_drv_level_3>,
3039                                 /* gmac1_txd1m0 */
3040                                 <3 RK_PB6 3 &pcfg_pull_none_drv_level_3>,
3041                                 /* gmac1_txenm0 */
3042                                 <3 RK_PB7 3 &pcfg_pull_none>;
3043                 };
3044
3045                 /omit-if-no-ref/
3046                 gmac1m0_rgmii_bus_level3: gmac1m0-rgmii-bus-level3 {
3047                         rockchip,pins =
3048                                 /* gmac1_rxd2m0 */
3049                                 <3 RK_PA4 3 &pcfg_pull_none>,
3050                                 /* gmac1_rxd3m0 */
3051                                 <3 RK_PA5 3 &pcfg_pull_none>,
3052                                 /* gmac1_txd2m0 */
3053                                 <3 RK_PA2 3 &pcfg_pull_none_drv_level_3>,
3054                                 /* gmac1_txd3m0 */
3055                                 <3 RK_PA3 3 &pcfg_pull_none_drv_level_3>;
3056                 };
3057
3058                 /omit-if-no-ref/
3059                 gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 {
3060                         rockchip,pins =
3061                                 /* gmac1_txd0m1 */
3062                                 <4 RK_PA4 3 &pcfg_pull_none_drv_level_3>,
3063                                 /* gmac1_txd1m1 */
3064                                 <4 RK_PA5 3 &pcfg_pull_none_drv_level_3>,
3065                                 /* gmac1_txenm1 */
3066                                 <4 RK_PA6 3 &pcfg_pull_none>;
3067                 };
3068
3069                 /omit-if-no-ref/
3070                 gmac1m1_rgmii_bus_level3: gmac1m1-rgmii-bus-level3 {
3071                         rockchip,pins =
3072                                 /* gmac1_rxd2m1 */
3073                                 <4 RK_PA1 3 &pcfg_pull_none>,
3074                                 /* gmac1_rxd3m1 */
3075                                 <4 RK_PA2 3 &pcfg_pull_none>,
3076                                 /* gmac1_txd2m1 */
3077                                 <3 RK_PD6 3 &pcfg_pull_none_drv_level_3>,
3078                                 /* gmac1_txd3m1 */
3079                                 <3 RK_PD7 3 &pcfg_pull_none_drv_level_3>;
3080                 };
3081         };
3082
3083         gmac-txc-level2 {
3084                 /omit-if-no-ref/
3085                 gmac0_rgmii_clk_level2: gmac0-rgmii-clk-level2 {
3086                         rockchip,pins =
3087                                 /* gmac0_rxclk */
3088                                 <2 RK_PA5 2 &pcfg_pull_none>,
3089                                 /* gmac0_txclk */
3090                                 <2 RK_PB0 2 &pcfg_pull_none_drv_level_2>;
3091                 };
3092
3093                 /omit-if-no-ref/
3094                 gmac1m0_rgmii_clk_level2: gmac1m0-rgmii-clk-level2 {
3095                         rockchip,pins =
3096                                 /* gmac1_rxclkm0 */
3097                                 <3 RK_PA7 3 &pcfg_pull_none>,
3098                                 /* gmac1_txclkm0 */
3099                                 <3 RK_PA6 3 &pcfg_pull_none_drv_level_2>;
3100                 };
3101
3102                 /omit-if-no-ref/
3103                 gmac1m1_rgmii_clk_level2: gmac1m1-rgmii-clk-level2 {
3104                         rockchip,pins =
3105                                 /* gmac1_rxclkm1 */
3106                                 <4 RK_PA3 3 &pcfg_pull_none>,
3107                                 /* gmac1_txclkm1 */
3108                                 <4 RK_PA0 3 &pcfg_pull_none_drv_level_2>;
3109                 };
3110         };
3111
3112         tsadc {
3113                 /omit-if-no-ref/
3114                 tsadc_pin: tsadc-pin {
3115                         rockchip,pins =
3116                                 /* tsadc_pin */
3117                                 <0 RK_PA1 0 &pcfg_pull_none>;
3118                 };
3119         };
3120 };