1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2022 Hardkernel Co., Ltd.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include "rk3568.dtsi"
14 model = "Hardkernel ODROID-M1";
15 compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
28 stdout-path = "serial2:1500000n8";
31 dc_12v: dc-12v-regulator {
32 compatible = "regulator-fixed";
33 regulator-name = "dc_12v";
36 regulator-min-microvolt = <12000000>;
37 regulator-max-microvolt = <12000000>;
41 compatible = "gpio-leds";
44 gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
45 function = LED_FUNCTION_POWER;
46 color = <LED_COLOR_ID_RED>;
47 default-state = "keep";
48 linux,default-trigger = "default-on";
49 pinctrl-names = "default";
50 pinctrl-0 = <&led_power_pin>;
53 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
54 function = LED_FUNCTION_HEARTBEAT;
55 color = <LED_COLOR_ID_BLUE>;
56 linux,default-trigger = "heartbeat";
57 pinctrl-names = "default";
58 pinctrl-0 = <&led_work_pin>;
62 vcc3v3_sys: vcc3v3-sys-regulator {
63 compatible = "regulator-fixed";
64 regulator-name = "vcc3v3_sys";
67 regulator-min-microvolt = <3300000>;
68 regulator-max-microvolt = <3300000>;
69 vin-supply = <&dc_12v>;
74 cpu-supply = <&vdd_cpu>;
78 cpu-supply = <&vdd_cpu>;
82 cpu-supply = <&vdd_cpu>;
86 cpu-supply = <&vdd_cpu>;
90 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
91 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
92 assigned-clock-rates = <0>, <125000000>;
93 clock_in_out = "output";
94 phy-handle = <&rgmii_phy0>;
96 phy-supply = <&vcc3v3_sys>;
97 pinctrl-names = "default";
98 pinctrl-0 = <&gmac0_miim
112 vdd_cpu: regulator@1c {
113 compatible = "tcs,tcs4525";
115 fcs,suspend-voltage-selector = <1>;
116 regulator-name = "vdd_cpu";
119 regulator-min-microvolt = <800000>;
120 regulator-max-microvolt = <1150000>;
121 regulator-ramp-delay = <2300>;
122 vin-supply = <&vcc3v3_sys>;
124 regulator-state-mem {
125 regulator-off-in-suspend;
130 compatible = "rockchip,rk809";
132 interrupt-parent = <&gpio0>;
133 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&pmic_int_l>;
137 rockchip,system-power-controller;
138 vcc1-supply = <&vcc3v3_sys>;
139 vcc2-supply = <&vcc3v3_sys>;
140 vcc3-supply = <&vcc3v3_sys>;
141 vcc4-supply = <&vcc3v3_sys>;
142 vcc5-supply = <&vcc3v3_sys>;
143 vcc6-supply = <&vcc3v3_sys>;
144 vcc7-supply = <&vcc3v3_sys>;
145 vcc8-supply = <&vcc3v3_sys>;
146 vcc9-supply = <&vcc3v3_sys>;
150 vdd_logic: DCDC_REG1 {
151 regulator-name = "vdd_logic";
154 regulator-init-microvolt = <900000>;
155 regulator-initial-mode = <0x2>;
156 regulator-min-microvolt = <500000>;
157 regulator-max-microvolt = <1350000>;
158 regulator-ramp-delay = <6001>;
160 regulator-state-mem {
161 regulator-off-in-suspend;
166 regulator-name = "vdd_gpu";
168 regulator-init-microvolt = <900000>;
169 regulator-initial-mode = <0x2>;
170 regulator-min-microvolt = <500000>;
171 regulator-max-microvolt = <1350000>;
172 regulator-ramp-delay = <6001>;
174 regulator-state-mem {
175 regulator-off-in-suspend;
180 regulator-name = "vcc_ddr";
183 regulator-initial-mode = <0x2>;
185 regulator-state-mem {
186 regulator-on-in-suspend;
191 regulator-name = "vdd_npu";
192 regulator-init-microvolt = <900000>;
193 regulator-initial-mode = <0x2>;
194 regulator-min-microvolt = <500000>;
195 regulator-max-microvolt = <1350000>;
196 regulator-ramp-delay = <6001>;
198 regulator-state-mem {
199 regulator-off-in-suspend;
204 regulator-name = "vcc_1v8";
207 regulator-min-microvolt = <1800000>;
208 regulator-max-microvolt = <1800000>;
210 regulator-state-mem {
211 regulator-off-in-suspend;
215 vdda0v9_image: LDO_REG1 {
216 regulator-name = "vdda0v9_image";
218 regulator-min-microvolt = <900000>;
219 regulator-max-microvolt = <900000>;
221 regulator-state-mem {
222 regulator-off-in-suspend;
227 regulator-name = "vdda_0v9";
230 regulator-min-microvolt = <900000>;
231 regulator-max-microvolt = <900000>;
233 regulator-state-mem {
234 regulator-off-in-suspend;
238 vdda0v9_pmu: LDO_REG3 {
239 regulator-name = "vdda0v9_pmu";
242 regulator-min-microvolt = <900000>;
243 regulator-max-microvolt = <900000>;
245 regulator-state-mem {
246 regulator-on-in-suspend;
247 regulator-suspend-microvolt = <900000>;
251 vccio_acodec: LDO_REG4 {
252 regulator-name = "vccio_acodec";
255 regulator-min-microvolt = <3300000>;
256 regulator-max-microvolt = <3300000>;
258 regulator-state-mem {
259 regulator-off-in-suspend;
264 regulator-name = "vccio_sd";
265 regulator-min-microvolt = <1800000>;
266 regulator-max-microvolt = <3300000>;
268 regulator-state-mem {
269 regulator-off-in-suspend;
273 vcc3v3_pmu: LDO_REG6 {
274 regulator-name = "vcc3v3_pmu";
277 regulator-min-microvolt = <3300000>;
278 regulator-max-microvolt = <3300000>;
280 regulator-state-mem {
281 regulator-on-in-suspend;
282 regulator-suspend-microvolt = <3300000>;
287 regulator-name = "vcca_1v8";
290 regulator-min-microvolt = <1800000>;
291 regulator-max-microvolt = <1800000>;
293 regulator-state-mem {
294 regulator-off-in-suspend;
298 vcca1v8_pmu: LDO_REG8 {
299 regulator-name = "vcca1v8_pmu";
302 regulator-min-microvolt = <1800000>;
303 regulator-max-microvolt = <1800000>;
305 regulator-state-mem {
306 regulator-on-in-suspend;
307 regulator-suspend-microvolt = <1800000>;
311 vcca1v8_image: LDO_REG9 {
312 regulator-name = "vcca1v8_image";
314 regulator-min-microvolt = <1800000>;
315 regulator-max-microvolt = <1800000>;
317 regulator-state-mem {
318 regulator-off-in-suspend;
322 vcc_3v3: SWITCH_REG1 {
323 regulator-name = "vcc_3v3";
327 regulator-state-mem {
328 regulator-off-in-suspend;
332 vcc3v3_sd: SWITCH_REG2 {
333 regulator-name = "vcc3v3_sd";
335 regulator-state-mem {
336 regulator-off-in-suspend;
344 rgmii_phy0: ethernet-phy@0 {
345 compatible = "ethernet-phy-ieee802.3-c22";
347 reset-assert-us = <20000>;
348 reset-deassert-us = <100000>;
349 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
355 fspi_dual_io_pins: fspi-dual-io-pins {
358 <1 RK_PD0 1 &pcfg_pull_none>,
360 <1 RK_PD3 1 &pcfg_pull_none>,
362 <1 RK_PD1 1 &pcfg_pull_none>,
364 <1 RK_PD2 1 &pcfg_pull_none>;
369 led_power_pin: led-power-pin {
370 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
372 led_work_pin: led-work-pin {
373 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
378 pmic_int_l: pmic-int-l {
379 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
385 pmuio1-supply = <&vcc3v3_pmu>;
386 pmuio2-supply = <&vcc3v3_pmu>;
387 vccio1-supply = <&vccio_acodec>;
388 vccio2-supply = <&vcc_1v8>;
389 vccio3-supply = <&vccio_sd>;
390 vccio4-supply = <&vcc_1v8>;
391 vccio5-supply = <&vcc_3v3>;
392 vccio6-supply = <&vcc_3v3>;
393 vccio7-supply = <&vcc_3v3>;
398 vref-supply = <&vcca_1v8>;
404 max-frequency = <200000000>;
406 pinctrl-names = "default";
407 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
408 vmmc-supply = <&vcc_3v3>;
409 vqmmc-supply = <&vcc_1v8>;
416 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
421 vmmc-supply = <&vcc3v3_sd>;
422 vqmmc-supply = <&vccio_sd>;
427 /* Dual I/O mode as the D2 pin conflicts with the eMMC */
428 pinctrl-0 = <&fspi_dual_io_pins>;
429 pinctrl-names = "default";
430 #address-cells = <1>;
435 compatible = "jedec,spi-nor";
437 spi-max-frequency = <100000000>;
438 spi-rx-bus-width = <2>;
439 spi-tx-bus-width = <1>;
442 compatible = "fixed-partitions";
443 #address-cells = <1>;
451 label = "U-Boot Env";
452 reg = <0xe0000 0x20000>;
456 reg = <0x100000 0x200000>;
460 reg = <0x300000 0x100000>;
463 label = "Filesystem";
464 reg = <0x400000 0xc00000>;
471 rockchip,hw-tshut-mode = <1>;
472 rockchip,hw-tshut-polarity = <0>;