1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
31 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwrbtn>;
37 debounce-interval = <100>;
38 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
39 label = "GPIO Key Power";
40 linux,code = <KEY_POWER>;
46 compatible = "gpio-ir-receiver";
47 gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
48 pinctrl-0 = <&ir_int>;
49 pinctrl-names = "default";
53 compatible = "gpio-leds";
54 pinctrl-names = "default";
55 pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
60 gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
65 default-state = "off";
66 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
71 compatible = "pwm-fan";
73 fan-supply = <&vcc12v_dcin>;
74 pwms = <&pwm1 0 50000 0>;
77 sdio_pwrseq: sdio-pwrseq {
78 compatible = "mmc-pwrseq-simple";
80 clock-names = "ext_clock";
81 pinctrl-names = "default";
82 pinctrl-0 = <&wifi_enable_h>;
83 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
87 compatible = "audio-graph-card";
93 compatible = "audio-graph-card";
99 compatible = "linux,spdif-dit";
100 #sound-dai-cells = <0>;
104 remote-endpoint = <&spdif_p0_0>;
109 vcc12v_dcin: vcc12v-dcin {
110 compatible = "regulator-fixed";
111 regulator-name = "vcc12v_dcin";
114 regulator-min-microvolt = <12000000>;
115 regulator-max-microvolt = <12000000>;
118 /* switched by pmic_sleep */
119 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc1v8_s3";
124 regulator-min-microvolt = <1800000>;
125 regulator-max-microvolt = <1800000>;
126 vin-supply = <&vcc_1v8>;
129 /* micro SD card power */
130 vcc3v0_sd: vcc3v0-sd {
131 compatible = "regulator-fixed";
133 gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
134 pinctrl-names = "default";
135 pinctrl-0 = <&sdmmc0_pwr_h>;
136 regulator-name = "vcc3v0_sd";
138 regulator-min-microvolt = <3000000>;
139 regulator-max-microvolt = <3000000>;
140 vin-supply = <&vcc3v3_sys>;
142 regulator-state-mem {
143 regulator-off-in-suspend;
147 vcc3v3_pcie: vcc3v3-pcie-regulator {
148 compatible = "regulator-fixed";
150 gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pcie_pwr_en>;
153 regulator-name = "vcc3v3_pcie";
156 vin-supply = <&vcc12v_dcin>;
159 vcc3v3_sys: vcc3v3-sys {
160 compatible = "regulator-fixed";
161 regulator-name = "vcc3v3_sys";
164 regulator-min-microvolt = <3300000>;
165 regulator-max-microvolt = <3300000>;
166 vin-supply = <&vcc5v0_sys>;
169 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
170 vcc5v0_host: vcc5v0-host-regulator {
171 compatible = "regulator-fixed";
173 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&vcc5v0_host_en>;
176 regulator-name = "vcc5v0_host";
178 vin-supply = <&vcc5v0_usb>;
181 vcc5v0_typec: vcc5v0-typec-regulator {
182 compatible = "regulator-fixed";
184 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&vcc5v0_typec_en>;
187 regulator-name = "vcc5v0_typec";
189 vin-supply = <&vcc5v0_usb>;
192 vcc5v0_sys: vcc5v0-sys {
193 compatible = "regulator-fixed";
194 regulator-name = "vcc5v0_sys";
197 regulator-min-microvolt = <5000000>;
198 regulator-max-microvolt = <5000000>;
199 vin-supply = <&vcc12v_dcin>;
202 vcc5v0_usb: vcc5v0-usb {
203 compatible = "regulator-fixed";
204 regulator-name = "vcc5v0_usb";
207 regulator-min-microvolt = <5000000>;
208 regulator-max-microvolt = <5000000>;
209 vin-supply = <&vcc12v_dcin>;
213 compatible = "pwm-regulator";
214 pwms = <&pwm2 0 25000 1>;
215 regulator-name = "vdd_log";
218 regulator-min-microvolt = <800000>;
219 regulator-max-microvolt = <1700000>;
220 vin-supply = <&vcc5v0_sys>;
225 cpu-supply = <&vdd_cpu_l>;
229 cpu-supply = <&vdd_cpu_l>;
233 cpu-supply = <&vdd_cpu_l>;
237 cpu-supply = <&vdd_cpu_l>;
241 cpu-supply = <&vdd_cpu_b>;
245 cpu-supply = <&vdd_cpu_b>;
253 assigned-clocks = <&cru SCLK_RMII_SRC>;
254 assigned-clock-parents = <&clkin_gmac>;
255 clock_in_out = "input";
256 phy-supply = <&vcc_lan>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&rgmii_pins>;
260 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
261 snps,reset-active-low;
262 snps,reset-delays-us = <0 10000 50000>;
269 ddc-i2c-bus = <&i2c3>;
270 pinctrl-names = "default";
271 pinctrl-0 = <&hdmi_cec>;
280 mali-supply = <&vdd_gpu>;
285 clock-frequency = <400000>;
286 i2c-scl-rising-time-ns = <168>;
287 i2c-scl-falling-time-ns = <4>;
291 compatible = "rockchip,rk808";
293 interrupt-parent = <&gpio3>;
294 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
296 clock-output-names = "xin32k", "rk808-clkout2";
297 pinctrl-names = "default";
298 pinctrl-0 = <&pmic_int_l>;
299 rockchip,system-power-controller;
302 vcc1-supply = <&vcc5v0_sys>;
303 vcc2-supply = <&vcc5v0_sys>;
304 vcc3-supply = <&vcc5v0_sys>;
305 vcc4-supply = <&vcc5v0_sys>;
306 vcc6-supply = <&vcc5v0_sys>;
307 vcc7-supply = <&vcc5v0_sys>;
308 vcc8-supply = <&vcc3v3_sys>;
309 vcc9-supply = <&vcc5v0_sys>;
310 vcc10-supply = <&vcc5v0_sys>;
311 vcc11-supply = <&vcc5v0_sys>;
312 vcc12-supply = <&vcc3v3_sys>;
313 vddio-supply = <&vcca_1v8>;
316 vdd_center: DCDC_REG1 {
317 regulator-name = "vdd_center";
320 regulator-min-microvolt = <750000>;
321 regulator-max-microvolt = <1350000>;
322 regulator-ramp-delay = <6001>;
323 regulator-state-mem {
324 regulator-off-in-suspend;
328 vdd_cpu_l: DCDC_REG2 {
329 regulator-name = "vdd_cpu_l";
332 regulator-min-microvolt = <750000>;
333 regulator-max-microvolt = <1350000>;
334 regulator-ramp-delay = <6001>;
335 regulator-state-mem {
336 regulator-off-in-suspend;
341 regulator-name = "vcc_ddr";
344 regulator-state-mem {
345 regulator-on-in-suspend;
350 regulator-name = "vcc_1v8";
353 regulator-min-microvolt = <1800000>;
354 regulator-max-microvolt = <1800000>;
355 regulator-state-mem {
356 regulator-on-in-suspend;
357 regulator-suspend-microvolt = <1800000>;
361 vcc1v8_dvp: LDO_REG1 {
362 regulator-name = "vcc1v8_dvp";
365 regulator-min-microvolt = <1800000>;
366 regulator-max-microvolt = <1800000>;
367 regulator-state-mem {
368 regulator-off-in-suspend;
372 vcc3v0_touch: LDO_REG2 {
373 regulator-name = "vcc3v0_touch";
376 regulator-min-microvolt = <3000000>;
377 regulator-max-microvolt = <3000000>;
378 regulator-state-mem {
379 regulator-off-in-suspend;
384 regulator-name = "vcca_1v8";
387 regulator-min-microvolt = <1800000>;
388 regulator-max-microvolt = <1800000>;
389 regulator-state-mem {
390 regulator-on-in-suspend;
391 regulator-suspend-microvolt = <1800000>;
396 regulator-name = "vcc_sdio";
399 regulator-min-microvolt = <1800000>;
400 regulator-max-microvolt = <3000000>;
401 regulator-state-mem {
402 regulator-on-in-suspend;
403 regulator-suspend-microvolt = <3000000>;
407 vcca3v0_codec: LDO_REG5 {
408 regulator-name = "vcca3v0_codec";
411 regulator-min-microvolt = <3000000>;
412 regulator-max-microvolt = <3000000>;
413 regulator-state-mem {
414 regulator-off-in-suspend;
419 regulator-name = "vcc_1v5";
422 regulator-min-microvolt = <1500000>;
423 regulator-max-microvolt = <1500000>;
424 regulator-state-mem {
425 regulator-on-in-suspend;
426 regulator-suspend-microvolt = <1500000>;
430 vcca1v8_codec: LDO_REG7 {
431 regulator-name = "vcca1v8_codec";
434 regulator-min-microvolt = <1800000>;
435 regulator-max-microvolt = <1800000>;
436 regulator-state-mem {
437 regulator-off-in-suspend;
442 regulator-name = "vcc_3v0";
445 regulator-min-microvolt = <3000000>;
446 regulator-max-microvolt = <3000000>;
447 regulator-state-mem {
448 regulator-on-in-suspend;
449 regulator-suspend-microvolt = <3000000>;
453 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
454 regulator-name = "vcc3v3_s3";
457 regulator-state-mem {
458 regulator-off-in-suspend;
462 vcc3v3_s0: SWITCH_REG2 {
463 regulator-name = "vcc3v3_s0";
466 regulator-state-mem {
467 regulator-off-in-suspend;
473 vdd_cpu_b: regulator@40 {
474 compatible = "silergy,syr827";
476 fcs,suspend-voltage-selector = <1>;
477 pinctrl-names = "default";
478 pinctrl-0 = <&vsel1_pin>;
479 regulator-name = "vdd_cpu_b";
480 regulator-min-microvolt = <712500>;
481 regulator-max-microvolt = <1500000>;
482 regulator-ramp-delay = <1000>;
485 vin-supply = <&vcc5v0_sys>;
487 regulator-state-mem {
488 regulator-off-in-suspend;
492 vdd_gpu: regulator@41 {
493 compatible = "silergy,syr828";
495 fcs,suspend-voltage-selector = <1>;
496 pinctrl-names = "default";
497 pinctrl-0 = <&vsel2_pin>;
498 regulator-name = "vdd_gpu";
499 regulator-min-microvolt = <712500>;
500 regulator-max-microvolt = <1500000>;
501 regulator-ramp-delay = <1000>;
504 vin-supply = <&vcc5v0_sys>;
506 regulator-state-mem {
507 regulator-off-in-suspend;
513 i2c-scl-rising-time-ns = <300>;
514 i2c-scl-falling-time-ns = <15>;
519 i2c-scl-rising-time-ns = <450>;
520 i2c-scl-falling-time-ns = <15>;
525 i2c-scl-rising-time-ns = <600>;
526 i2c-scl-falling-time-ns = <20>;
529 fusb0: typec-portc@22 {
530 compatible = "fcs,fusb302";
532 interrupt-parent = <&gpio1>;
533 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
534 pinctrl-names = "default";
535 pinctrl-0 = <&fusb0_int>;
536 vbus-supply = <&vcc5v0_typec>;
542 rockchip,playback-channels = <8>;
543 rockchip,capture-channels = <8>;
548 rockchip,playback-channels = <2>;
549 rockchip,capture-channels = <2>;
553 i2s1_p0_0: endpoint {
556 remote-endpoint = <&es8316_p0_0>;
568 bt656-supply = <&vcc1v8_dvp>;
569 audio-supply = <&vcc_3v0>;
570 sdmmc-supply = <&vcc_sdio>;
571 gpio1830-supply = <&vcc_3v0>;
575 ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
577 pinctrl-names = "default";
578 pinctrl-0 = <&pcie_perst>;
579 vpcie12v-supply = <&vcc12v_dcin>;
580 vpcie3v3-supply = <&vcc3v3_pcie>;
589 pmu1830-supply = <&vcc_3v0>;
595 bt_enable_h: bt-enable-h {
596 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
599 bt_host_wake_l: bt-host-wake-l {
600 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
603 bt_wake_l: bt-wake-l {
604 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
610 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
615 fusb0_int: fusb0-int {
616 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
622 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
627 work_led_pin: work-led-pin {
628 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
631 diy_led_pin: diy-led-pin {
632 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
637 pcie_perst: pcie-perst {
638 rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
641 pcie_pwr_en: pcie-pwr-en {
642 rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
647 pmic_int_l: pmic-int-l {
648 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
651 vsel1_pin: vsel1-pin {
652 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
655 vsel2_pin: vsel2-pin {
656 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
661 sdmmc0_pwr_h: sdmmc0-pwr-h {
662 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
668 wifi_enable_h: wifi-enable-h {
669 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
674 vcc5v0_typec_en: vcc5v0_typec_en {
675 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
680 vcc5v0_host_en: vcc5v0-host-en {
681 rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
699 vref-supply = <&vcca1v8_s3>;
708 keep-power-in-suspend;
709 mmc-pwrseq = <&sdio_pwrseq>;
711 pinctrl-names = "default";
712 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
720 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
722 max-frequency = <150000000>;
723 pinctrl-names = "default";
724 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
725 vmmc-supply = <&vcc3v0_sd>;
726 vqmmc-supply = <&vcc_sdio>;
738 pinctrl-0 = <&spdif_bus_1>;
741 spdif_p0_0: endpoint {
742 remote-endpoint = <&dit_p0_0>;
751 compatible = "jedec,spi-nor";
753 spi-max-frequency = <10000000>;
766 /* tshut mode 0:CRU 1:GPIO */
767 rockchip,hw-tshut-mode = <1>;
768 /* tshut polarity 0:LOW 1:HIGH */
769 rockchip,hw-tshut-polarity = <1>;
776 u2phy0_otg: otg-port {
780 u2phy0_host: host-port {
781 phy-supply = <&vcc5v0_host>;
789 u2phy1_otg: otg-port {
793 u2phy1_host: host-port {
794 phy-supply = <&vcc5v0_host>;
800 pinctrl-names = "default";
801 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
805 compatible = "brcm,bcm43438-bt";
808 device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
809 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
810 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
811 pinctrl-names = "default";
812 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
813 vbat-supply = <&vcc3v3_sys>;
814 vddio-supply = <&vcc_1v8>;