1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
31 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwrbtn>;
37 debounce-interval = <100>;
38 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
39 label = "GPIO Key Power";
40 linux,code = <KEY_POWER>;
46 compatible = "gpio-ir-receiver";
47 gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
48 pinctrl-0 = <&ir_int>;
49 pinctrl-names = "default";
53 compatible = "gpio-leds";
54 pinctrl-names = "default";
55 pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
60 gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
65 default-state = "off";
66 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
71 compatible = "pwm-fan";
72 cooling-levels = <0 100 150 200 255>;
74 fan-supply = <&vcc12v_dcin>;
75 pwms = <&pwm1 0 50000 0>;
78 sdio_pwrseq: sdio-pwrseq {
79 compatible = "mmc-pwrseq-simple";
81 clock-names = "ext_clock";
82 pinctrl-names = "default";
83 pinctrl-0 = <&wifi_enable_h>;
84 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
88 compatible = "audio-graph-card";
94 compatible = "audio-graph-card";
100 compatible = "linux,spdif-dit";
101 #sound-dai-cells = <0>;
105 remote-endpoint = <&spdif_p0_0>;
110 vcc12v_dcin: vcc12v-dcin {
111 compatible = "regulator-fixed";
112 regulator-name = "vcc12v_dcin";
115 regulator-min-microvolt = <12000000>;
116 regulator-max-microvolt = <12000000>;
119 /* switched by pmic_sleep */
120 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
121 compatible = "regulator-fixed";
122 regulator-name = "vcc1v8_s3";
125 regulator-min-microvolt = <1800000>;
126 regulator-max-microvolt = <1800000>;
127 vin-supply = <&vcc_1v8>;
130 /* micro SD card power */
131 vcc3v0_sd: vcc3v0-sd {
132 compatible = "regulator-fixed";
134 gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&sdmmc0_pwr_h>;
137 regulator-name = "vcc3v0_sd";
139 regulator-min-microvolt = <3000000>;
140 regulator-max-microvolt = <3000000>;
141 vin-supply = <&vcc3v3_sys>;
143 regulator-state-mem {
144 regulator-off-in-suspend;
148 vcc3v3_pcie: vcc3v3-pcie-regulator {
149 compatible = "regulator-fixed";
151 gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&pcie_pwr_en>;
154 regulator-name = "vcc3v3_pcie";
157 vin-supply = <&vcc12v_dcin>;
160 vcc3v3_sys: vcc3v3-sys {
161 compatible = "regulator-fixed";
162 regulator-name = "vcc3v3_sys";
165 regulator-min-microvolt = <3300000>;
166 regulator-max-microvolt = <3300000>;
167 vin-supply = <&vcc5v0_sys>;
170 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
171 vcc5v0_host: vcc5v0-host-regulator {
172 compatible = "regulator-fixed";
174 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&vcc5v0_host_en>;
177 regulator-name = "vcc5v0_host";
179 vin-supply = <&vcc5v0_usb>;
182 vcc5v0_typec: vcc5v0-typec-regulator {
183 compatible = "regulator-fixed";
185 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
186 pinctrl-names = "default";
187 pinctrl-0 = <&vcc5v0_typec_en>;
188 regulator-name = "vcc5v0_typec";
190 vin-supply = <&vcc5v0_usb>;
193 vcc5v0_sys: vcc5v0-sys {
194 compatible = "regulator-fixed";
195 regulator-name = "vcc5v0_sys";
198 regulator-min-microvolt = <5000000>;
199 regulator-max-microvolt = <5000000>;
200 vin-supply = <&vcc12v_dcin>;
203 vcc5v0_usb: vcc5v0-usb {
204 compatible = "regulator-fixed";
205 regulator-name = "vcc5v0_usb";
208 regulator-min-microvolt = <5000000>;
209 regulator-max-microvolt = <5000000>;
210 vin-supply = <&vcc12v_dcin>;
214 compatible = "pwm-regulator";
215 pwms = <&pwm2 0 25000 1>;
216 regulator-name = "vdd_log";
219 regulator-min-microvolt = <800000>;
220 regulator-max-microvolt = <1700000>;
221 vin-supply = <&vcc5v0_sys>;
226 cpu-supply = <&vdd_cpu_l>;
230 cpu-supply = <&vdd_cpu_l>;
234 cpu-supply = <&vdd_cpu_l>;
238 cpu-supply = <&vdd_cpu_l>;
242 cpu-supply = <&vdd_cpu_b>;
246 cpu-supply = <&vdd_cpu_b>;
252 temperature = <55000>;
258 temperature = <65000>;
267 cooling-device = <&fan THERMAL_NO_LIMIT 1>;
272 cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
282 assigned-clocks = <&cru SCLK_RMII_SRC>;
283 assigned-clock-parents = <&clkin_gmac>;
284 clock_in_out = "input";
285 phy-supply = <&vcc_lan>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&rgmii_pins>;
289 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
290 snps,reset-active-low;
291 snps,reset-delays-us = <0 10000 50000>;
298 ddc-i2c-bus = <&i2c3>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&hdmi_cec>;
309 mali-supply = <&vdd_gpu>;
314 clock-frequency = <400000>;
315 i2c-scl-rising-time-ns = <168>;
316 i2c-scl-falling-time-ns = <4>;
320 compatible = "rockchip,rk808";
322 interrupt-parent = <&gpio3>;
323 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
325 clock-output-names = "xin32k", "rk808-clkout2";
326 pinctrl-names = "default";
327 pinctrl-0 = <&pmic_int_l>;
328 rockchip,system-power-controller;
331 vcc1-supply = <&vcc5v0_sys>;
332 vcc2-supply = <&vcc5v0_sys>;
333 vcc3-supply = <&vcc5v0_sys>;
334 vcc4-supply = <&vcc5v0_sys>;
335 vcc6-supply = <&vcc5v0_sys>;
336 vcc7-supply = <&vcc5v0_sys>;
337 vcc8-supply = <&vcc3v3_sys>;
338 vcc9-supply = <&vcc5v0_sys>;
339 vcc10-supply = <&vcc5v0_sys>;
340 vcc11-supply = <&vcc5v0_sys>;
341 vcc12-supply = <&vcc3v3_sys>;
342 vddio-supply = <&vcca_1v8>;
345 vdd_center: DCDC_REG1 {
346 regulator-name = "vdd_center";
349 regulator-min-microvolt = <750000>;
350 regulator-max-microvolt = <1350000>;
351 regulator-ramp-delay = <6001>;
352 regulator-state-mem {
353 regulator-off-in-suspend;
357 vdd_cpu_l: DCDC_REG2 {
358 regulator-name = "vdd_cpu_l";
361 regulator-min-microvolt = <750000>;
362 regulator-max-microvolt = <1350000>;
363 regulator-ramp-delay = <6001>;
364 regulator-state-mem {
365 regulator-off-in-suspend;
370 regulator-name = "vcc_ddr";
373 regulator-state-mem {
374 regulator-on-in-suspend;
379 regulator-name = "vcc_1v8";
382 regulator-min-microvolt = <1800000>;
383 regulator-max-microvolt = <1800000>;
384 regulator-state-mem {
385 regulator-on-in-suspend;
386 regulator-suspend-microvolt = <1800000>;
390 vcc1v8_dvp: LDO_REG1 {
391 regulator-name = "vcc1v8_dvp";
394 regulator-min-microvolt = <1800000>;
395 regulator-max-microvolt = <1800000>;
396 regulator-state-mem {
397 regulator-off-in-suspend;
401 vcc3v0_touch: LDO_REG2 {
402 regulator-name = "vcc3v0_touch";
405 regulator-min-microvolt = <3000000>;
406 regulator-max-microvolt = <3000000>;
407 regulator-state-mem {
408 regulator-off-in-suspend;
413 regulator-name = "vcca_1v8";
416 regulator-min-microvolt = <1800000>;
417 regulator-max-microvolt = <1800000>;
418 regulator-state-mem {
419 regulator-on-in-suspend;
420 regulator-suspend-microvolt = <1800000>;
425 regulator-name = "vcc_sdio";
428 regulator-min-microvolt = <1800000>;
429 regulator-max-microvolt = <3000000>;
430 regulator-state-mem {
431 regulator-on-in-suspend;
432 regulator-suspend-microvolt = <3000000>;
436 vcca3v0_codec: LDO_REG5 {
437 regulator-name = "vcca3v0_codec";
440 regulator-min-microvolt = <3000000>;
441 regulator-max-microvolt = <3000000>;
442 regulator-state-mem {
443 regulator-off-in-suspend;
448 regulator-name = "vcc_1v5";
451 regulator-min-microvolt = <1500000>;
452 regulator-max-microvolt = <1500000>;
453 regulator-state-mem {
454 regulator-on-in-suspend;
455 regulator-suspend-microvolt = <1500000>;
459 vcca1v8_codec: LDO_REG7 {
460 regulator-name = "vcca1v8_codec";
463 regulator-min-microvolt = <1800000>;
464 regulator-max-microvolt = <1800000>;
465 regulator-state-mem {
466 regulator-off-in-suspend;
471 regulator-name = "vcc_3v0";
474 regulator-min-microvolt = <3000000>;
475 regulator-max-microvolt = <3000000>;
476 regulator-state-mem {
477 regulator-on-in-suspend;
478 regulator-suspend-microvolt = <3000000>;
482 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
483 regulator-name = "vcc3v3_s3";
486 regulator-state-mem {
487 regulator-off-in-suspend;
491 vcc3v3_s0: SWITCH_REG2 {
492 regulator-name = "vcc3v3_s0";
495 regulator-state-mem {
496 regulator-off-in-suspend;
502 vdd_cpu_b: regulator@40 {
503 compatible = "silergy,syr827";
505 fcs,suspend-voltage-selector = <1>;
506 pinctrl-names = "default";
507 pinctrl-0 = <&vsel1_pin>;
508 regulator-name = "vdd_cpu_b";
509 regulator-min-microvolt = <712500>;
510 regulator-max-microvolt = <1500000>;
511 regulator-ramp-delay = <1000>;
514 vin-supply = <&vcc5v0_sys>;
516 regulator-state-mem {
517 regulator-off-in-suspend;
521 vdd_gpu: regulator@41 {
522 compatible = "silergy,syr828";
524 fcs,suspend-voltage-selector = <1>;
525 pinctrl-names = "default";
526 pinctrl-0 = <&vsel2_pin>;
527 regulator-name = "vdd_gpu";
528 regulator-min-microvolt = <712500>;
529 regulator-max-microvolt = <1500000>;
530 regulator-ramp-delay = <1000>;
533 vin-supply = <&vcc5v0_sys>;
535 regulator-state-mem {
536 regulator-off-in-suspend;
542 i2c-scl-rising-time-ns = <300>;
543 i2c-scl-falling-time-ns = <15>;
548 i2c-scl-rising-time-ns = <450>;
549 i2c-scl-falling-time-ns = <15>;
554 i2c-scl-rising-time-ns = <600>;
555 i2c-scl-falling-time-ns = <20>;
558 fusb0: typec-portc@22 {
559 compatible = "fcs,fusb302";
561 interrupt-parent = <&gpio1>;
562 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
563 pinctrl-names = "default";
564 pinctrl-0 = <&fusb0_int>;
565 vbus-supply = <&vcc5v0_typec>;
571 rockchip,playback-channels = <8>;
572 rockchip,capture-channels = <8>;
577 rockchip,playback-channels = <2>;
578 rockchip,capture-channels = <2>;
582 i2s1_p0_0: endpoint {
585 remote-endpoint = <&es8316_p0_0>;
597 bt656-supply = <&vcc1v8_dvp>;
598 audio-supply = <&vcc_3v0>;
599 sdmmc-supply = <&vcc_sdio>;
600 gpio1830-supply = <&vcc_3v0>;
604 ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
606 pinctrl-names = "default";
607 pinctrl-0 = <&pcie_perst>;
608 vpcie12v-supply = <&vcc12v_dcin>;
609 vpcie3v3-supply = <&vcc3v3_pcie>;
618 pmu1830-supply = <&vcc_3v0>;
624 bt_enable_h: bt-enable-h {
625 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
628 bt_host_wake_l: bt-host-wake-l {
629 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
632 bt_wake_l: bt-wake-l {
633 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
639 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
644 fusb0_int: fusb0-int {
645 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
651 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
656 work_led_pin: work-led-pin {
657 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
660 diy_led_pin: diy-led-pin {
661 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
666 pcie_perst: pcie-perst {
667 rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
670 pcie_pwr_en: pcie-pwr-en {
671 rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
676 pmic_int_l: pmic-int-l {
677 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
680 vsel1_pin: vsel1-pin {
681 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
684 vsel2_pin: vsel2-pin {
685 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
690 sdmmc0_pwr_h: sdmmc0-pwr-h {
691 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
697 wifi_enable_h: wifi-enable-h {
698 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
703 vcc5v0_typec_en: vcc5v0_typec_en {
704 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
709 vcc5v0_host_en: vcc5v0-host-en {
710 rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
728 vref-supply = <&vcca1v8_s3>;
737 keep-power-in-suspend;
738 mmc-pwrseq = <&sdio_pwrseq>;
740 pinctrl-names = "default";
741 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
749 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
751 max-frequency = <150000000>;
752 pinctrl-names = "default";
753 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
754 vmmc-supply = <&vcc3v0_sd>;
755 vqmmc-supply = <&vcc_sdio>;
767 pinctrl-0 = <&spdif_bus_1>;
770 spdif_p0_0: endpoint {
771 remote-endpoint = <&dit_p0_0>;
780 compatible = "jedec,spi-nor";
782 spi-max-frequency = <10000000>;
795 /* tshut mode 0:CRU 1:GPIO */
796 rockchip,hw-tshut-mode = <1>;
797 /* tshut polarity 0:LOW 1:HIGH */
798 rockchip,hw-tshut-polarity = <1>;
805 u2phy0_otg: otg-port {
809 u2phy0_host: host-port {
810 phy-supply = <&vcc5v0_host>;
818 u2phy1_otg: otg-port {
822 u2phy1_host: host-port {
823 phy-supply = <&vcc5v0_host>;
829 pinctrl-names = "default";
830 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
834 compatible = "brcm,bcm43438-bt";
837 device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
838 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
839 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
840 pinctrl-names = "default";
841 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
842 vbat-supply = <&vcc3v3_sys>;
843 vddio-supply = <&vcc_1v8>;