1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
14 stdout-path = "serial2:1500000n8";
17 clkin_gmac: external-gmac-clock {
18 compatible = "fixed-clock";
19 clock-frequency = <125000000>;
20 clock-output-names = "clkin_gmac";
25 compatible = "gpio-keys";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pwrbtn>;
31 debounce-interval = <100>;
32 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
33 label = "GPIO Key Power";
34 linux,code = <KEY_POWER>;
40 compatible = "gpio-ir-receiver";
41 gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
42 pinctrl-0 = <&ir_int>;
43 pinctrl-names = "default";
47 compatible = "gpio-leds";
48 pinctrl-names = "default";
49 pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
54 gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
59 default-state = "off";
60 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
65 compatible = "pwm-fan";
67 fan-supply = <&vcc12v_dcin>;
68 pwms = <&pwm1 0 50000 0>;
71 sdio_pwrseq: sdio-pwrseq {
72 compatible = "mmc-pwrseq-simple";
74 clock-names = "ext_clock";
75 pinctrl-names = "default";
76 pinctrl-0 = <&wifi_enable_h>;
77 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
81 compatible = "audio-graph-card";
87 compatible = "audio-graph-card";
93 compatible = "linux,spdif-dit";
94 #sound-dai-cells = <0>;
98 remote-endpoint = <&spdif_p0_0>;
103 vcc12v_dcin: vcc12v-dcin {
104 compatible = "regulator-fixed";
105 regulator-name = "vcc12v_dcin";
108 regulator-min-microvolt = <12000000>;
109 regulator-max-microvolt = <12000000>;
112 /* switched by pmic_sleep */
113 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
114 compatible = "regulator-fixed";
115 regulator-name = "vcc1v8_s3";
118 regulator-min-microvolt = <1800000>;
119 regulator-max-microvolt = <1800000>;
120 vin-supply = <&vcc_1v8>;
123 /* micro SD card power */
124 vcc3v0_sd: vcc3v0-sd {
125 compatible = "regulator-fixed";
127 gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&sdmmc0_pwr_h>;
130 regulator-name = "vcc3v0_sd";
132 regulator-min-microvolt = <3000000>;
133 regulator-max-microvolt = <3000000>;
134 vin-supply = <&vcc3v3_sys>;
136 regulator-state-mem {
137 regulator-off-in-suspend;
141 vcc3v3_pcie: vcc3v3-pcie-regulator {
142 compatible = "regulator-fixed";
144 gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&pcie_pwr_en>;
147 regulator-name = "vcc3v3_pcie";
150 vin-supply = <&vcc12v_dcin>;
153 vcc3v3_sys: vcc3v3-sys {
154 compatible = "regulator-fixed";
155 regulator-name = "vcc3v3_sys";
158 regulator-min-microvolt = <3300000>;
159 regulator-max-microvolt = <3300000>;
160 vin-supply = <&vcc5v0_sys>;
163 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
164 vcc5v0_host: vcc5v0-host-regulator {
165 compatible = "regulator-fixed";
167 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&vcc5v0_host_en>;
170 regulator-name = "vcc5v0_host";
172 vin-supply = <&vcc5v0_usb>;
175 vcc5v0_typec: vcc5v0-typec-regulator {
176 compatible = "regulator-fixed";
178 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&vcc5v0_typec_en>;
181 regulator-name = "vcc5v0_typec";
183 vin-supply = <&vcc5v0_usb>;
186 vcc5v0_sys: vcc5v0-sys {
187 compatible = "regulator-fixed";
188 regulator-name = "vcc5v0_sys";
191 regulator-min-microvolt = <5000000>;
192 regulator-max-microvolt = <5000000>;
193 vin-supply = <&vcc12v_dcin>;
196 vcc5v0_usb: vcc5v0-usb {
197 compatible = "regulator-fixed";
198 regulator-name = "vcc5v0_usb";
201 regulator-min-microvolt = <5000000>;
202 regulator-max-microvolt = <5000000>;
203 vin-supply = <&vcc12v_dcin>;
207 compatible = "pwm-regulator";
208 pwms = <&pwm2 0 25000 1>;
209 regulator-name = "vdd_log";
212 regulator-min-microvolt = <800000>;
213 regulator-max-microvolt = <1700000>;
214 vin-supply = <&vcc5v0_sys>;
219 cpu-supply = <&vdd_cpu_l>;
223 cpu-supply = <&vdd_cpu_l>;
227 cpu-supply = <&vdd_cpu_l>;
231 cpu-supply = <&vdd_cpu_l>;
235 cpu-supply = <&vdd_cpu_b>;
239 cpu-supply = <&vdd_cpu_b>;
247 assigned-clocks = <&cru SCLK_RMII_SRC>;
248 assigned-clock-parents = <&clkin_gmac>;
249 clock_in_out = "input";
250 phy-supply = <&vcc_lan>;
252 pinctrl-names = "default";
253 pinctrl-0 = <&rgmii_pins>;
254 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
255 snps,reset-active-low;
256 snps,reset-delays-us = <0 10000 50000>;
263 ddc-i2c-bus = <&i2c3>;
264 pinctrl-names = "default";
265 pinctrl-0 = <&hdmi_cec>;
274 mali-supply = <&vdd_gpu>;
279 clock-frequency = <400000>;
280 i2c-scl-rising-time-ns = <168>;
281 i2c-scl-falling-time-ns = <4>;
285 compatible = "rockchip,rk808";
287 interrupt-parent = <&gpio3>;
288 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
290 clock-output-names = "xin32k", "rk808-clkout2";
291 pinctrl-names = "default";
292 pinctrl-0 = <&pmic_int_l>;
293 rockchip,system-power-controller;
296 vcc1-supply = <&vcc5v0_sys>;
297 vcc2-supply = <&vcc5v0_sys>;
298 vcc3-supply = <&vcc5v0_sys>;
299 vcc4-supply = <&vcc5v0_sys>;
300 vcc6-supply = <&vcc5v0_sys>;
301 vcc7-supply = <&vcc5v0_sys>;
302 vcc8-supply = <&vcc3v3_sys>;
303 vcc9-supply = <&vcc5v0_sys>;
304 vcc10-supply = <&vcc5v0_sys>;
305 vcc11-supply = <&vcc5v0_sys>;
306 vcc12-supply = <&vcc3v3_sys>;
307 vddio-supply = <&vcca_1v8>;
310 vdd_center: DCDC_REG1 {
311 regulator-name = "vdd_center";
314 regulator-min-microvolt = <750000>;
315 regulator-max-microvolt = <1350000>;
316 regulator-ramp-delay = <6001>;
317 regulator-state-mem {
318 regulator-off-in-suspend;
322 vdd_cpu_l: DCDC_REG2 {
323 regulator-name = "vdd_cpu_l";
326 regulator-min-microvolt = <750000>;
327 regulator-max-microvolt = <1350000>;
328 regulator-ramp-delay = <6001>;
329 regulator-state-mem {
330 regulator-off-in-suspend;
335 regulator-name = "vcc_ddr";
338 regulator-state-mem {
339 regulator-on-in-suspend;
344 regulator-name = "vcc_1v8";
347 regulator-min-microvolt = <1800000>;
348 regulator-max-microvolt = <1800000>;
349 regulator-state-mem {
350 regulator-on-in-suspend;
351 regulator-suspend-microvolt = <1800000>;
355 vcc1v8_dvp: LDO_REG1 {
356 regulator-name = "vcc1v8_dvp";
359 regulator-min-microvolt = <1800000>;
360 regulator-max-microvolt = <1800000>;
361 regulator-state-mem {
362 regulator-off-in-suspend;
366 vcc3v0_touch: LDO_REG2 {
367 regulator-name = "vcc3v0_touch";
370 regulator-min-microvolt = <3000000>;
371 regulator-max-microvolt = <3000000>;
372 regulator-state-mem {
373 regulator-off-in-suspend;
378 regulator-name = "vcca_1v8";
381 regulator-min-microvolt = <1800000>;
382 regulator-max-microvolt = <1800000>;
383 regulator-state-mem {
384 regulator-on-in-suspend;
385 regulator-suspend-microvolt = <1800000>;
390 regulator-name = "vcc_sdio";
393 regulator-min-microvolt = <1800000>;
394 regulator-max-microvolt = <3000000>;
395 regulator-state-mem {
396 regulator-on-in-suspend;
397 regulator-suspend-microvolt = <3000000>;
401 vcca3v0_codec: LDO_REG5 {
402 regulator-name = "vcca3v0_codec";
405 regulator-min-microvolt = <3000000>;
406 regulator-max-microvolt = <3000000>;
407 regulator-state-mem {
408 regulator-off-in-suspend;
413 regulator-name = "vcc_1v5";
416 regulator-min-microvolt = <1500000>;
417 regulator-max-microvolt = <1500000>;
418 regulator-state-mem {
419 regulator-on-in-suspend;
420 regulator-suspend-microvolt = <1500000>;
424 vcca1v8_codec: LDO_REG7 {
425 regulator-name = "vcca1v8_codec";
428 regulator-min-microvolt = <1800000>;
429 regulator-max-microvolt = <1800000>;
430 regulator-state-mem {
431 regulator-off-in-suspend;
436 regulator-name = "vcc_3v0";
439 regulator-min-microvolt = <3000000>;
440 regulator-max-microvolt = <3000000>;
441 regulator-state-mem {
442 regulator-on-in-suspend;
443 regulator-suspend-microvolt = <3000000>;
447 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
448 regulator-name = "vcc3v3_s3";
451 regulator-state-mem {
452 regulator-off-in-suspend;
456 vcc3v3_s0: SWITCH_REG2 {
457 regulator-name = "vcc3v3_s0";
460 regulator-state-mem {
461 regulator-off-in-suspend;
467 vdd_cpu_b: regulator@40 {
468 compatible = "silergy,syr827";
470 fcs,suspend-voltage-selector = <1>;
471 pinctrl-names = "default";
472 pinctrl-0 = <&vsel1_pin>;
473 regulator-name = "vdd_cpu_b";
474 regulator-min-microvolt = <712500>;
475 regulator-max-microvolt = <1500000>;
476 regulator-ramp-delay = <1000>;
479 vin-supply = <&vcc5v0_sys>;
481 regulator-state-mem {
482 regulator-off-in-suspend;
486 vdd_gpu: regulator@41 {
487 compatible = "silergy,syr828";
489 fcs,suspend-voltage-selector = <1>;
490 pinctrl-names = "default";
491 pinctrl-0 = <&vsel2_pin>;
492 regulator-name = "vdd_gpu";
493 regulator-min-microvolt = <712500>;
494 regulator-max-microvolt = <1500000>;
495 regulator-ramp-delay = <1000>;
498 vin-supply = <&vcc5v0_sys>;
500 regulator-state-mem {
501 regulator-off-in-suspend;
507 i2c-scl-rising-time-ns = <300>;
508 i2c-scl-falling-time-ns = <15>;
513 i2c-scl-rising-time-ns = <450>;
514 i2c-scl-falling-time-ns = <15>;
519 i2c-scl-rising-time-ns = <600>;
520 i2c-scl-falling-time-ns = <20>;
523 fusb0: typec-portc@22 {
524 compatible = "fcs,fusb302";
526 interrupt-parent = <&gpio1>;
527 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
528 pinctrl-names = "default";
529 pinctrl-0 = <&fusb0_int>;
530 vbus-supply = <&vcc5v0_typec>;
536 rockchip,playback-channels = <8>;
537 rockchip,capture-channels = <8>;
542 rockchip,playback-channels = <2>;
543 rockchip,capture-channels = <2>;
547 i2s1_p0_0: endpoint {
550 remote-endpoint = <&es8316_p0_0>;
562 bt656-supply = <&vcc1v8_dvp>;
563 audio-supply = <&vcc_3v0>;
564 sdmmc-supply = <&vcc_sdio>;
565 gpio1830-supply = <&vcc_3v0>;
569 ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
571 pinctrl-names = "default";
572 pinctrl-0 = <&pcie_perst>;
573 vpcie12v-supply = <&vcc12v_dcin>;
574 vpcie3v3-supply = <&vcc3v3_pcie>;
583 pmu1830-supply = <&vcc_3v0>;
589 bt_enable_h: bt-enable-h {
590 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
593 bt_host_wake_l: bt-host-wake-l {
594 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
597 bt_wake_l: bt-wake-l {
598 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
604 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
609 fusb0_int: fusb0-int {
610 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
616 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
621 work_led_pin: work-led-pin {
622 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
625 diy_led_pin: diy-led-pin {
626 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
631 pcie_perst: pcie-perst {
632 rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
635 pcie_pwr_en: pcie-pwr-en {
636 rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
641 pmic_int_l: pmic-int-l {
642 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
645 vsel1_pin: vsel1-pin {
646 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
649 vsel2_pin: vsel2-pin {
650 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
655 sdmmc0_pwr_h: sdmmc0-pwr-h {
656 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
662 wifi_enable_h: wifi-enable-h {
663 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
668 vcc5v0_typec_en: vcc5v0_typec_en {
669 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
674 vcc5v0_host_en: vcc5v0-host-en {
675 rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
693 vref-supply = <&vcca1v8_s3>;
702 keep-power-in-suspend;
703 mmc-pwrseq = <&sdio_pwrseq>;
705 pinctrl-names = "default";
706 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
714 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
716 max-frequency = <150000000>;
717 pinctrl-names = "default";
718 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
719 vmmc-supply = <&vcc3v0_sd>;
720 vqmmc-supply = <&vcc_sdio>;
732 pinctrl-0 = <&spdif_bus_1>;
735 spdif_p0_0: endpoint {
736 remote-endpoint = <&dit_p0_0>;
745 compatible = "jedec,spi-nor";
747 spi-max-frequency = <10000000>;
760 /* tshut mode 0:CRU 1:GPIO */
761 rockchip,hw-tshut-mode = <1>;
762 /* tshut polarity 0:LOW 1:HIGH */
763 rockchip,hw-tshut-polarity = <1>;
770 u2phy0_otg: otg-port {
774 u2phy0_host: host-port {
775 phy-supply = <&vcc5v0_host>;
783 u2phy1_otg: otg-port {
787 u2phy1_host: host-port {
788 phy-supply = <&vcc5v0_host>;
794 pinctrl-names = "default";
795 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
799 compatible = "brcm,bcm43438-bt";
802 device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
803 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
804 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
805 pinctrl-names = "default";
806 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
807 vbat-supply = <&vcc3v3_sys>;
808 vddio-supply = <&vcc_1v8>;