1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-opp.dtsi"
14 model = "Pine64 RockPro64";
15 compatible = "pine64,rockpro64", "rockchip,rk3399";
18 stdout-path = "serial2:1500000n8";
21 clkin_gmac: external-gmac-clock {
22 compatible = "fixed-clock";
23 clock-frequency = <125000000>;
24 clock-output-names = "clkin_gmac";
29 compatible = "regulator-fixed";
30 regulator-name = "dc_12v";
33 regulator-min-microvolt = <12000000>;
34 regulator-max-microvolt = <12000000>;
38 compatible = "gpio-keys";
40 pinctrl-names = "default";
41 pinctrl-0 = <&pwrbtn>;
44 debounce-interval = <100>;
45 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
46 label = "GPIO Key Power";
47 linux,code = <KEY_POWER>;
53 compatible = "gpio-leds";
54 pinctrl-names = "default";
55 pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
60 gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
65 default-state = "off";
66 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
70 sdio_pwrseq: sdio-pwrseq {
71 compatible = "mmc-pwrseq-simple";
73 clock-names = "ext_clock";
74 pinctrl-names = "default";
75 pinctrl-0 = <&wifi_enable_h>;
78 * On the module itself this is one of these (depending
79 * on the actual card populated):
80 * - SDIO_RESET_L_WL_REG_ON
81 * - PDN (power down when low)
83 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
86 /* switched by pmic_sleep */
87 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
88 compatible = "regulator-fixed";
89 regulator-name = "vcc1v8_s3";
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 vin-supply = <&vcc_1v8>;
97 vcc3v3_pcie: vcc3v3-pcie-regulator {
98 compatible = "regulator-fixed";
100 gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pcie_pwr_en>;
103 regulator-name = "vcc3v3_pcie";
106 vin-supply = <&dc_12v>;
109 vcc3v3_sys: vcc3v3-sys {
110 compatible = "regulator-fixed";
111 regulator-name = "vcc3v3_sys";
114 regulator-min-microvolt = <3300000>;
115 regulator-max-microvolt = <3300000>;
116 vin-supply = <&vcc_sys>;
119 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
120 vcc5v0_host: vcc5v0-host-regulator {
121 compatible = "regulator-fixed";
123 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
124 pinctrl-names = "default";
125 pinctrl-0 = <&vcc5v0_host_en>;
126 regulator-name = "vcc5v0_host";
128 vin-supply = <&vcc_sys>;
131 vcc5v0_typec: vcc5v0-typec-regulator {
132 compatible = "regulator-fixed";
134 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&vcc5v0_typec_en>;
137 regulator-name = "vcc5v0_typec";
139 vin-supply = <&vcc_sys>;
143 compatible = "regulator-fixed";
144 regulator-name = "vcc_sys";
147 regulator-min-microvolt = <5000000>;
148 regulator-max-microvolt = <5000000>;
149 vin-supply = <&dc_12v>;
153 compatible = "pwm-regulator";
154 pwms = <&pwm2 0 25000 1>;
155 regulator-name = "vdd_log";
158 regulator-min-microvolt = <800000>;
159 regulator-max-microvolt = <1400000>;
160 vin-supply = <&vcc_sys>;
165 cpu-supply = <&vdd_cpu_l>;
169 cpu-supply = <&vdd_cpu_l>;
173 cpu-supply = <&vdd_cpu_l>;
177 cpu-supply = <&vdd_cpu_l>;
181 cpu-supply = <&vdd_cpu_b>;
185 cpu-supply = <&vdd_cpu_b>;
193 assigned-clocks = <&cru SCLK_RMII_SRC>;
194 assigned-clock-parents = <&clkin_gmac>;
195 clock_in_out = "input";
196 phy-supply = <&vcc_lan>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&rgmii_pins>;
200 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
201 snps,reset-active-low;
202 snps,reset-delays-us = <0 10000 50000>;
209 ddc-i2c-bus = <&i2c3>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&hdmi_cec>;
216 clock-frequency = <400000>;
217 i2c-scl-rising-time-ns = <168>;
218 i2c-scl-falling-time-ns = <4>;
222 compatible = "rockchip,rk808";
224 interrupt-parent = <&gpio1>;
225 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
227 clock-output-names = "xin32k", "rk808-clkout2";
228 pinctrl-names = "default";
229 pinctrl-0 = <&pmic_int_l>;
230 rockchip,system-power-controller;
233 vcc1-supply = <&vcc_sys>;
234 vcc2-supply = <&vcc_sys>;
235 vcc3-supply = <&vcc_sys>;
236 vcc4-supply = <&vcc_sys>;
237 vcc6-supply = <&vcc_sys>;
238 vcc7-supply = <&vcc_sys>;
239 vcc8-supply = <&vcc3v3_sys>;
240 vcc9-supply = <&vcc_sys>;
241 vcc10-supply = <&vcc_sys>;
242 vcc11-supply = <&vcc_sys>;
243 vcc12-supply = <&vcc3v3_sys>;
244 vddio-supply = <&vcc1v8_pmu>;
247 vdd_center: DCDC_REG1 {
248 regulator-name = "vdd_center";
251 regulator-min-microvolt = <750000>;
252 regulator-max-microvolt = <1350000>;
253 regulator-ramp-delay = <6001>;
254 regulator-state-mem {
255 regulator-off-in-suspend;
259 vdd_cpu_l: DCDC_REG2 {
260 regulator-name = "vdd_cpu_l";
263 regulator-min-microvolt = <750000>;
264 regulator-max-microvolt = <1350000>;
265 regulator-ramp-delay = <6001>;
266 regulator-state-mem {
267 regulator-off-in-suspend;
272 regulator-name = "vcc_ddr";
275 regulator-state-mem {
276 regulator-on-in-suspend;
281 regulator-name = "vcc_1v8";
284 regulator-min-microvolt = <1800000>;
285 regulator-max-microvolt = <1800000>;
286 regulator-state-mem {
287 regulator-on-in-suspend;
288 regulator-suspend-microvolt = <1800000>;
292 vcc1v8_dvp: LDO_REG1 {
293 regulator-name = "vcc1v8_dvp";
296 regulator-min-microvolt = <1800000>;
297 regulator-max-microvolt = <1800000>;
298 regulator-state-mem {
299 regulator-off-in-suspend;
303 vcc2v8_dvp: LDO_REG2 {
304 regulator-name = "vcc2v8_dvp";
307 regulator-min-microvolt = <2800000>;
308 regulator-max-microvolt = <2800000>;
309 regulator-state-mem {
310 regulator-off-in-suspend;
314 vcc1v8_pmu: LDO_REG3 {
315 regulator-name = "vcc1v8_pmu";
318 regulator-min-microvolt = <1800000>;
319 regulator-max-microvolt = <1800000>;
320 regulator-state-mem {
321 regulator-on-in-suspend;
322 regulator-suspend-microvolt = <1800000>;
327 regulator-name = "vcc_sdio";
330 regulator-min-microvolt = <1800000>;
331 regulator-max-microvolt = <3000000>;
332 regulator-state-mem {
333 regulator-on-in-suspend;
334 regulator-suspend-microvolt = <3000000>;
338 vcca3v0_codec: LDO_REG5 {
339 regulator-name = "vcca3v0_codec";
342 regulator-min-microvolt = <3000000>;
343 regulator-max-microvolt = <3000000>;
344 regulator-state-mem {
345 regulator-off-in-suspend;
350 regulator-name = "vcc_1v5";
353 regulator-min-microvolt = <1500000>;
354 regulator-max-microvolt = <1500000>;
355 regulator-state-mem {
356 regulator-on-in-suspend;
357 regulator-suspend-microvolt = <1500000>;
361 vcca1v8_codec: LDO_REG7 {
362 regulator-name = "vcca1v8_codec";
365 regulator-min-microvolt = <1800000>;
366 regulator-max-microvolt = <1800000>;
367 regulator-state-mem {
368 regulator-off-in-suspend;
373 regulator-name = "vcc_3v0";
376 regulator-min-microvolt = <3000000>;
377 regulator-max-microvolt = <3000000>;
378 regulator-state-mem {
379 regulator-on-in-suspend;
380 regulator-suspend-microvolt = <3000000>;
384 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
385 regulator-name = "vcc3v3_s3";
388 regulator-state-mem {
389 regulator-off-in-suspend;
393 vcc3v3_s0: SWITCH_REG2 {
394 regulator-name = "vcc3v3_s0";
397 regulator-state-mem {
398 regulator-off-in-suspend;
404 vdd_cpu_b: regulator@40 {
405 compatible = "silergy,syr827";
407 fcs,suspend-voltage-selector = <0>;
408 regulator-name = "vdd_cpu_b";
409 regulator-min-microvolt = <712500>;
410 regulator-max-microvolt = <1500000>;
411 regulator-ramp-delay = <1000>;
414 vin-supply = <&vcc_sys>;
416 regulator-state-mem {
417 regulator-off-in-suspend;
421 vdd_gpu: regulator@41 {
422 compatible = "silergy,syr828";
424 fcs,suspend-voltage-selector = <1>;
425 regulator-name = "vdd_gpu";
426 regulator-min-microvolt = <712500>;
427 regulator-max-microvolt = <1500000>;
428 regulator-ramp-delay = <1000>;
431 vin-supply = <&vcc_sys>;
433 regulator-state-mem {
434 regulator-off-in-suspend;
440 i2c-scl-rising-time-ns = <300>;
441 i2c-scl-falling-time-ns = <15>;
446 i2c-scl-rising-time-ns = <450>;
447 i2c-scl-falling-time-ns = <15>;
452 i2c-scl-rising-time-ns = <600>;
453 i2c-scl-falling-time-ns = <20>;
456 fusb0: typec-portc@22 {
457 compatible = "fcs,fusb302";
459 interrupt-parent = <&gpio1>;
460 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
461 pinctrl-names = "default";
462 pinctrl-0 = <&fusb0_int>;
463 vbus-supply = <&vcc5v0_typec>;
469 rockchip,playback-channels = <8>;
470 rockchip,capture-channels = <8>;
475 rockchip,playback-channels = <2>;
476 rockchip,capture-channels = <2>;
487 bt656-supply = <&vcc1v8_dvp>;
488 audio-supply = <&vcca1v8_codec>;
489 sdmmc-supply = <&vcc_sdio>;
490 gpio1830-supply = <&vcc_3v0>;
494 pmu1830-supply = <&vcc_3v0>;
501 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
506 fusb0_int: fusb0-int {
507 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
512 work_led_gpio: work_led-gpio {
513 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
516 diy_led_gpio: diy_led-gpio {
517 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
522 lcd_panel_reset: lcd-panel-reset {
523 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
528 pcie_pwr_en: pcie-pwr-en {
529 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
534 pmic_int_l: pmic-int-l {
535 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
538 vsel1_gpio: vsel1-gpio {
539 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
542 vsel2_gpio: vsel2-gpio {
543 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
548 wifi_enable_h: wifi-enable-h {
549 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
554 vcc5v0_typec_en: vcc5v0_typec_en {
555 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
560 vcc5v0_host_en: vcc5v0-host-en {
561 rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
575 vref-supply = <&vcca1v8_s3>;
583 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
585 max-frequency = <150000000>;
586 pinctrl-names = "default";
587 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
594 mmc-hs400-enhanced-strobe;
608 /* tshut mode 0:CRU 1:GPIO */
609 rockchip,hw-tshut-mode = <1>;
610 /* tshut polarity 0:LOW 1:HIGH */
611 rockchip,hw-tshut-polarity = <1>;
618 u2phy0_otg: otg-port {
622 u2phy0_host: host-port {
623 phy-supply = <&vcc5v0_host>;
631 u2phy1_otg: otg-port {
635 u2phy1_host: host-port {
636 phy-supply = <&vcc5v0_host>;
642 pinctrl-names = "default";
643 pinctrl-0 = <&uart0_xfer &uart0_cts>;