1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-opp.dtsi"
20 stdout-path = "serial2:1500000n8";
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
30 sdio_pwrseq: sdio-pwrseq {
31 compatible = "mmc-pwrseq-simple";
33 clock-names = "ext_clock";
34 pinctrl-names = "default";
35 pinctrl-0 = <&wifi_enable_h>;
36 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
40 compatible = "regulator-fixed";
41 regulator-name = "vcc12v_dcin";
44 regulator-min-microvolt = <12000000>;
45 regulator-max-microvolt = <12000000>;
49 compatible = "regulator-fixed";
50 regulator-name = "vcc5v0_sys";
53 regulator-min-microvolt = <5000000>;
54 regulator-max-microvolt = <5000000>;
55 vin-supply = <&vcc12v_dcin>;
59 compatible = "regulator-fixed";
60 regulator-name = "vcc_0v9";
63 regulator-min-microvolt = <900000>;
64 regulator-max-microvolt = <900000>;
65 vin-supply = <&vcc3v3_sys>;
68 vcc3v3_pcie: vcc3v3-pcie-regulator {
69 compatible = "regulator-fixed";
71 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&pcie_pwr_en>;
74 regulator-name = "vcc3v3_pcie";
77 vin-supply = <&vcc5v0_sys>;
80 vcc3v3_sys: vcc3v3-sys {
81 compatible = "regulator-fixed";
82 regulator-name = "vcc3v3_sys";
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
87 vin-supply = <&vcc5v0_sys>;
90 vcc5v0_host: vcc5v0-host-regulator {
91 compatible = "regulator-fixed";
93 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&vcc5v0_host_en>;
96 regulator-name = "vcc5v0_host";
98 vin-supply = <&vcc5v0_sys>;
101 vcc5v0_typec: vcc5v0-typec-regulator {
102 compatible = "regulator-fixed";
104 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&vcc5v0_typec_en>;
107 regulator-name = "vcc5v0_typec";
109 vin-supply = <&vcc5v0_sys>;
112 vcc_lan: vcc3v3-phy-regulator {
113 compatible = "regulator-fixed";
114 regulator-name = "vcc_lan";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
122 compatible = "pwm-regulator";
123 pwms = <&pwm2 0 25000 1>;
124 regulator-name = "vdd_log";
127 regulator-min-microvolt = <800000>;
128 regulator-max-microvolt = <1400000>;
129 vin-supply = <&vcc5v0_sys>;
134 cpu-supply = <&vdd_cpu_l>;
138 cpu-supply = <&vdd_cpu_l>;
142 cpu-supply = <&vdd_cpu_l>;
146 cpu-supply = <&vdd_cpu_l>;
150 cpu-supply = <&vdd_cpu_b>;
154 cpu-supply = <&vdd_cpu_b>;
162 assigned-clocks = <&cru SCLK_RMII_SRC>;
163 assigned-clock-parents = <&clkin_gmac>;
164 clock_in_out = "input";
165 phy-supply = <&vcc_lan>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&rgmii_pins>;
169 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
170 snps,reset-active-low;
171 snps,reset-delays-us = <0 10000 50000>;
178 mali-supply = <&vdd_gpu>;
183 ddc-i2c-bus = <&i2c3>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&hdmi_cec>;
194 clock-frequency = <400000>;
195 i2c-scl-rising-time-ns = <168>;
196 i2c-scl-falling-time-ns = <4>;
200 compatible = "rockchip,rk808";
202 interrupt-parent = <&gpio1>;
203 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
205 clock-output-names = "xin32k", "rk808-clkout2";
206 pinctrl-names = "default";
207 pinctrl-0 = <&pmic_int_l>;
208 rockchip,system-power-controller;
211 vcc1-supply = <&vcc5v0_sys>;
212 vcc2-supply = <&vcc5v0_sys>;
213 vcc3-supply = <&vcc5v0_sys>;
214 vcc4-supply = <&vcc5v0_sys>;
215 vcc6-supply = <&vcc5v0_sys>;
216 vcc7-supply = <&vcc5v0_sys>;
217 vcc8-supply = <&vcc3v3_sys>;
218 vcc9-supply = <&vcc5v0_sys>;
219 vcc10-supply = <&vcc5v0_sys>;
220 vcc11-supply = <&vcc5v0_sys>;
221 vcc12-supply = <&vcc3v3_sys>;
222 vddio-supply = <&vcc_1v8>;
225 vdd_center: DCDC_REG1 {
226 regulator-name = "vdd_center";
229 regulator-min-microvolt = <750000>;
230 regulator-max-microvolt = <1350000>;
231 regulator-ramp-delay = <6001>;
232 regulator-state-mem {
233 regulator-off-in-suspend;
237 vdd_cpu_l: DCDC_REG2 {
238 regulator-name = "vdd_cpu_l";
241 regulator-min-microvolt = <750000>;
242 regulator-max-microvolt = <1350000>;
243 regulator-ramp-delay = <6001>;
244 regulator-state-mem {
245 regulator-off-in-suspend;
250 regulator-name = "vcc_ddr";
253 regulator-state-mem {
254 regulator-on-in-suspend;
259 regulator-name = "vcc_1v8";
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <1800000>;
264 regulator-state-mem {
265 regulator-on-in-suspend;
266 regulator-suspend-microvolt = <1800000>;
270 vcc1v8_codec: LDO_REG1 {
271 regulator-name = "vcc1v8_codec";
274 regulator-min-microvolt = <1800000>;
275 regulator-max-microvolt = <1800000>;
276 regulator-state-mem {
277 regulator-off-in-suspend;
281 vcc1v8_hdmi: LDO_REG2 {
282 regulator-name = "vcc1v8_hdmi";
285 regulator-min-microvolt = <1800000>;
286 regulator-max-microvolt = <1800000>;
287 regulator-state-mem {
288 regulator-off-in-suspend;
293 regulator-name = "vcca_1v8";
296 regulator-min-microvolt = <1800000>;
297 regulator-max-microvolt = <1800000>;
298 regulator-state-mem {
299 regulator-on-in-suspend;
300 regulator-suspend-microvolt = <1800000>;
305 regulator-name = "vcc_sdio";
308 regulator-min-microvolt = <3000000>;
309 regulator-max-microvolt = <3000000>;
310 regulator-state-mem {
311 regulator-on-in-suspend;
312 regulator-suspend-microvolt = <3000000>;
316 vcca3v0_codec: LDO_REG5 {
317 regulator-name = "vcca3v0_codec";
320 regulator-min-microvolt = <3000000>;
321 regulator-max-microvolt = <3000000>;
322 regulator-state-mem {
323 regulator-off-in-suspend;
328 regulator-name = "vcc_1v5";
331 regulator-min-microvolt = <1500000>;
332 regulator-max-microvolt = <1500000>;
333 regulator-state-mem {
334 regulator-on-in-suspend;
335 regulator-suspend-microvolt = <1500000>;
339 vcc0v9_hdmi: LDO_REG7 {
340 regulator-name = "vcc0v9_hdmi";
343 regulator-min-microvolt = <900000>;
344 regulator-max-microvolt = <900000>;
345 regulator-state-mem {
346 regulator-off-in-suspend;
351 regulator-name = "vcc_3v0";
354 regulator-min-microvolt = <3000000>;
355 regulator-max-microvolt = <3000000>;
356 regulator-state-mem {
357 regulator-on-in-suspend;
358 regulator-suspend-microvolt = <3000000>;
362 vcc_cam: SWITCH_REG1 {
363 regulator-name = "vcc_cam";
366 regulator-state-mem {
367 regulator-off-in-suspend;
371 vcc_mipi: SWITCH_REG2 {
372 regulator-name = "vcc_mipi";
375 regulator-state-mem {
376 regulator-off-in-suspend;
382 vdd_cpu_b: regulator@40 {
383 compatible = "silergy,syr827";
385 fcs,suspend-voltage-selector = <1>;
386 pinctrl-names = "default";
387 pinctrl-0 = <&vsel1_pin>;
388 regulator-name = "vdd_cpu_b";
389 regulator-min-microvolt = <712500>;
390 regulator-max-microvolt = <1500000>;
391 regulator-ramp-delay = <1000>;
394 vin-supply = <&vcc5v0_sys>;
396 regulator-state-mem {
397 regulator-off-in-suspend;
401 vdd_gpu: regulator@41 {
402 compatible = "silergy,syr828";
404 fcs,suspend-voltage-selector = <1>;
405 pinctrl-names = "default";
406 pinctrl-0 = <&vsel2_pin>;
407 regulator-name = "vdd_gpu";
408 regulator-min-microvolt = <712500>;
409 regulator-max-microvolt = <1500000>;
410 regulator-ramp-delay = <1000>;
413 vin-supply = <&vcc5v0_sys>;
415 regulator-state-mem {
416 regulator-off-in-suspend;
422 i2c-scl-rising-time-ns = <300>;
423 i2c-scl-falling-time-ns = <15>;
428 i2c-scl-rising-time-ns = <450>;
429 i2c-scl-falling-time-ns = <15>;
434 i2c-scl-rising-time-ns = <600>;
435 i2c-scl-falling-time-ns = <20>;
440 pinctrl-0 = <&i2s0_2ch_bus>;
441 rockchip,capture-channels = <2>;
442 rockchip,playback-channels = <2>;
447 rockchip,playback-channels = <2>;
448 rockchip,capture-channels = <2>;
459 bt656-supply = <&vcc_3v0>;
460 audio-supply = <&vcc_3v0>;
461 sdmmc-supply = <&vcc_sdio>;
462 gpio1830-supply = <&vcc_3v0>;
468 pmu1830-supply = <&vcc_3v0>;
476 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
477 max-link-speed = <2>;
479 pinctrl-0 = <&pcie_clkreqnb_cpm>;
480 pinctrl-names = "default";
481 vpcie0v9-supply = <&vcc_0v9>;
482 vpcie1v8-supply = <&vcc_1v8>;
483 vpcie3v3-supply = <&vcc3v3_pcie>;
489 bt_enable_h: bt-enable-h {
490 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
493 bt_host_wake_l: bt-host-wake-l {
494 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
497 bt_wake_l: bt-wake-l {
498 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
503 pcie_pwr_en: pcie-pwr-en {
504 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
509 sdio0_bus4: sdio0-bus4 {
510 rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
511 <2 RK_PC5 1 &pcfg_pull_up_20ma>,
512 <2 RK_PC6 1 &pcfg_pull_up_20ma>,
513 <2 RK_PC7 1 &pcfg_pull_up_20ma>;
516 sdio0_cmd: sdio0-cmd {
517 rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
520 sdio0_clk: sdio0-clk {
521 rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
526 pmic_int_l: pmic-int-l {
527 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
530 vsel1_pin: vsel1-pin {
531 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
534 vsel2_pin: vsel2-pin {
535 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
540 vcc5v0_typec_en: vcc5v0-typec-en {
541 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
546 vcc5v0_host_en: vcc5v0-host-en {
547 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
552 wifi_enable_h: wifi-enable-h {
553 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
556 wifi_host_wake_l: wifi-host-wake-l {
557 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
569 vref-supply = <&vcc_1v8>;
573 #address-cells = <1>;
576 clock-frequency = <50000000>;
579 keep-power-in-suspend;
580 mmc-pwrseq = <&sdio_pwrseq>;
582 pinctrl-names = "default";
583 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
591 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
593 max-frequency = <150000000>;
594 pinctrl-names = "default";
595 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
602 mmc-hs400-enhanced-strobe;
618 /* tshut mode 0:CRU 1:GPIO */
619 rockchip,hw-tshut-mode = <1>;
620 /* tshut polarity 0:LOW 1:HIGH */
621 rockchip,hw-tshut-polarity = <1>;
627 u2phy0_otg: otg-port {
631 u2phy0_host: host-port {
632 phy-supply = <&vcc5v0_host>;
640 u2phy1_otg: otg-port {
644 u2phy1_host: host-port {
645 phy-supply = <&vcc5v0_host>;
651 pinctrl-names = "default";
652 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;