1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
6 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-opp.dtsi"
16 compatible = "gpio-leds";
17 pinctrl-names = "default";
18 pinctrl-0 = <&module_led_pin>;
22 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
23 linux,default-trigger = "heartbeat";
28 clkin_gmac: external-gmac-clock {
29 compatible = "fixed-clock";
30 clock-frequency = <125000000>;
31 clock-output-names = "clkin_gmac";
35 vcc1v2_phy: vcc1v2-phy {
36 compatible = "regulator-fixed";
37 regulator-name = "vcc1v2_phy";
40 regulator-min-microvolt = <1200000>;
41 regulator-max-microvolt = <1200000>;
42 vin-supply = <&vcc5v0_sys>;
45 vcc3v3_sys: vcc3v3-sys {
46 compatible = "regulator-fixed";
47 regulator-name = "vcc3v3_sys";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
52 vin-supply = <&vcc5v0_sys>;
55 vcc5v0_host: vcc5v0-host-regulator {
56 compatible = "regulator-fixed";
57 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&vcc5v0_host_en>;
61 regulator-name = "vcc5v0_host";
63 vin-supply = <&vcc5v0_sys>;
66 vcc5v0_sys: vcc5v0-sys {
67 compatible = "regulator-fixed";
68 regulator-name = "vcc5v0_sys";
71 regulator-min-microvolt = <5000000>;
72 regulator-max-microvolt = <5000000>;
77 cpu-supply = <&vdd_cpu_b>;
81 cpu-supply = <&vdd_cpu_b>;
85 cpu-supply = <&vdd_cpu_l>;
89 cpu-supply = <&vdd_cpu_l>;
93 cpu-supply = <&vdd_cpu_l>;
97 cpu-supply = <&vdd_cpu_l>;
102 drive-impedance-ohm = <33>;
106 assigned-clocks = <&cru SCLK_RMII_SRC>;
107 assigned-clock-parents = <&clkin_gmac>;
108 clock_in_out = "input";
109 phy-supply = <&vcc1v2_phy>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&rgmii_pins>;
113 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
114 snps,reset-active-low;
115 snps,reset-delays-us = <0 10000 50000>;
122 mali-supply = <&vdd_gpu>;
128 i2c-scl-rising-time-ns = <168>;
129 i2c-scl-falling-time-ns = <4>;
130 clock-frequency = <400000>;
133 compatible = "rockchip,rk808";
135 interrupt-parent = <&gpio1>;
136 interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
138 clock-output-names = "xin32k", "rk808-clkout2";
139 pinctrl-names = "default";
140 pinctrl-0 = <&pmic_int_l>;
141 rockchip,system-power-controller;
144 vcc1-supply = <&vcc5v0_sys>;
145 vcc2-supply = <&vcc5v0_sys>;
146 vcc3-supply = <&vcc5v0_sys>;
147 vcc4-supply = <&vcc5v0_sys>;
148 vcc6-supply = <&vcc5v0_sys>;
149 vcc7-supply = <&vcc5v0_sys>;
150 vcc8-supply = <&vcc3v3_sys>;
151 vcc9-supply = <&vcc5v0_sys>;
152 vcc10-supply = <&vcc5v0_sys>;
153 vcc11-supply = <&vcc5v0_sys>;
154 vcc12-supply = <&vcc3v3_sys>;
155 vddio-supply = <&vcc1v8_pmu>;
158 vdd_center: DCDC_REG1 {
159 regulator-name = "vdd_center";
160 regulator-min-microvolt = <750000>;
161 regulator-max-microvolt = <1350000>;
162 regulator-ramp-delay = <6001>;
165 regulator-state-mem {
166 regulator-off-in-suspend;
170 vdd_cpu_l: DCDC_REG2 {
171 regulator-name = "vdd_cpu_l";
172 regulator-min-microvolt = <750000>;
173 regulator-max-microvolt = <1350000>;
174 regulator-ramp-delay = <6001>;
177 regulator-state-mem {
178 regulator-off-in-suspend;
183 regulator-name = "vcc_ddr";
186 regulator-state-mem {
187 regulator-on-in-suspend;
192 regulator-name = "vcc_1v8";
193 regulator-min-microvolt = <1800000>;
194 regulator-max-microvolt = <1800000>;
197 regulator-state-mem {
198 regulator-on-in-suspend;
199 regulator-suspend-microvolt = <1800000>;
204 regulator-name = "vcc_ldo1";
205 regulator-min-microvolt = <1800000>;
206 regulator-max-microvolt = <1800000>;
208 regulator-state-mem {
209 regulator-off-in-suspend;
213 vcc1v8_hdmi: LDO_REG2 {
214 regulator-name = "vcc1v8_hdmi";
215 regulator-min-microvolt = <1800000>;
216 regulator-max-microvolt = <1800000>;
219 regulator-state-mem {
220 regulator-off-in-suspend;
224 vcc1v8_pmu: LDO_REG3 {
225 regulator-name = "vcc1v8_pmu";
226 regulator-min-microvolt = <1800000>;
227 regulator-max-microvolt = <1800000>;
230 regulator-state-mem {
231 regulator-on-in-suspend;
232 regulator-suspend-microvolt = <1800000>;
237 regulator-name = "vcc_sd";
238 regulator-min-microvolt = <1800000>;
239 regulator-max-microvolt = <3000000>;
242 regulator-state-mem {
243 regulator-on-in-suspend;
244 regulator-suspend-microvolt = <3000000>;
249 regulator-name = "vcc_ldo5";
250 regulator-min-microvolt = <3000000>;
251 regulator-max-microvolt = <3000000>;
253 regulator-state-mem {
254 regulator-off-in-suspend;
259 regulator-name = "vcc_ldo6";
260 regulator-min-microvolt = <1500000>;
261 regulator-max-microvolt = <1500000>;
263 regulator-state-mem {
264 regulator-off-in-suspend;
268 vcc0v9_hdmi: LDO_REG7 {
269 regulator-name = "vcc0v9_hdmi";
270 regulator-min-microvolt = <900000>;
271 regulator-max-microvolt = <900000>;
274 regulator-state-mem {
275 regulator-off-in-suspend;
279 vcc_efuse: LDO_REG8 {
280 regulator-name = "vcc_efuse";
281 regulator-min-microvolt = <1800000>;
282 regulator-max-microvolt = <1800000>;
285 regulator-state-mem {
286 regulator-off-in-suspend;
290 vcc3v3_s3: SWITCH_REG1 {
291 regulator-name = "vcc3v3_s3";
294 regulator-state-mem {
295 regulator-off-in-suspend;
299 vcc3v3_s0: SWITCH_REG2 {
300 regulator-name = "vcc3v3_s0";
303 regulator-state-mem {
304 regulator-off-in-suspend;
310 vdd_gpu: regulator@60 {
311 compatible = "fcs,fan53555";
313 fcs,suspend-voltage-selector = <1>;
314 regulator-name = "vdd_gpu";
315 regulator-min-microvolt = <600000>;
316 regulator-max-microvolt = <1230000>;
317 regulator-ramp-delay = <1000>;
320 vin-supply = <&vcc5v0_sys>;
326 clock-frequency = <400000>;
329 compatible = "ti,amc6821";
331 #cooling-cells = <2>;
335 compatible = "isil,isl1208";
342 clock-frequency = <400000>;
344 vdd_cpu_b: regulator@60 {
345 compatible = "fcs,fan53555";
347 vin-supply = <&vcc5v0_sys>;
348 regulator-name = "vdd_cpu_b";
349 regulator-min-microvolt = <600000>;
350 regulator-max-microvolt = <1230000>;
351 regulator-ramp-delay = <1000>;
352 fcs,suspend-voltage-selector = <1>;
359 pinctrl-0 = <&i2s0_2ch_bus>;
360 rockchip,playback-channels = <2>;
361 rockchip,capture-channels = <2>;
366 * As Q7 does not specify neither a global nor a RX clock for I2S these
367 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
368 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent
373 <3 RK_PD0 1 &pcfg_pull_none>,
374 <3 RK_PD2 1 &pcfg_pull_none>,
375 <3 RK_PD3 1 &pcfg_pull_none>,
376 <3 RK_PD7 1 &pcfg_pull_none>;
381 bt656-supply = <&vcc_1v8>;
382 audio-supply = <&vcc_1v8>;
383 sdmmc-supply = <&vcc_sd>;
384 gpio1830-supply = <&vcc_1v8>;
389 pmu1830-supply = <&vcc_1v8>;
398 i2c8_xfer_a: i2c8-xfer {
400 <1 RK_PC4 1 &pcfg_pull_up>,
401 <1 RK_PC5 1 &pcfg_pull_up>;
406 module_led_pin: module-led-pin {
408 <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
413 pmic_int_l: pmic-int-l {
415 <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
420 vcc5v0_host_en: vcc5v0-host-en {
422 <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
430 mmc-hs400-enhanced-strobe;
436 vqmmc-supply = <&vcc_sd>;
443 compatible = "jedec,spi-nor";
445 spi-max-frequency = <50000000>;
454 rockchip,hw-tshut-mode = <1>;
455 rockchip,hw-tshut-polarity = <1>;
462 u2phy1_otg: otg-port {
466 u2phy1_host: host-port {
467 phy-supply = <&vcc5v0_host>;