1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
13 model = "Firefly-RK3399 Board";
14 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
23 stdout-path = "serial2:1500000n8";
26 backlight: backlight {
27 compatible = "pwm-backlight";
28 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
29 pwms = <&pwm0 0 25000 0>;
33 16 17 18 19 20 21 22 23
34 24 25 26 27 28 29 30 31
35 32 33 34 35 36 37 38 39
36 40 41 42 43 44 45 46 47
37 48 49 50 51 52 53 54 55
38 56 57 58 59 60 61 62 63
39 64 65 66 67 68 69 70 71
40 72 73 74 75 76 77 78 79
41 80 81 82 83 84 85 86 87
42 88 89 90 91 92 93 94 95
43 96 97 98 99 100 101 102 103
44 104 105 106 107 108 109 110 111
45 112 113 114 115 116 117 118 119
46 120 121 122 123 124 125 126 127
47 128 129 130 131 132 133 134 135
48 136 137 138 139 140 141 142 143
49 144 145 146 147 148 149 150 151
50 152 153 154 155 156 157 158 159
51 160 161 162 163 164 165 166 167
52 168 169 170 171 172 173 174 175
53 176 177 178 179 180 181 182 183
54 184 185 186 187 188 189 190 191
55 192 193 194 195 196 197 198 199
56 200 201 202 203 204 205 206 207
57 208 209 210 211 212 213 214 215
58 216 217 218 219 220 221 222 223
59 224 225 226 227 228 229 230 231
60 232 233 234 235 236 237 238 239
61 240 241 242 243 244 245 246 247
62 248 249 250 251 252 253 254 255>;
63 default-brightness-level = <200>;
66 clkin_gmac: external-gmac-clock {
67 compatible = "fixed-clock";
68 clock-frequency = <125000000>;
69 clock-output-names = "clkin_gmac";
74 compatible = "regulator-fixed";
75 regulator-name = "dc_12v";
78 regulator-min-microvolt = <12000000>;
79 regulator-max-microvolt = <12000000>;
83 compatible = "gpio-keys";
85 pinctrl-names = "default";
86 pinctrl-0 = <&pwrbtn>;
89 debounce-interval = <100>;
90 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
91 label = "GPIO Key Power";
92 linux,code = <KEY_POWER>;
98 compatible = "gpio-leds";
99 pinctrl-names = "default";
100 pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
104 default-state = "on";
105 gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
110 default-state = "off";
111 gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
116 compatible = "simple-audio-card";
117 simple-audio-card,name = "rockchip,rt5640-codec";
118 simple-audio-card,format = "i2s";
119 simple-audio-card,mclk-fs = <256>;
120 simple-audio-card,widgets =
121 "Microphone", "Mic Jack",
122 "Headphone", "Headphone Jack";
123 simple-audio-card,routing =
124 "Mic Jack", "MICBIAS1",
126 "Headphone Jack", "HPOL",
127 "Headphone Jack", "HPOR";
129 simple-audio-card,cpu {
133 simple-audio-card,codec {
134 sound-dai = <&rt5640>;
138 sdio_pwrseq: sdio-pwrseq {
139 compatible = "mmc-pwrseq-simple";
141 clock-names = "ext_clock";
142 pinctrl-names = "default";
143 pinctrl-0 = <&wifi_enable_h>;
146 * On the module itself this is one of these (depending
147 * on the actual card populated):
148 * - SDIO_RESET_L_WL_REG_ON
149 * - PDN (power down when low)
151 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
154 /* switched by pmic_sleep */
155 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
156 compatible = "regulator-fixed";
157 regulator-name = "vcc1v8_s3";
160 regulator-min-microvolt = <1800000>;
161 regulator-max-microvolt = <1800000>;
162 vin-supply = <&vcc_1v8>;
165 vcc3v3_pcie: vcc3v3-pcie-regulator {
166 compatible = "regulator-fixed";
168 gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
169 pinctrl-names = "default";
170 pinctrl-0 = <&pcie_pwr_en>;
171 regulator-name = "vcc3v3_pcie";
174 vin-supply = <&dc_12v>;
177 vcc3v3_sys: vcc3v3-sys {
178 compatible = "regulator-fixed";
179 regulator-name = "vcc3v3_sys";
182 regulator-min-microvolt = <3300000>;
183 regulator-max-microvolt = <3300000>;
184 vin-supply = <&vcc_sys>;
187 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
188 vcc5v0_host: vcc5v0-host-regulator {
189 compatible = "regulator-fixed";
191 gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&vcc5v0_host_en>;
194 regulator-name = "vcc5v0_host";
196 vin-supply = <&vcc_sys>;
200 compatible = "regulator-fixed";
201 regulator-name = "vcc_sys";
204 regulator-min-microvolt = <5000000>;
205 regulator-max-microvolt = <5000000>;
206 vin-supply = <&dc_12v>;
210 compatible = "pwm-regulator";
211 pwms = <&pwm2 0 25000 1>;
212 regulator-name = "vdd_log";
215 regulator-min-microvolt = <430000>;
216 regulator-max-microvolt = <1400000>;
217 vin-supply = <&vcc_sys>;
222 cpu-supply = <&vdd_cpu_l>;
226 cpu-supply = <&vdd_cpu_l>;
230 cpu-supply = <&vdd_cpu_l>;
234 cpu-supply = <&vdd_cpu_l>;
238 cpu-supply = <&vdd_cpu_b>;
242 cpu-supply = <&vdd_cpu_b>;
250 assigned-clocks = <&cru SCLK_RMII_SRC>;
251 assigned-clock-parents = <&clkin_gmac>;
252 clock_in_out = "input";
253 phy-supply = <&vcc_lan>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&rgmii_pins>;
257 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
258 snps,reset-active-low;
259 snps,reset-delays-us = <0 10000 50000>;
266 ddc-i2c-bus = <&i2c3>;
267 pinctrl-names = "default";
268 pinctrl-0 = <&hdmi_cec>;
273 clock-frequency = <400000>;
274 i2c-scl-rising-time-ns = <168>;
275 i2c-scl-falling-time-ns = <4>;
279 compatible = "rockchip,rk808";
281 interrupt-parent = <&gpio1>;
282 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
284 clock-output-names = "xin32k", "rk808-clkout2";
285 pinctrl-names = "default";
286 pinctrl-0 = <&pmic_int_l>;
287 rockchip,system-power-controller;
290 vcc1-supply = <&vcc_sys>;
291 vcc2-supply = <&vcc_sys>;
292 vcc3-supply = <&vcc_sys>;
293 vcc4-supply = <&vcc_sys>;
294 vcc6-supply = <&vcc_sys>;
295 vcc7-supply = <&vcc_sys>;
296 vcc8-supply = <&vcc3v3_sys>;
297 vcc9-supply = <&vcc_sys>;
298 vcc10-supply = <&vcc_sys>;
299 vcc11-supply = <&vcc_sys>;
300 vcc12-supply = <&vcc3v3_sys>;
301 vddio-supply = <&vcc1v8_pmu>;
304 vdd_center: DCDC_REG1 {
305 regulator-name = "vdd_center";
308 regulator-min-microvolt = <750000>;
309 regulator-max-microvolt = <1350000>;
310 regulator-ramp-delay = <6001>;
311 regulator-state-mem {
312 regulator-off-in-suspend;
316 vdd_cpu_l: DCDC_REG2 {
317 regulator-name = "vdd_cpu_l";
320 regulator-min-microvolt = <750000>;
321 regulator-max-microvolt = <1350000>;
322 regulator-ramp-delay = <6001>;
323 regulator-state-mem {
324 regulator-off-in-suspend;
329 regulator-name = "vcc_ddr";
332 regulator-state-mem {
333 regulator-on-in-suspend;
338 regulator-name = "vcc_1v8";
341 regulator-min-microvolt = <1800000>;
342 regulator-max-microvolt = <1800000>;
343 regulator-state-mem {
344 regulator-on-in-suspend;
345 regulator-suspend-microvolt = <1800000>;
349 vcc1v8_dvp: LDO_REG1 {
350 regulator-name = "vcc1v8_dvp";
353 regulator-min-microvolt = <1800000>;
354 regulator-max-microvolt = <1800000>;
355 regulator-state-mem {
356 regulator-off-in-suspend;
360 vcc2v8_dvp: LDO_REG2 {
361 regulator-name = "vcc2v8_dvp";
364 regulator-min-microvolt = <2800000>;
365 regulator-max-microvolt = <2800000>;
366 regulator-state-mem {
367 regulator-off-in-suspend;
371 vcc1v8_pmu: LDO_REG3 {
372 regulator-name = "vcc1v8_pmu";
375 regulator-min-microvolt = <1800000>;
376 regulator-max-microvolt = <1800000>;
377 regulator-state-mem {
378 regulator-on-in-suspend;
379 regulator-suspend-microvolt = <1800000>;
384 regulator-name = "vcc_sdio";
387 regulator-min-microvolt = <1800000>;
388 regulator-max-microvolt = <3000000>;
389 regulator-state-mem {
390 regulator-on-in-suspend;
391 regulator-suspend-microvolt = <3000000>;
395 vcca3v0_codec: LDO_REG5 {
396 regulator-name = "vcca3v0_codec";
399 regulator-min-microvolt = <3000000>;
400 regulator-max-microvolt = <3000000>;
401 regulator-state-mem {
402 regulator-off-in-suspend;
407 regulator-name = "vcc_1v5";
410 regulator-min-microvolt = <1500000>;
411 regulator-max-microvolt = <1500000>;
412 regulator-state-mem {
413 regulator-on-in-suspend;
414 regulator-suspend-microvolt = <1500000>;
418 vcca1v8_codec: LDO_REG7 {
419 regulator-name = "vcca1v8_codec";
422 regulator-min-microvolt = <1800000>;
423 regulator-max-microvolt = <1800000>;
424 regulator-state-mem {
425 regulator-off-in-suspend;
430 regulator-name = "vcc_3v0";
433 regulator-min-microvolt = <3000000>;
434 regulator-max-microvolt = <3000000>;
435 regulator-state-mem {
436 regulator-on-in-suspend;
437 regulator-suspend-microvolt = <3000000>;
441 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
442 regulator-name = "vcc3v3_s3";
445 regulator-state-mem {
446 regulator-off-in-suspend;
450 vcc3v3_s0: SWITCH_REG2 {
451 regulator-name = "vcc3v3_s0";
454 regulator-state-mem {
455 regulator-off-in-suspend;
461 vdd_cpu_b: regulator@40 {
462 compatible = "silergy,syr827";
464 fcs,suspend-voltage-selector = <0>;
465 regulator-name = "vdd_cpu_b";
466 regulator-min-microvolt = <712500>;
467 regulator-max-microvolt = <1500000>;
468 regulator-ramp-delay = <1000>;
471 vin-supply = <&vcc_sys>;
473 regulator-state-mem {
474 regulator-off-in-suspend;
478 vdd_gpu: regulator@41 {
479 compatible = "silergy,syr828";
481 fcs,suspend-voltage-selector = <1>;
482 regulator-name = "vdd_gpu";
483 regulator-min-microvolt = <712500>;
484 regulator-max-microvolt = <1500000>;
485 regulator-ramp-delay = <1000>;
488 vin-supply = <&vcc_sys>;
490 regulator-state-mem {
491 regulator-off-in-suspend;
497 i2c-scl-rising-time-ns = <300>;
498 i2c-scl-falling-time-ns = <15>;
502 compatible = "realtek,rt5640";
504 clocks = <&cru SCLK_I2S_8CH_OUT>;
505 clock-names = "mclk";
506 realtek,in1-differential;
507 #sound-dai-cells = <0>;
508 pinctrl-names = "default";
509 pinctrl-0 = <&rt5640_hpcon>;
514 i2c-scl-rising-time-ns = <450>;
515 i2c-scl-falling-time-ns = <15>;
520 i2c-scl-rising-time-ns = <600>;
521 i2c-scl-falling-time-ns = <20>;
525 compatible = "invensense,mpu6500";
527 interrupt-parent = <&gpio1>;
528 interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
533 rockchip,playback-channels = <8>;
534 rockchip,capture-channels = <8>;
539 rockchip,playback-channels = <2>;
540 rockchip,capture-channels = <2>;
551 bt656-supply = <&vcc1v8_dvp>;
552 audio-supply = <&vcca1v8_codec>;
553 sdmmc-supply = <&vcc_sdio>;
554 gpio1830-supply = <&vcc_3v0>;
562 ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
564 pinctrl-names = "default";
565 pinctrl-0 = <&pcie_clkreqn_cpm>;
570 pmu1830-supply = <&vcc_3v0>;
577 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
582 lcd_panel_reset: lcd-panel-reset {
583 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
588 pcie_pwr_en: pcie-pwr-en {
589 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
592 pcie_3g_drv: pcie-3g-drv {
593 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
598 vsel1_pin: vsel1-pin {
599 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
602 vsel2_pin: vsel2-pin {
603 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
608 wifi_enable_h: wifi-enable-h {
609 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
614 rt5640_hpcon: rt5640-hpcon {
615 rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
620 pmic_int_l: pmic-int-l {
621 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
626 vcc5v0_host_en: vcc5v0-host-en {
627 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
632 wifi_host_wake_l: wifi-host-wake-l {
633 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
638 work_led_pin: work-led-pin {
639 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
642 diy_led_pin: diy-led-pin {
643 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
657 vref-supply = <&vcca1v8_s3>;
662 /* WiFi & BT combo module Ampak AP6356S */
666 keep-power-in-suspend;
667 mmc-pwrseq = <&sdio_pwrseq>;
669 pinctrl-names = "default";
670 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
674 vqmmc-supply = &vcc1v8_s3; /* IO line */
675 vmmc-supply = &vcc_sdio; /* card's power */
677 #address-cells = <1>;
683 compatible = "brcm,bcm4329-fmac";
684 interrupt-parent = <&gpio0>;
685 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
686 interrupt-names = "host-wake";
687 brcm,drive-strength = <5>;
688 pinctrl-names = "default";
689 pinctrl-0 = <&wifi_host_wake_l>;
697 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
699 max-frequency = <150000000>;
700 pinctrl-names = "default";
701 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
708 mmc-hs400-enhanced-strobe;
722 /* tshut mode 0:CRU 1:GPIO */
723 rockchip,hw-tshut-mode = <1>;
724 /* tshut polarity 0:LOW 1:HIGH */
725 rockchip,hw-tshut-polarity = <1>;
732 u2phy0_otg: otg-port {
736 u2phy0_host: host-port {
737 phy-supply = <&vcc5v0_host>;
745 u2phy1_otg: otg-port {
749 u2phy1_host: host-port {
750 phy-supply = <&vcc5v0_host>;
756 pinctrl-names = "default";
757 pinctrl-0 = <&uart0_xfer &uart0_cts>;