1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
13 model = "Firefly-RK3399 Board";
14 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
23 stdout-path = "serial2:1500000n8";
26 backlight: backlight {
27 compatible = "pwm-backlight";
28 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
29 pwms = <&pwm0 0 25000 0>;
33 16 17 18 19 20 21 22 23
34 24 25 26 27 28 29 30 31
35 32 33 34 35 36 37 38 39
36 40 41 42 43 44 45 46 47
37 48 49 50 51 52 53 54 55
38 56 57 58 59 60 61 62 63
39 64 65 66 67 68 69 70 71
40 72 73 74 75 76 77 78 79
41 80 81 82 83 84 85 86 87
42 88 89 90 91 92 93 94 95
43 96 97 98 99 100 101 102 103
44 104 105 106 107 108 109 110 111
45 112 113 114 115 116 117 118 119
46 120 121 122 123 124 125 126 127
47 128 129 130 131 132 133 134 135
48 136 137 138 139 140 141 142 143
49 144 145 146 147 148 149 150 151
50 152 153 154 155 156 157 158 159
51 160 161 162 163 164 165 166 167
52 168 169 170 171 172 173 174 175
53 176 177 178 179 180 181 182 183
54 184 185 186 187 188 189 190 191
55 192 193 194 195 196 197 198 199
56 200 201 202 203 204 205 206 207
57 208 209 210 211 212 213 214 215
58 216 217 218 219 220 221 222 223
59 224 225 226 227 228 229 230 231
60 232 233 234 235 236 237 238 239
61 240 241 242 243 244 245 246 247
62 248 249 250 251 252 253 254 255>;
63 default-brightness-level = <200>;
66 clkin_gmac: external-gmac-clock {
67 compatible = "fixed-clock";
68 clock-frequency = <125000000>;
69 clock-output-names = "clkin_gmac";
74 compatible = "regulator-fixed";
75 regulator-name = "dc_12v";
78 regulator-min-microvolt = <12000000>;
79 regulator-max-microvolt = <12000000>;
83 compatible = "gpio-keys";
85 pinctrl-names = "default";
86 pinctrl-0 = <&pwrbtn>;
89 debounce-interval = <100>;
90 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
91 label = "GPIO Key Power";
92 linux,code = <KEY_POWER>;
98 compatible = "gpio-ir-receiver";
99 gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
100 pinctrl-0 = <&ir_int>;
101 pinctrl-names = "default";
105 compatible = "gpio-leds";
106 pinctrl-names = "default";
107 pinctrl-0 = <&work_led_pin>, <&diy_led_pin>;
111 default-state = "on";
112 gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
117 default-state = "off";
118 gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
123 compatible = "simple-audio-card";
124 simple-audio-card,name = "rockchip,rt5640-codec";
125 simple-audio-card,format = "i2s";
126 simple-audio-card,mclk-fs = <256>;
127 simple-audio-card,widgets =
128 "Microphone", "Mic Jack",
129 "Headphone", "Headphone Jack";
130 simple-audio-card,routing =
131 "Mic Jack", "MICBIAS1",
133 "Headphone Jack", "HPOL",
134 "Headphone Jack", "HPOR";
136 simple-audio-card,cpu {
140 simple-audio-card,codec {
141 sound-dai = <&rt5640>;
145 sdio_pwrseq: sdio-pwrseq {
146 compatible = "mmc-pwrseq-simple";
148 clock-names = "ext_clock";
149 pinctrl-names = "default";
150 pinctrl-0 = <&wifi_enable_h>;
153 * On the module itself this is one of these (depending
154 * on the actual card populated):
155 * - SDIO_RESET_L_WL_REG_ON
156 * - PDN (power down when low)
158 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
162 compatible = "audio-graph-card";
168 compatible = "linux,spdif-dit";
169 #sound-dai-cells = <0>;
173 remote-endpoint = <&spdif_p0_0>;
178 /* switched by pmic_sleep */
179 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
180 compatible = "regulator-fixed";
181 regulator-name = "vcc1v8_s3";
184 regulator-min-microvolt = <1800000>;
185 regulator-max-microvolt = <1800000>;
186 vin-supply = <&vcc_1v8>;
189 vcc3v3_pcie: vcc3v3-pcie-regulator {
190 compatible = "regulator-fixed";
192 gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&pcie_pwr_en>;
195 regulator-name = "vcc3v3_pcie";
198 vin-supply = <&dc_12v>;
201 vcc3v3_sys: vcc3v3-sys {
202 compatible = "regulator-fixed";
203 regulator-name = "vcc3v3_sys";
206 regulator-min-microvolt = <3300000>;
207 regulator-max-microvolt = <3300000>;
208 vin-supply = <&vcc_sys>;
211 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
212 vcc5v0_host: vcc5v0-host-regulator {
213 compatible = "regulator-fixed";
215 gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&vcc5v0_host_en>;
218 regulator-name = "vcc5v0_host";
220 vin-supply = <&vcc_sys>;
224 compatible = "regulator-fixed";
225 regulator-name = "vcc_sys";
228 regulator-min-microvolt = <5000000>;
229 regulator-max-microvolt = <5000000>;
230 vin-supply = <&dc_12v>;
234 compatible = "pwm-regulator";
235 pwms = <&pwm2 0 25000 1>;
236 regulator-name = "vdd_log";
239 regulator-min-microvolt = <430000>;
240 regulator-max-microvolt = <1400000>;
241 vin-supply = <&vcc_sys>;
246 cpu-supply = <&vdd_cpu_l>;
250 cpu-supply = <&vdd_cpu_l>;
254 cpu-supply = <&vdd_cpu_l>;
258 cpu-supply = <&vdd_cpu_l>;
262 cpu-supply = <&vdd_cpu_b>;
266 cpu-supply = <&vdd_cpu_b>;
274 assigned-clocks = <&cru SCLK_RMII_SRC>;
275 assigned-clock-parents = <&clkin_gmac>;
276 clock_in_out = "input";
277 phy-supply = <&vcc_lan>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&rgmii_pins>;
281 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
282 snps,reset-active-low;
283 snps,reset-delays-us = <0 10000 50000>;
290 ddc-i2c-bus = <&i2c3>;
291 pinctrl-names = "default";
292 pinctrl-0 = <&hdmi_cec>;
297 clock-frequency = <400000>;
298 i2c-scl-rising-time-ns = <168>;
299 i2c-scl-falling-time-ns = <4>;
303 compatible = "rockchip,rk808";
305 interrupt-parent = <&gpio1>;
306 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
308 clock-output-names = "xin32k", "rk808-clkout2";
309 pinctrl-names = "default";
310 pinctrl-0 = <&pmic_int_l>;
311 rockchip,system-power-controller;
314 vcc1-supply = <&vcc_sys>;
315 vcc2-supply = <&vcc_sys>;
316 vcc3-supply = <&vcc_sys>;
317 vcc4-supply = <&vcc_sys>;
318 vcc6-supply = <&vcc_sys>;
319 vcc7-supply = <&vcc_sys>;
320 vcc8-supply = <&vcc3v3_sys>;
321 vcc9-supply = <&vcc_sys>;
322 vcc10-supply = <&vcc_sys>;
323 vcc11-supply = <&vcc_sys>;
324 vcc12-supply = <&vcc3v3_sys>;
325 vddio-supply = <&vcc1v8_pmu>;
328 vdd_center: DCDC_REG1 {
329 regulator-name = "vdd_center";
332 regulator-min-microvolt = <750000>;
333 regulator-max-microvolt = <1350000>;
334 regulator-ramp-delay = <6001>;
335 regulator-state-mem {
336 regulator-off-in-suspend;
340 vdd_cpu_l: DCDC_REG2 {
341 regulator-name = "vdd_cpu_l";
344 regulator-min-microvolt = <750000>;
345 regulator-max-microvolt = <1350000>;
346 regulator-ramp-delay = <6001>;
347 regulator-state-mem {
348 regulator-off-in-suspend;
353 regulator-name = "vcc_ddr";
356 regulator-state-mem {
357 regulator-on-in-suspend;
362 regulator-name = "vcc_1v8";
365 regulator-min-microvolt = <1800000>;
366 regulator-max-microvolt = <1800000>;
367 regulator-state-mem {
368 regulator-on-in-suspend;
369 regulator-suspend-microvolt = <1800000>;
373 vcc1v8_dvp: LDO_REG1 {
374 regulator-name = "vcc1v8_dvp";
377 regulator-min-microvolt = <1800000>;
378 regulator-max-microvolt = <1800000>;
379 regulator-state-mem {
380 regulator-off-in-suspend;
384 vcc2v8_dvp: LDO_REG2 {
385 regulator-name = "vcc2v8_dvp";
388 regulator-min-microvolt = <2800000>;
389 regulator-max-microvolt = <2800000>;
390 regulator-state-mem {
391 regulator-off-in-suspend;
395 vcc1v8_pmu: LDO_REG3 {
396 regulator-name = "vcc1v8_pmu";
399 regulator-min-microvolt = <1800000>;
400 regulator-max-microvolt = <1800000>;
401 regulator-state-mem {
402 regulator-on-in-suspend;
403 regulator-suspend-microvolt = <1800000>;
408 regulator-name = "vcc_sdio";
411 regulator-min-microvolt = <1800000>;
412 regulator-max-microvolt = <3000000>;
413 regulator-state-mem {
414 regulator-on-in-suspend;
415 regulator-suspend-microvolt = <3000000>;
419 vcca3v0_codec: LDO_REG5 {
420 regulator-name = "vcca3v0_codec";
423 regulator-min-microvolt = <3000000>;
424 regulator-max-microvolt = <3000000>;
425 regulator-state-mem {
426 regulator-off-in-suspend;
431 regulator-name = "vcc_1v5";
434 regulator-min-microvolt = <1500000>;
435 regulator-max-microvolt = <1500000>;
436 regulator-state-mem {
437 regulator-on-in-suspend;
438 regulator-suspend-microvolt = <1500000>;
442 vcca1v8_codec: LDO_REG7 {
443 regulator-name = "vcca1v8_codec";
446 regulator-min-microvolt = <1800000>;
447 regulator-max-microvolt = <1800000>;
448 regulator-state-mem {
449 regulator-off-in-suspend;
454 regulator-name = "vcc_3v0";
457 regulator-min-microvolt = <3000000>;
458 regulator-max-microvolt = <3000000>;
459 regulator-state-mem {
460 regulator-on-in-suspend;
461 regulator-suspend-microvolt = <3000000>;
465 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
466 regulator-name = "vcc3v3_s3";
469 regulator-state-mem {
470 regulator-off-in-suspend;
474 vcc3v3_s0: SWITCH_REG2 {
475 regulator-name = "vcc3v3_s0";
478 regulator-state-mem {
479 regulator-off-in-suspend;
485 vdd_cpu_b: regulator@40 {
486 compatible = "silergy,syr827";
488 fcs,suspend-voltage-selector = <0>;
489 regulator-name = "vdd_cpu_b";
490 regulator-min-microvolt = <712500>;
491 regulator-max-microvolt = <1500000>;
492 regulator-ramp-delay = <1000>;
495 vin-supply = <&vcc_sys>;
497 regulator-state-mem {
498 regulator-off-in-suspend;
502 vdd_gpu: regulator@41 {
503 compatible = "silergy,syr828";
505 fcs,suspend-voltage-selector = <1>;
506 regulator-name = "vdd_gpu";
507 regulator-min-microvolt = <712500>;
508 regulator-max-microvolt = <1500000>;
509 regulator-ramp-delay = <1000>;
512 vin-supply = <&vcc_sys>;
514 regulator-state-mem {
515 regulator-off-in-suspend;
521 i2c-scl-rising-time-ns = <300>;
522 i2c-scl-falling-time-ns = <15>;
526 compatible = "realtek,rt5640";
528 clocks = <&cru SCLK_I2S_8CH_OUT>;
529 clock-names = "mclk";
530 realtek,in1-differential;
531 #sound-dai-cells = <0>;
532 pinctrl-names = "default";
533 pinctrl-0 = <&rt5640_hpcon>;
538 i2c-scl-rising-time-ns = <450>;
539 i2c-scl-falling-time-ns = <15>;
544 i2c-scl-rising-time-ns = <600>;
545 i2c-scl-falling-time-ns = <20>;
549 compatible = "invensense,mpu6500";
551 interrupt-parent = <&gpio1>;
552 interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
557 rockchip,playback-channels = <8>;
558 rockchip,capture-channels = <8>;
563 rockchip,playback-channels = <2>;
564 rockchip,capture-channels = <2>;
575 bt656-supply = <&vcc1v8_dvp>;
576 audio-supply = <&vcca1v8_codec>;
577 sdmmc-supply = <&vcc_sdio>;
578 gpio1830-supply = <&vcc_3v0>;
586 ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
588 pinctrl-names = "default";
589 pinctrl-0 = <&pcie_clkreqn_cpm>;
594 pmu1830-supply = <&vcc_3v0>;
601 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
607 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
612 lcd_panel_reset: lcd-panel-reset {
613 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
618 work_led_pin: work-led-pin {
619 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
622 diy_led_pin: diy-led-pin {
623 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
628 pcie_pwr_en: pcie-pwr-en {
629 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
632 pcie_3g_drv: pcie-3g-drv {
633 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
638 pmic_int_l: pmic-int-l {
639 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
642 vsel1_pin: vsel1-pin {
643 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
646 vsel2_pin: vsel2-pin {
647 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
652 rt5640_hpcon: rt5640-hpcon {
653 rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
658 wifi_enable_h: wifi-enable-h {
659 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
664 vcc5v0_host_en: vcc5v0-host-en {
665 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
670 wifi_host_wake_l: wifi-host-wake-l {
671 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
685 vref-supply = <&vcca1v8_s3>;
690 /* WiFi & BT combo module Ampak AP6356S */
694 keep-power-in-suspend;
695 mmc-pwrseq = <&sdio_pwrseq>;
697 pinctrl-names = "default";
698 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
702 vqmmc-supply = &vcc1v8_s3; /* IO line */
703 vmmc-supply = &vcc_sdio; /* card's power */
705 #address-cells = <1>;
711 compatible = "brcm,bcm4329-fmac";
712 interrupt-parent = <&gpio0>;
713 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
714 interrupt-names = "host-wake";
715 brcm,drive-strength = <5>;
716 pinctrl-names = "default";
717 pinctrl-0 = <&wifi_host_wake_l>;
725 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
727 max-frequency = <150000000>;
728 pinctrl-names = "default";
729 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
736 mmc-hs400-enhanced-strobe;
742 pinctrl-0 = <&spdif_bus_1>;
746 spdif_p0_0: endpoint {
747 remote-endpoint = <&dit_p0_0>;
761 /* tshut mode 0:CRU 1:GPIO */
762 rockchip,hw-tshut-mode = <1>;
763 /* tshut polarity 0:LOW 1:HIGH */
764 rockchip,hw-tshut-polarity = <1>;
771 u2phy0_otg: otg-port {
775 u2phy0_host: host-port {
776 phy-supply = <&vcc5v0_host>;
784 u2phy1_otg: otg-port {
788 u2phy1_host: host-port {
789 phy-supply = <&vcc5v0_host>;
795 pinctrl-names = "default";
796 pinctrl-0 = <&uart0_xfer &uart0_cts>;