arch/arm64/boot/dts/renesas/ulcb.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car Gen3 ULCB board
   4  *
   5  * Copyright (C) 2016 Renesas Electronics Corp.
   6  * Copyright (C) 2016 Cogent Embedded, Inc.
   7  */
   8
   9 /*
  10  * SSI-AK4613
  11  *      aplay   -D plughw:0,0 xxx.wav
  12  *      arecord -D plughw:0,0 xxx.wav
  13  * SSI-HDMI
  14  *      aplay   -D plughw:0,1 xxx.wav
  15  */
  16
  17 #include <dt-bindings/gpio/gpio.h>
  18 #include <dt-bindings/input/input.h>
  19
  20 / {
  21         model = "Renesas R-Car Gen3 ULCB board";
  22
  23         aliases {
  24                 serial0 = &scif2;
  25                 ethernet0 = &avb;
  26                 mmc0 = &sdhi2;
  27                 mmc1 = &sdhi0;
  28         };
  29
  30         chosen {
  31                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  32                 stdout-path = "serial0:115200n8";
  33         };
  34
  35         audio_clkout: audio-clkout {
  36                 /*
  37                  * This is same as <&rcar_sound 0>
  38                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  39                  */
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 clock-frequency = <12288000>;
  43         };
  44
  45         hdmi0-out {
  46                 compatible = "hdmi-connector";
  47                 type = "a";
  48
  49                 port {
  50                         hdmi0_con: endpoint {
  51                         };
  52                 };
  53         };
  54
  55         keyboard {
  56                 compatible = "gpio-keys";
  57
  58                 key-1 {
  59                         linux,code = <KEY_1>;
  60                         label = "SW3";
  61                         wakeup-source;
  62                         debounce-interval = <20>;
  63                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  64                 };
  65         };
  66
  67         leds {
  68                 compatible = "gpio-leds";
  69
  70                 led5 {
  71                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  72                 };
  73                 led6 {
  74                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  75                 };
  76         };
  77
  78         reg_1p8v: regulator0 {
  79                 compatible = "regulator-fixed";
  80                 regulator-name = "fixed-1.8V";
  81                 regulator-min-microvolt = <1800000>;
  82                 regulator-max-microvolt = <1800000>;
  83                 regulator-boot-on;
  84                 regulator-always-on;
  85         };
  86
  87         reg_3p3v: regulator1 {
  88                 compatible = "regulator-fixed";
  89                 regulator-name = "fixed-3.3V";
  90                 regulator-min-microvolt = <3300000>;
  91                 regulator-max-microvolt = <3300000>;
  92                 regulator-boot-on;
  93                 regulator-always-on;
  94         };
  95
  96         sound_card: sound {
  97                 compatible = "audio-graph-card";
  98                 label = "rcar-sound";
  99
 100                 dais = <&rsnd_port0     /* ak4613 */
 101                         &rsnd_port1     /* HDMI0  */
 102                         >;
 103         };
 104
 105         vcc_sdhi0: regulator-vcc-sdhi0 {
 106                 compatible = "regulator-fixed";
 107
 108                 regulator-name = "SDHI0 Vcc";
 109                 regulator-min-microvolt = <3300000>;
 110                 regulator-max-microvolt = <3300000>;
 111
 112                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 113                 enable-active-high;
 114         };
 115
 116         vccq_sdhi0: regulator-vccq-sdhi0 {
 117                 compatible = "regulator-gpio";
 118
 119                 regulator-name = "SDHI0 VccQ";
 120                 regulator-min-microvolt = <1800000>;
 121                 regulator-max-microvolt = <3300000>;
 122
 123                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 124                 gpios-states = <1>;
 125                 states = <3300000 1>, <1800000 0>;
 126         };
 127
 128         x12_clk: x12 {
 129                 compatible = "fixed-clock";
 130                 #clock-cells = <0>;
 131                 clock-frequency = <24576000>;
 132         };
 133
 134         x23_clk: x23-clock {
 135                 compatible = "fixed-clock";
 136                 #clock-cells = <0>;
 137                 clock-frequency = <25000000>;
 138         };
 139 };
 140
 141 &a57_0 {
 142         cpu-supply = <&dvfs>;
 143 };
 144
 145 &audio_clk_a {
 146         clock-frequency = <22579200>;
 147 };
 148
 149 &avb {
 150         pinctrl-0 = <&avb_pins>;
 151         pinctrl-names = "default";
 152         phy-handle = <&phy0>;
 153         tx-internal-delay-ps = <2000>;
 154         status = "okay";
 155
 156         phy0: ethernet-phy@0 {
 157                 compatible = "ethernet-phy-id0022.1622",
 158                              "ethernet-phy-ieee802.3-c22";
 159                 rxc-skew-ps = <1500>;
 160                 reg = <0>;
 161                 interrupt-parent = <&gpio2>;
 162                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 163                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 164         };
 165 };
 166
 167 &du {
 168         status = "okay";
 169 };
 170
 171 &ehci1 {
 172         status = "okay";
 173 };
 174
 175 &extal_clk {
 176         clock-frequency = <16666666>;
 177 };
 178
 179 &extalr_clk {
 180         clock-frequency = <32768>;
 181 };
 182
 183 &hdmi0 {
 184         status = "okay";
 185
 186         ports {
 187                 port@1 {
 188                         reg = <1>;
 189                         rcar_dw_hdmi0_out: endpoint {
 190                                 remote-endpoint = <&hdmi0_con>;
 191                         };
 192                 };
 193                 port@2 {
 194                         reg = <2>;
 195                         dw_hdmi0_snd_in: endpoint {
 196                                 remote-endpoint = <&rsnd_for_hdmi>;
 197                         };
 198                 };
 199         };
 200 };
 201
 202 &hdmi0_con {
 203         remote-endpoint = <&rcar_dw_hdmi0_out>;
 204 };
 205
 206 &i2c2 {
 207         pinctrl-0 = <&i2c2_pins>;
 208         pinctrl-names = "default";
 209
 210         status = "okay";
 211
 212         clock-frequency = <100000>;
 213
 214         ak4613: codec@10 {
 215                 compatible = "asahi-kasei,ak4613";
 216                 #sound-dai-cells = <0>;
 217                 reg = <0x10>;
 218                 clocks = <&rcar_sound 3>;
 219
 220                 asahi-kasei,in1-single-end;
 221                 asahi-kasei,in2-single-end;
 222                 asahi-kasei,out1-single-end;
 223                 asahi-kasei,out2-single-end;
 224                 asahi-kasei,out3-single-end;
 225                 asahi-kasei,out4-single-end;
 226                 asahi-kasei,out5-single-end;
 227                 asahi-kasei,out6-single-end;
 228
 229                 port {
 230                         ak4613_endpoint: endpoint {
 231                                 remote-endpoint = <&rsnd_for_ak4613>;
 232                         };
 233                 };
 234         };
 235
 236         cs2000: clk-multiplier@4f {
 237                 #clock-cells = <0>;
 238                 compatible = "cirrus,cs2000-cp";
 239                 reg = <0x4f>;
 240                 clocks = <&audio_clkout>, <&x12_clk>;
 241                 clock-names = "clk_in", "ref_clk";
 242
 243                 assigned-clocks = <&cs2000>;
 244                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 245         };
 246 };
 247
 248 &i2c4 {
 249         status = "okay";
 250
 251         clock-frequency = <400000>;
 252
 253         versaclock5: clock-generator@6a {
 254                 compatible = "idt,5p49v5925";
 255                 reg = <0x6a>;
 256                 #clock-cells = <1>;
 257                 clocks = <&x23_clk>;
 258                 clock-names = "xin";
 259         };
 260 };
 261
 262 &i2c_dvfs {
 263         status = "okay";
 264
 265         clock-frequency = <400000>;
 266
 267         pmic: pmic@30 {
 268                 pinctrl-0 = <&irq0_pins>;
 269                 pinctrl-names = "default";
 270
 271                 compatible = "rohm,bd9571mwv";
 272                 reg = <0x30>;
 273                 interrupt-parent = <&intc_ex>;
 274                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 275                 interrupt-controller;
 276                 #interrupt-cells = <2>;
 277                 gpio-controller;
 278                 #gpio-cells = <2>;
 279                 rohm,ddr-backup-power = <0xf>;
 280                 rohm,rstbmode-pulse;
 281
 282                 regulators {
 283                         dvfs: dvfs {
 284                                 regulator-name = "dvfs";
 285                                 regulator-min-microvolt = <750000>;
 286                                 regulator-max-microvolt = <1030000>;
 287                                 regulator-boot-on;
 288                                 regulator-always-on;
 289                         };
 290                 };
 291         };
 292 };
 293
 294 &ohci1 {
 295         status = "okay";
 296 };
 297
 298 &pfc {
 299         pinctrl-0 = <&scif_clk_pins>;
 300         pinctrl-names = "default";
 301
 302         avb_pins: avb {
 303                 mux {
 304                         groups = "avb_link", "avb_mdio", "avb_mii";
 305                         function = "avb";
 306                 };
 307
 308                 pins_mdio {
 309                         groups = "avb_mdio";
 310                         drive-strength = <24>;
 311                 };
 312
 313                 pins_mii_tx {
 314                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 315                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 316                         drive-strength = <12>;
 317                 };
 318         };
 319
 320         i2c2_pins: i2c2 {
 321                 groups = "i2c2_a";
 322                 function = "i2c2";
 323         };
 324
 325         irq0_pins: irq0 {
 326                 groups = "intc_ex_irq0";
 327                 function = "intc_ex";
 328         };
 329
 330         scif2_pins: scif2 {
 331                 groups = "scif2_data_a";
 332                 function = "scif2";
 333         };
 334
 335         scif_clk_pins: scif_clk {
 336                 groups = "scif_clk_a";
 337                 function = "scif_clk";
 338         };
 339
 340         sdhi0_pins: sd0 {
 341                 groups = "sdhi0_data4", "sdhi0_ctrl";
 342                 function = "sdhi0";
 343                 power-source = <3300>;
 344         };
 345
 346         sdhi0_pins_uhs: sd0_uhs {
 347                 groups = "sdhi0_data4", "sdhi0_ctrl";
 348                 function = "sdhi0";
 349                 power-source = <1800>;
 350         };
 351
 352         sdhi2_pins: sd2 {
 353                 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
 354                 function = "sdhi2";
 355                 power-source = <1800>;
 356         };
 357
 358         sound_pins: sound {
 359                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 360                 function = "ssi";
 361         };
 362
 363         sound_clk_pins: sound-clk {
 364                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 365                          "audio_clkout_a", "audio_clkout3_a";
 366                 function = "audio_clk";
 367         };
 368
 369         usb1_pins: usb1 {
 370                 groups = "usb1";
 371                 function = "usb1";
 372         };
 373 };
 374
 375 &rcar_sound {
 376         pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
 377         pinctrl-names = "default";
 378
 379         /* Single DAI */
 380         #sound-dai-cells = <0>;
 381
 382         /* audio_clkout0/1/2/3 */
 383         #clock-cells = <1>;
 384         clock-frequency = <12288000 11289600>;
 385
 386         status = "okay";
 387
 388         /* update <audio_clk_b> to <cs2000> */
 389         clocks = <&cpg CPG_MOD 1005>,
 390                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 391                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 392                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 393                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 394                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 395                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 396                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 397                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 398                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 399                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 400                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 401                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 402                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 403                  <&audio_clk_a>, <&cs2000>,
 404                  <&audio_clk_c>,
 405                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
 406
 407         ports {
 408                 #address-cells = <1>;
 409                 #size-cells = <0>;
 410                 rsnd_port0: port@0 {
 411                         reg = <0>;
 412                         rsnd_for_ak4613: endpoint {
 413                                 remote-endpoint = <&ak4613_endpoint>;
 414
 415                                 dai-format = "left_j";
 416                                 bitclock-master = <&rsnd_for_ak4613>;
 417                                 frame-master = <&rsnd_for_ak4613>;
 418
 419                                 playback = <&ssi0>, <&src0>, <&dvc0>;
 420                                 capture  = <&ssi1>, <&src1>, <&dvc1>;
 421                         };
 422                 };
 423                 rsnd_port1: port@1 {
 424                         reg = <1>;
 425                         rsnd_for_hdmi: endpoint {
 426                                 remote-endpoint = <&dw_hdmi0_snd_in>;
 427
 428                                 dai-format = "i2s";
 429                                 bitclock-master = <&rsnd_for_hdmi>;
 430                                 frame-master = <&rsnd_for_hdmi>;
 431
 432                                 playback = <&ssi2>;
 433                         };
 434                 };
 435         };
 436 };
 437
 438 &rwdt {
 439         timeout-sec = <60>;
 440         status = "okay";
 441 };
 442
 443 &scif2 {
 444         pinctrl-0 = <&scif2_pins>;
 445         pinctrl-names = "default";
 446
 447         status = "okay";
 448 };
 449
 450 &scif_clk {
 451         clock-frequency = <14745600>;
 452 };
 453
 454 &sdhi0 {
 455         pinctrl-0 = <&sdhi0_pins>;
 456         pinctrl-1 = <&sdhi0_pins_uhs>;
 457         pinctrl-names = "default", "state_uhs";
 458
 459         vmmc-supply = <&vcc_sdhi0>;
 460         vqmmc-supply = <&vccq_sdhi0>;
 461         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 462         bus-width = <4>;
 463         sd-uhs-sdr50;
 464         sd-uhs-sdr104;
 465         status = "okay";
 466 };
 467
 468 &sdhi2 {
 469         /* used for on-board 8bit eMMC */
 470         pinctrl-0 = <&sdhi2_pins>;
 471         pinctrl-1 = <&sdhi2_pins>;
 472         pinctrl-names = "default", "state_uhs";
 473
 474         vmmc-supply = <&reg_3p3v>;
 475         vqmmc-supply = <&reg_1p8v>;
 476         bus-width = <8>;
 477         mmc-hs200-1_8v;
 478         mmc-hs400-1_8v;
 479         no-sd;
 480         no-sdio;
 481         non-removable;
 482         full-pwr-cycle-in-suspend;
 483         status = "okay";
 484 };
 485
 486 &ssi1 {
 487         shared-pin;
 488 };
 489
 490 &usb2_phy1 {
 491         pinctrl-0 = <&usb1_pins>;
 492         pinctrl-names = "default";
 493
 494         status = "okay";
 495 };