arch/arm64/boot/dts/renesas/ulcb.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car Gen3 ULCB board
   4  *
   5  * Copyright (C) 2016 Renesas Electronics Corp.
   6  * Copyright (C) 2016 Cogent Embedded, Inc.
   7  */
   8
   9 /*
  10  * SSI-AK4613
  11  *      aplay   -D plughw:0,0 xxx.wav
  12  *      arecord -D plughw:0,0 xxx.wav
  13  * SSI-HDMI
  14  *      aplay   -D plughw:0,1 xxx.wav
  15  */
  16
  17 #include <dt-bindings/gpio/gpio.h>
  18 #include <dt-bindings/input/input.h>
  19
  20 / {
  21         model = "Renesas R-Car Gen3 ULCB board";
  22
  23         aliases {
  24                 serial0 = &scif2;
  25                 ethernet0 = &avb;
  26                 mmc0 = &sdhi2;
  27                 mmc1 = &sdhi0;
  28         };
  29
  30         chosen {
  31                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  32                 stdout-path = "serial0:115200n8";
  33         };
  34
  35         audio_clkout: audio-clkout {
  36                 /*
  37                  * This is same as <&rcar_sound 0>
  38                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  39                  */
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 clock-frequency = <12288000>;
  43         };
  44
  45         hdmi0-out {
  46                 compatible = "hdmi-connector";
  47                 type = "a";
  48
  49                 port {
  50                         hdmi0_con: endpoint {
  51                         };
  52                 };
  53         };
  54
  55         keyboard {
  56                 compatible = "gpio-keys";
  57
  58                 key-1 {
  59                         linux,code = <KEY_1>;
  60                         label = "SW3";
  61                         wakeup-source;
  62                         debounce-interval = <20>;
  63                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  64                 };
  65         };
  66
  67         leds {
  68                 compatible = "gpio-leds";
  69
  70                 led5 {
  71                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  72                 };
  73                 led6 {
  74                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  75                 };
  76         };
  77
  78         reg_1p8v: regulator0 {
  79                 compatible = "regulator-fixed";
  80                 regulator-name = "fixed-1.8V";
  81                 regulator-min-microvolt = <1800000>;
  82                 regulator-max-microvolt = <1800000>;
  83                 regulator-boot-on;
  84                 regulator-always-on;
  85         };
  86
  87         reg_3p3v: regulator1 {
  88                 compatible = "regulator-fixed";
  89                 regulator-name = "fixed-3.3V";
  90                 regulator-min-microvolt = <3300000>;
  91                 regulator-max-microvolt = <3300000>;
  92                 regulator-boot-on;
  93                 regulator-always-on;
  94         };
  95
  96         sound_card: sound {
  97                 compatible = "audio-graph-card";
  98                 label = "rcar-sound";
  99
 100                 dais = <&rsnd_port0     /* ak4613 */
 101                         &rsnd_port1     /* HDMI0  */
 102                         >;
 103         };
 104
 105         vcc_sdhi0: regulator-vcc-sdhi0 {
 106                 compatible = "regulator-fixed";
 107
 108                 regulator-name = "SDHI0 Vcc";
 109                 regulator-min-microvolt = <3300000>;
 110                 regulator-max-microvolt = <3300000>;
 111
 112                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 113                 enable-active-high;
 114         };
 115
 116         vccq_sdhi0: regulator-vccq-sdhi0 {
 117                 compatible = "regulator-gpio";
 118
 119                 regulator-name = "SDHI0 VccQ";
 120                 regulator-min-microvolt = <1800000>;
 121                 regulator-max-microvolt = <3300000>;
 122
 123                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 124                 gpios-states = <1>;
 125                 states = <3300000 1>, <1800000 0>;
 126         };
 127
 128         x12_clk: x12 {
 129                 compatible = "fixed-clock";
 130                 #clock-cells = <0>;
 131                 clock-frequency = <24576000>;
 132         };
 133
 134         x23_clk: x23-clock {
 135                 compatible = "fixed-clock";
 136                 #clock-cells = <0>;
 137                 clock-frequency = <25000000>;
 138         };
 139 };
 140
 141 &a57_0 {
 142         cpu-supply = <&dvfs>;
 143 };
 144
 145 &audio_clk_a {
 146         clock-frequency = <22579200>;
 147 };
 148
 149 &avb {
 150         pinctrl-0 = <&avb_pins>;
 151         pinctrl-names = "default";
 152         phy-handle = <&phy0>;
 153         tx-internal-delay-ps = <2000>;
 154         status = "okay";
 155
 156         phy0: ethernet-phy@0 {
 157                 rxc-skew-ps = <1500>;
 158                 reg = <0>;
 159                 interrupt-parent = <&gpio2>;
 160                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 161                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 162         };
 163 };
 164
 165 &du {
 166         status = "okay";
 167 };
 168
 169 &ehci1 {
 170         status = "okay";
 171 };
 172
 173 &extal_clk {
 174         clock-frequency = <16666666>;
 175 };
 176
 177 &extalr_clk {
 178         clock-frequency = <32768>;
 179 };
 180
 181 &hdmi0 {
 182         status = "okay";
 183
 184         ports {
 185                 port@1 {
 186                         reg = <1>;
 187                         rcar_dw_hdmi0_out: endpoint {
 188                                 remote-endpoint = <&hdmi0_con>;
 189                         };
 190                 };
 191                 port@2 {
 192                         reg = <2>;
 193                         dw_hdmi0_snd_in: endpoint {
 194                                 remote-endpoint = <&rsnd_for_hdmi>;
 195                         };
 196                 };
 197         };
 198 };
 199
 200 &hdmi0_con {
 201         remote-endpoint = <&rcar_dw_hdmi0_out>;
 202 };
 203
 204 &i2c2 {
 205         pinctrl-0 = <&i2c2_pins>;
 206         pinctrl-names = "default";
 207
 208         status = "okay";
 209
 210         clock-frequency = <100000>;
 211
 212         ak4613: codec@10 {
 213                 compatible = "asahi-kasei,ak4613";
 214                 #sound-dai-cells = <0>;
 215                 reg = <0x10>;
 216                 clocks = <&rcar_sound 3>;
 217
 218                 asahi-kasei,in1-single-end;
 219                 asahi-kasei,in2-single-end;
 220                 asahi-kasei,out1-single-end;
 221                 asahi-kasei,out2-single-end;
 222                 asahi-kasei,out3-single-end;
 223                 asahi-kasei,out4-single-end;
 224                 asahi-kasei,out5-single-end;
 225                 asahi-kasei,out6-single-end;
 226
 227                 port {
 228                         ak4613_endpoint: endpoint {
 229                                 remote-endpoint = <&rsnd_for_ak4613>;
 230                         };
 231                 };
 232         };
 233
 234         cs2000: clk-multiplier@4f {
 235                 #clock-cells = <0>;
 236                 compatible = "cirrus,cs2000-cp";
 237                 reg = <0x4f>;
 238                 clocks = <&audio_clkout>, <&x12_clk>;
 239                 clock-names = "clk_in", "ref_clk";
 240
 241                 assigned-clocks = <&cs2000>;
 242                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 243         };
 244 };
 245
 246 &i2c4 {
 247         status = "okay";
 248
 249         clock-frequency = <400000>;
 250
 251         versaclock5: clock-generator@6a {
 252                 compatible = "idt,5p49v5925";
 253                 reg = <0x6a>;
 254                 #clock-cells = <1>;
 255                 clocks = <&x23_clk>;
 256                 clock-names = "xin";
 257         };
 258 };
 259
 260 &i2c_dvfs {
 261         status = "okay";
 262
 263         clock-frequency = <400000>;
 264
 265         pmic: pmic@30 {
 266                 pinctrl-0 = <&irq0_pins>;
 267                 pinctrl-names = "default";
 268
 269                 compatible = "rohm,bd9571mwv";
 270                 reg = <0x30>;
 271                 interrupt-parent = <&intc_ex>;
 272                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 273                 interrupt-controller;
 274                 #interrupt-cells = <2>;
 275                 gpio-controller;
 276                 #gpio-cells = <2>;
 277                 rohm,ddr-backup-power = <0xf>;
 278                 rohm,rstbmode-pulse;
 279
 280                 regulators {
 281                         dvfs: dvfs {
 282                                 regulator-name = "dvfs";
 283                                 regulator-min-microvolt = <750000>;
 284                                 regulator-max-microvolt = <1030000>;
 285                                 regulator-boot-on;
 286                                 regulator-always-on;
 287                         };
 288                 };
 289         };
 290 };
 291
 292 &ohci1 {
 293         status = "okay";
 294 };
 295
 296 &pfc {
 297         pinctrl-0 = <&scif_clk_pins>;
 298         pinctrl-names = "default";
 299
 300         avb_pins: avb {
 301                 mux {
 302                         groups = "avb_link", "avb_mdio", "avb_mii";
 303                         function = "avb";
 304                 };
 305
 306                 pins_mdio {
 307                         groups = "avb_mdio";
 308                         drive-strength = <24>;
 309                 };
 310
 311                 pins_mii_tx {
 312                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 313                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 314                         drive-strength = <12>;
 315                 };
 316         };
 317
 318         i2c2_pins: i2c2 {
 319                 groups = "i2c2_a";
 320                 function = "i2c2";
 321         };
 322
 323         irq0_pins: irq0 {
 324                 groups = "intc_ex_irq0";
 325                 function = "intc_ex";
 326         };
 327
 328         scif2_pins: scif2 {
 329                 groups = "scif2_data_a";
 330                 function = "scif2";
 331         };
 332
 333         scif_clk_pins: scif_clk {
 334                 groups = "scif_clk_a";
 335                 function = "scif_clk";
 336         };
 337
 338         sdhi0_pins: sd0 {
 339                 groups = "sdhi0_data4", "sdhi0_ctrl";
 340                 function = "sdhi0";
 341                 power-source = <3300>;
 342         };
 343
 344         sdhi0_pins_uhs: sd0_uhs {
 345                 groups = "sdhi0_data4", "sdhi0_ctrl";
 346                 function = "sdhi0";
 347                 power-source = <1800>;
 348         };
 349
 350         sdhi2_pins: sd2 {
 351                 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
 352                 function = "sdhi2";
 353                 power-source = <1800>;
 354         };
 355
 356         sound_pins: sound {
 357                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 358                 function = "ssi";
 359         };
 360
 361         sound_clk_pins: sound-clk {
 362                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 363                          "audio_clkout_a", "audio_clkout3_a";
 364                 function = "audio_clk";
 365         };
 366
 367         usb1_pins: usb1 {
 368                 groups = "usb1";
 369                 function = "usb1";
 370         };
 371 };
 372
 373 &rcar_sound {
 374         pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
 375         pinctrl-names = "default";
 376
 377         /* Single DAI */
 378         #sound-dai-cells = <0>;
 379
 380         /* audio_clkout0/1/2/3 */
 381         #clock-cells = <1>;
 382         clock-frequency = <12288000 11289600>;
 383
 384         status = "okay";
 385
 386         /* update <audio_clk_b> to <cs2000> */
 387         clocks = <&cpg CPG_MOD 1005>,
 388                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 389                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 390                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 391                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 392                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 393                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 394                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 395                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 396                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 397                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 398                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 399                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 400                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 401                  <&audio_clk_a>, <&cs2000>,
 402                  <&audio_clk_c>,
 403                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
 404
 405         ports {
 406                 #address-cells = <1>;
 407                 #size-cells = <0>;
 408                 rsnd_port0: port@0 {
 409                         reg = <0>;
 410                         rsnd_for_ak4613: endpoint {
 411                                 remote-endpoint = <&ak4613_endpoint>;
 412
 413                                 dai-format = "left_j";
 414                                 bitclock-master = <&rsnd_for_ak4613>;
 415                                 frame-master = <&rsnd_for_ak4613>;
 416
 417                                 playback = <&ssi0>, <&src0>, <&dvc0>;
 418                                 capture  = <&ssi1>, <&src1>, <&dvc1>;
 419                         };
 420                 };
 421                 rsnd_port1: port@1 {
 422                         reg = <1>;
 423                         rsnd_for_hdmi: endpoint {
 424                                 remote-endpoint = <&dw_hdmi0_snd_in>;
 425
 426                                 dai-format = "i2s";
 427                                 bitclock-master = <&rsnd_for_hdmi>;
 428                                 frame-master = <&rsnd_for_hdmi>;
 429
 430                                 playback = <&ssi2>;
 431                         };
 432                 };
 433         };
 434 };
 435
 436 &rwdt {
 437         timeout-sec = <60>;
 438         status = "okay";
 439 };
 440
 441 &scif2 {
 442         pinctrl-0 = <&scif2_pins>;
 443         pinctrl-names = "default";
 444
 445         status = "okay";
 446 };
 447
 448 &scif_clk {
 449         clock-frequency = <14745600>;
 450 };
 451
 452 &sdhi0 {
 453         pinctrl-0 = <&sdhi0_pins>;
 454         pinctrl-1 = <&sdhi0_pins_uhs>;
 455         pinctrl-names = "default", "state_uhs";
 456
 457         vmmc-supply = <&vcc_sdhi0>;
 458         vqmmc-supply = <&vccq_sdhi0>;
 459         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 460         bus-width = <4>;
 461         sd-uhs-sdr50;
 462         sd-uhs-sdr104;
 463         status = "okay";
 464 };
 465
 466 &sdhi2 {
 467         /* used for on-board 8bit eMMC */
 468         pinctrl-0 = <&sdhi2_pins>;
 469         pinctrl-1 = <&sdhi2_pins>;
 470         pinctrl-names = "default", "state_uhs";
 471
 472         vmmc-supply = <&reg_3p3v>;
 473         vqmmc-supply = <&reg_1p8v>;
 474         bus-width = <8>;
 475         mmc-hs200-1_8v;
 476         mmc-hs400-1_8v;
 477         no-sd;
 478         no-sdio;
 479         non-removable;
 480         full-pwr-cycle-in-suspend;
 481         status = "okay";
 482 };
 483
 484 &ssi1 {
 485         shared-pin;
 486 };
 487
 488 &usb2_phy1 {
 489         pinctrl-0 = <&usb1_pins>;
 490         pinctrl-names = "default";
 491
 492         status = "okay";
 493 };