1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC
5 * Copyright (C) 2020 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779a0-sysc.h>
13 compatible = "renesas,r8a779a0";
32 compatible = "arm,cortex-a76";
35 power-domains = <&sysc R8A779A0_PD_A1E0D0C0>;
36 next-level-cache = <&L3_CA76_0>;
39 L3_CA76_0: cache-controller-0 {
41 power-domains = <&sysc R8A779A0_PD_A2E0D0>;
48 compatible = "fixed-clock";
50 /* This value must be overridden by the board */
51 clock-frequency = <0>;
55 compatible = "fixed-clock";
57 /* This value must be overridden by the board */
58 clock-frequency = <0>;
62 compatible = "arm,cortex-a76-pmu";
63 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
66 /* External SCIF clock - to be overridden by boards that provide it */
68 compatible = "fixed-clock";
70 clock-frequency = <0>;
74 compatible = "simple-bus";
75 interrupt-parent = <&gic>;
80 rwdt: watchdog@e6020000 {
81 compatible = "renesas,r8a779a0-wdt",
82 "renesas,rcar-gen3-wdt";
83 reg = <0 0xe6020000 0 0x0c>;
84 clocks = <&cpg CPG_MOD 907>;
85 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
90 pfc: pin-controller@e6050000 {
91 compatible = "renesas,pfc-r8a779a0";
92 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
93 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
94 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
95 <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>,
96 <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>;
99 gpio0: gpio@e6058180 {
100 compatible = "renesas,gpio-r8a779a0";
101 reg = <0 0xe6058180 0 0x54>;
102 interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>;
103 clocks = <&cpg CPG_MOD 916>;
104 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
108 gpio-ranges = <&pfc 0 0 28>;
109 interrupt-controller;
110 #interrupt-cells = <2>;
113 gpio1: gpio@e6050180 {
114 compatible = "renesas,gpio-r8a779a0";
115 reg = <0 0xe6050180 0 0x54>;
116 interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>;
117 clocks = <&cpg CPG_MOD 915>;
118 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
122 gpio-ranges = <&pfc 0 32 31>;
123 interrupt-controller;
124 #interrupt-cells = <2>;
127 gpio2: gpio@e6050980 {
128 compatible = "renesas,gpio-r8a779a0";
129 reg = <0 0xe6050980 0 0x54>;
130 interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
131 clocks = <&cpg CPG_MOD 915>;
132 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
136 gpio-ranges = <&pfc 0 64 25>;
137 interrupt-controller;
138 #interrupt-cells = <2>;
141 gpio3: gpio@e6058980 {
142 compatible = "renesas,gpio-r8a779a0";
143 reg = <0 0xe6058980 0 0x54>;
144 interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>;
145 clocks = <&cpg CPG_MOD 916>;
146 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
150 gpio-ranges = <&pfc 0 96 17>;
151 interrupt-controller;
152 #interrupt-cells = <2>;
155 gpio4: gpio@e6060180 {
156 compatible = "renesas,gpio-r8a779a0";
157 reg = <0 0xe6060180 0 0x54>;
158 interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
159 clocks = <&cpg CPG_MOD 917>;
160 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
164 gpio-ranges = <&pfc 0 128 27>;
165 interrupt-controller;
166 #interrupt-cells = <2>;
169 gpio5: gpio@e6060980 {
170 compatible = "renesas,gpio-r8a779a0";
171 reg = <0 0xe6060980 0 0x54>;
172 interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>;
173 clocks = <&cpg CPG_MOD 917>;
174 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
178 gpio-ranges = <&pfc 0 160 21>;
179 interrupt-controller;
180 #interrupt-cells = <2>;
183 gpio6: gpio@e6068180 {
184 compatible = "renesas,gpio-r8a779a0";
185 reg = <0 0xe6068180 0 0x54>;
186 interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>;
187 clocks = <&cpg CPG_MOD 918>;
188 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
192 gpio-ranges = <&pfc 0 192 21>;
193 interrupt-controller;
194 #interrupt-cells = <2>;
197 gpio7: gpio@e6068980 {
198 compatible = "renesas,gpio-r8a779a0";
199 reg = <0 0xe6068980 0 0x54>;
200 interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>;
201 clocks = <&cpg CPG_MOD 918>;
202 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
206 gpio-ranges = <&pfc 0 224 21>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
211 gpio8: gpio@e6069180 {
212 compatible = "renesas,gpio-r8a779a0";
213 reg = <0 0xe6069180 0 0x54>;
214 interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>;
215 clocks = <&cpg CPG_MOD 918>;
216 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
220 gpio-ranges = <&pfc 0 256 21>;
221 interrupt-controller;
222 #interrupt-cells = <2>;
225 gpio9: gpio@e6069980 {
226 compatible = "renesas,gpio-r8a779a0";
227 reg = <0 0xe6069980 0 0x54>;
228 interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>;
229 clocks = <&cpg CPG_MOD 918>;
230 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
234 gpio-ranges = <&pfc 0 288 21>;
235 interrupt-controller;
236 #interrupt-cells = <2>;
239 cmt0: timer@e60f0000 {
240 compatible = "renesas,r8a779a0-cmt0",
241 "renesas,rcar-gen3-cmt0";
242 reg = <0 0xe60f0000 0 0x1004>;
243 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
244 <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>;
245 clocks = <&cpg CPG_MOD 910>;
247 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
252 cmt1: timer@e6130000 {
253 compatible = "renesas,r8a779a0-cmt1",
254 "renesas,rcar-gen3-cmt1";
255 reg = <0 0xe6130000 0 0x1004>;
256 interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
257 <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
258 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
259 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
260 <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
261 <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
262 <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
263 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&cpg CPG_MOD 911>;
266 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
271 cmt2: timer@e6140000 {
272 compatible = "renesas,r8a779a0-cmt1",
273 "renesas,rcar-gen3-cmt1";
274 reg = <0 0xe6140000 0 0x1004>;
275 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
276 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
277 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
278 <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
283 clocks = <&cpg CPG_MOD 912>;
285 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
290 cmt3: timer@e6148000 {
291 compatible = "renesas,r8a779a0-cmt1",
292 "renesas,rcar-gen3-cmt1";
293 reg = <0 0xe6148000 0 0x1004>;
294 interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
295 <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
296 <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
297 <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
299 <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
300 <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
301 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>;
302 clocks = <&cpg CPG_MOD 913>;
304 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
309 cpg: clock-controller@e6150000 {
310 compatible = "renesas,r8a779a0-cpg-mssr";
311 reg = <0 0xe6150000 0 0x4000>;
312 clocks = <&extal_clk>, <&extalr_clk>;
313 clock-names = "extal", "extalr";
315 #power-domain-cells = <0>;
319 rst: reset-controller@e6160000 {
320 compatible = "renesas,r8a779a0-rst";
321 reg = <0 0xe6160000 0 0x4000>;
324 sysc: system-controller@e6180000 {
325 compatible = "renesas,r8a779a0-sysc";
326 reg = <0 0xe6180000 0 0x4000>;
327 #power-domain-cells = <1>;
330 tmu0: timer@e61e0000 {
331 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
332 reg = <0 0xe61e0000 0 0x30>;
333 interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
335 <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
336 clocks = <&cpg CPG_MOD 713>;
338 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
343 tmu1: timer@e6fc0000 {
344 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
345 reg = <0 0xe6fc0000 0 0x30>;
346 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
347 <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>,
348 <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
349 clocks = <&cpg CPG_MOD 714>;
351 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
356 tmu2: timer@e6fd0000 {
357 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
358 reg = <0 0xe6fd0000 0 0x30>;
359 interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
360 <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
361 <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>;
362 clocks = <&cpg CPG_MOD 715>;
364 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
369 tmu3: timer@e6fe0000 {
370 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
371 reg = <0 0xe6fe0000 0 0x30>;
372 interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
373 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
374 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
375 clocks = <&cpg CPG_MOD 716>;
377 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
382 tmu4: timer@ffc00000 {
383 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
384 reg = <0 0xffc00000 0 0x30>;
385 interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
386 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&cpg CPG_MOD 717>;
390 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
395 tsc: thermal@e6190000 {
396 compatible = "renesas,r8a779a0-thermal";
397 reg = <0 0xe6190000 0 0x200>,
398 <0 0xe6198000 0 0x200>,
399 <0 0xe61a0000 0 0x200>,
400 <0 0xe61a8000 0 0x200>,
401 <0 0xe61b0000 0 0x200>;
402 clocks = <&cpg CPG_MOD 919>;
403 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
405 #thermal-sensor-cells = <1>;
409 compatible = "renesas,i2c-r8a779a0",
410 "renesas,rcar-gen3-i2c";
411 reg = <0 0xe6500000 0 0x40>;
412 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
413 clocks = <&cpg CPG_MOD 518>;
414 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
416 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
417 dma-names = "tx", "rx";
418 i2c-scl-internal-delay-ns = <110>;
419 #address-cells = <1>;
425 compatible = "renesas,i2c-r8a779a0",
426 "renesas,rcar-gen3-i2c";
427 reg = <0 0xe6508000 0 0x40>;
428 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
429 clocks = <&cpg CPG_MOD 519>;
430 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
432 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
433 dma-names = "tx", "rx";
434 i2c-scl-internal-delay-ns = <110>;
435 #address-cells = <1>;
441 compatible = "renesas,i2c-r8a779a0",
442 "renesas,rcar-gen3-i2c";
443 reg = <0 0xe6510000 0 0x40>;
444 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
445 clocks = <&cpg CPG_MOD 520>;
446 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
448 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
449 dma-names = "tx", "rx";
450 i2c-scl-internal-delay-ns = <110>;
451 #address-cells = <1>;
457 compatible = "renesas,i2c-r8a779a0",
458 "renesas,rcar-gen3-i2c";
459 reg = <0 0xe66d0000 0 0x40>;
460 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
461 clocks = <&cpg CPG_MOD 521>;
462 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
464 dmas = <&dmac1 0x97>, <&dmac1 0x96>;
465 dma-names = "tx", "rx";
466 i2c-scl-internal-delay-ns = <110>;
467 #address-cells = <1>;
473 compatible = "renesas,i2c-r8a779a0",
474 "renesas,rcar-gen3-i2c";
475 reg = <0 0xe66d8000 0 0x40>;
476 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
477 clocks = <&cpg CPG_MOD 522>;
478 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
480 dmas = <&dmac1 0x99>, <&dmac1 0x98>;
481 dma-names = "tx", "rx";
482 i2c-scl-internal-delay-ns = <110>;
483 #address-cells = <1>;
489 compatible = "renesas,i2c-r8a779a0",
490 "renesas,rcar-gen3-i2c";
491 reg = <0 0xe66e0000 0 0x40>;
492 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
493 clocks = <&cpg CPG_MOD 523>;
494 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
496 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>;
497 dma-names = "tx", "rx";
498 i2c-scl-internal-delay-ns = <110>;
499 #address-cells = <1>;
505 compatible = "renesas,i2c-r8a779a0",
506 "renesas,rcar-gen3-i2c";
507 reg = <0 0xe66e8000 0 0x40>;
508 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
509 clocks = <&cpg CPG_MOD 524>;
510 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
512 dmas = <&dmac1 0x9d>, <&dmac1 0x9c>;
513 dma-names = "tx", "rx";
514 i2c-scl-internal-delay-ns = <110>;
515 #address-cells = <1>;
520 hscif0: serial@e6540000 {
521 compatible = "renesas,hscif-r8a779a0",
522 "renesas,rcar-gen3-hscif", "renesas,hscif";
523 reg = <0 0xe6540000 0 0x60>;
524 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 514>,
526 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
528 clock-names = "fck", "brg_int", "scif_clk";
529 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
530 dma-names = "tx", "rx";
531 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
536 hscif1: serial@e6550000 {
537 compatible = "renesas,hscif-r8a779a0",
538 "renesas,rcar-gen3-hscif", "renesas,hscif";
539 reg = <0 0xe6550000 0 0x60>;
540 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
541 clocks = <&cpg CPG_MOD 515>,
542 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
544 clock-names = "fck", "brg_int", "scif_clk";
545 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
546 dma-names = "tx", "rx";
547 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
552 hscif2: serial@e6560000 {
553 compatible = "renesas,hscif-r8a779a0",
554 "renesas,rcar-gen3-hscif", "renesas,hscif";
555 reg = <0 0xe6560000 0 0x60>;
556 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
557 clocks = <&cpg CPG_MOD 516>,
558 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
560 clock-names = "fck", "brg_int", "scif_clk";
561 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
562 dma-names = "tx", "rx";
563 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
568 hscif3: serial@e66a0000 {
569 compatible = "renesas,hscif-r8a779a0",
570 "renesas,rcar-gen3-hscif", "renesas,hscif";
571 reg = <0 0xe66a0000 0 0x60>;
572 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
573 clocks = <&cpg CPG_MOD 517>,
574 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
576 clock-names = "fck", "brg_int", "scif_clk";
577 dmas = <&dmac1 0x37>, <&dmac1 0x36>;
578 dma-names = "tx", "rx";
579 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
584 avb0: ethernet@e6800000 {
585 compatible = "renesas,etheravb-r8a779a0",
586 "renesas,etheravb-rcar-gen3";
587 reg = <0 0xe6800000 0 0x800>;
588 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
589 <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
590 <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
591 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
592 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
593 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
594 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
595 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
596 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
597 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
598 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
599 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
600 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
601 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
602 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
603 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
604 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
605 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
606 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
607 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
608 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
609 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
610 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
611 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
612 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
613 interrupt-names = "ch0", "ch1", "ch2", "ch3",
614 "ch4", "ch5", "ch6", "ch7",
615 "ch8", "ch9", "ch10", "ch11",
616 "ch12", "ch13", "ch14", "ch15",
617 "ch16", "ch17", "ch18", "ch19",
618 "ch20", "ch21", "ch22", "ch23",
620 clocks = <&cpg CPG_MOD 211>;
622 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
625 rx-internal-delay-ps = <0>;
626 tx-internal-delay-ps = <0>;
627 #address-cells = <1>;
632 avb1: ethernet@e6810000 {
633 compatible = "renesas,etheravb-r8a779a0",
634 "renesas,etheravb-rcar-gen3";
635 reg = <0 0xe6810000 0 0x800>;
636 interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
637 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
638 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
639 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
640 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>,
641 <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,
642 <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
643 <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,
644 <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
645 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
646 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>,
647 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
648 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
649 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
650 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
651 <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
652 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
653 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
654 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
655 <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
656 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
657 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
658 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
659 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
660 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
661 interrupt-names = "ch0", "ch1", "ch2", "ch3",
662 "ch4", "ch5", "ch6", "ch7",
663 "ch8", "ch9", "ch10", "ch11",
664 "ch12", "ch13", "ch14", "ch15",
665 "ch16", "ch17", "ch18", "ch19",
666 "ch20", "ch21", "ch22", "ch23",
668 clocks = <&cpg CPG_MOD 212>;
670 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
673 rx-internal-delay-ps = <0>;
674 tx-internal-delay-ps = <0>;
675 #address-cells = <1>;
680 avb2: ethernet@e6820000 {
681 compatible = "renesas,etheravb-r8a779a0",
682 "renesas,etheravb-rcar-gen3";
683 reg = <0 0xe6820000 0 0x1000>;
684 interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
685 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
686 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
687 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
688 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
689 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
690 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
691 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
692 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
693 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
694 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
695 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
696 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
697 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
698 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
699 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
700 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
701 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
702 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
703 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
704 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
705 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
706 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
708 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
709 interrupt-names = "ch0", "ch1", "ch2", "ch3",
710 "ch4", "ch5", "ch6", "ch7",
711 "ch8", "ch9", "ch10", "ch11",
712 "ch12", "ch13", "ch14", "ch15",
713 "ch16", "ch17", "ch18", "ch19",
714 "ch20", "ch21", "ch22", "ch23",
716 clocks = <&cpg CPG_MOD 213>;
718 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
721 rx-internal-delay-ps = <0>;
722 tx-internal-delay-ps = <0>;
723 #address-cells = <1>;
728 avb3: ethernet@e6830000 {
729 compatible = "renesas,etheravb-r8a779a0",
730 "renesas,etheravb-rcar-gen3";
731 reg = <0 0xe6830000 0 0x1000>;
732 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
733 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
734 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
735 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
736 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
737 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
738 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
739 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
740 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
741 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
742 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
743 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
744 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
745 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
746 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
747 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
748 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
754 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
755 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
756 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
757 interrupt-names = "ch0", "ch1", "ch2", "ch3",
758 "ch4", "ch5", "ch6", "ch7",
759 "ch8", "ch9", "ch10", "ch11",
760 "ch12", "ch13", "ch14", "ch15",
761 "ch16", "ch17", "ch18", "ch19",
762 "ch20", "ch21", "ch22", "ch23",
764 clocks = <&cpg CPG_MOD 214>;
766 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
769 rx-internal-delay-ps = <0>;
770 tx-internal-delay-ps = <0>;
771 #address-cells = <1>;
776 avb4: ethernet@e6840000 {
777 compatible = "renesas,etheravb-r8a779a0",
778 "renesas,etheravb-rcar-gen3";
779 reg = <0 0xe6840000 0 0x1000>;
780 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
781 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
782 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
783 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
784 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
785 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
786 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
787 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
789 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
790 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
791 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
792 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
793 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
794 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
795 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
796 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
797 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,
798 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
799 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
800 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
801 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>;
805 interrupt-names = "ch0", "ch1", "ch2", "ch3",
806 "ch4", "ch5", "ch6", "ch7",
807 "ch8", "ch9", "ch10", "ch11",
808 "ch12", "ch13", "ch14", "ch15",
809 "ch16", "ch17", "ch18", "ch19",
810 "ch20", "ch21", "ch22", "ch23",
812 clocks = <&cpg CPG_MOD 215>;
814 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
817 rx-internal-delay-ps = <0>;
818 tx-internal-delay-ps = <0>;
819 #address-cells = <1>;
824 avb5: ethernet@e6850000 {
825 compatible = "renesas,etheravb-r8a779a0",
826 "renesas,etheravb-rcar-gen3";
827 reg = <0 0xe6850000 0 0x1000>;
828 interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
829 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
830 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
831 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
832 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
833 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
834 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
835 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
836 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
837 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
838 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
839 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
840 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
841 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
842 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
843 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
844 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
845 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
846 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
847 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
848 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
849 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
850 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
851 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
852 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
853 interrupt-names = "ch0", "ch1", "ch2", "ch3",
854 "ch4", "ch5", "ch6", "ch7",
855 "ch8", "ch9", "ch10", "ch11",
856 "ch12", "ch13", "ch14", "ch15",
857 "ch16", "ch17", "ch18", "ch19",
858 "ch20", "ch21", "ch22", "ch23",
860 clocks = <&cpg CPG_MOD 216>;
862 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
865 rx-internal-delay-ps = <0>;
866 tx-internal-delay-ps = <0>;
867 #address-cells = <1>;
872 scif0: serial@e6e60000 {
873 compatible = "renesas,scif-r8a779a0",
874 "renesas,rcar-gen3-scif", "renesas,scif";
875 reg = <0 0xe6e60000 0 64>;
876 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
877 clocks = <&cpg CPG_MOD 702>,
878 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
880 clock-names = "fck", "brg_int", "scif_clk";
881 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
882 dma-names = "tx", "rx";
883 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
888 scif1: serial@e6e68000 {
889 compatible = "renesas,scif-r8a779a0",
890 "renesas,rcar-gen3-scif", "renesas,scif";
891 reg = <0 0xe6e68000 0 64>;
892 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
893 clocks = <&cpg CPG_MOD 703>,
894 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
896 clock-names = "fck", "brg_int", "scif_clk";
897 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
898 dma-names = "tx", "rx";
899 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
904 scif3: serial@e6c50000 {
905 compatible = "renesas,scif-r8a779a0",
906 "renesas,rcar-gen3-scif", "renesas,scif";
907 reg = <0 0xe6c50000 0 64>;
908 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
909 clocks = <&cpg CPG_MOD 704>,
910 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
912 clock-names = "fck", "brg_int", "scif_clk";
913 dmas = <&dmac1 0x57>, <&dmac1 0x56>;
914 dma-names = "tx", "rx";
915 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
920 scif4: serial@e6c40000 {
921 compatible = "renesas,scif-r8a779a0",
922 "renesas,rcar-gen3-scif", "renesas,scif";
923 reg = <0 0xe6c40000 0 64>;
924 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
925 clocks = <&cpg CPG_MOD 705>,
926 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
928 clock-names = "fck", "brg_int", "scif_clk";
929 dmas = <&dmac1 0x59>, <&dmac1 0x58>;
930 dma-names = "tx", "rx";
931 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
936 msiof0: spi@e6e90000 {
937 compatible = "renesas,msiof-r8a779a0",
938 "renesas,rcar-gen3-msiof";
939 reg = <0 0xe6e90000 0 0x0064>;
940 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
941 clocks = <&cpg CPG_MOD 618>;
942 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
944 dmas = <&dmac1 0x41>, <&dmac1 0x40>;
945 dma-names = "tx", "rx";
946 #address-cells = <1>;
951 msiof1: spi@e6ea0000 {
952 compatible = "renesas,msiof-r8a779a0",
953 "renesas,rcar-gen3-msiof";
954 reg = <0 0xe6ea0000 0 0x0064>;
955 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
956 clocks = <&cpg CPG_MOD 619>;
957 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
959 dmas = <&dmac1 0x43>, <&dmac1 0x42>;
960 dma-names = "tx", "rx";
961 #address-cells = <1>;
966 msiof2: spi@e6c00000 {
967 compatible = "renesas,msiof-r8a779a0",
968 "renesas,rcar-gen3-msiof";
969 reg = <0 0xe6c00000 0 0x0064>;
970 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
971 clocks = <&cpg CPG_MOD 620>;
972 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
974 dmas = <&dmac1 0x45>, <&dmac1 0x44>;
975 dma-names = "tx", "rx";
976 #address-cells = <1>;
981 msiof3: spi@e6c10000 {
982 compatible = "renesas,msiof-r8a779a0",
983 "renesas,rcar-gen3-msiof";
984 reg = <0 0xe6c10000 0 0x0064>;
985 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
986 clocks = <&cpg CPG_MOD 621>;
987 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
989 dmas = <&dmac1 0x47>, <&dmac1 0x46>;
990 dma-names = "tx", "rx";
991 #address-cells = <1>;
996 msiof4: spi@e6c20000 {
997 compatible = "renesas,msiof-r8a779a0",
998 "renesas,rcar-gen3-msiof";
999 reg = <0 0xe6c20000 0 0x0064>;
1000 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
1001 clocks = <&cpg CPG_MOD 622>;
1002 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1003 resets = <&cpg 622>;
1004 dmas = <&dmac1 0x49>, <&dmac1 0x48>;
1005 dma-names = "tx", "rx";
1006 #address-cells = <1>;
1008 status = "disabled";
1011 msiof5: spi@e6c28000 {
1012 compatible = "renesas,msiof-r8a779a0",
1013 "renesas,rcar-gen3-msiof";
1014 reg = <0 0xe6c28000 0 0x0064>;
1015 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
1016 clocks = <&cpg CPG_MOD 623>;
1017 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1018 resets = <&cpg 623>;
1019 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>;
1020 dma-names = "tx", "rx";
1021 #address-cells = <1>;
1023 status = "disabled";
1026 dmac1: dma-controller@e7350000 {
1027 compatible = "renesas,dmac-r8a779a0";
1028 reg = <0 0xe7350000 0 0x1000>,
1029 <0 0xe7300000 0 0x10000>;
1030 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1040 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1041 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1042 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1043 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1044 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1045 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1046 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1047 interrupt-names = "error",
1048 "ch0", "ch1", "ch2", "ch3", "ch4",
1049 "ch5", "ch6", "ch7", "ch8", "ch9",
1050 "ch10", "ch11", "ch12", "ch13",
1052 clocks = <&cpg CPG_MOD 709>;
1053 clock-names = "fck";
1054 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1055 resets = <&cpg 709>;
1057 dma-channels = <16>;
1060 dmac2: dma-controller@e7351000 {
1061 compatible = "renesas,dmac-r8a779a0";
1062 reg = <0 0xe7351000 0 0x1000>,
1063 <0 0xe7310000 0 0x10000>;
1064 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
1065 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1066 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1067 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1068 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1069 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1070 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1071 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1072 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
1073 interrupt-names = "error",
1074 "ch0", "ch1", "ch2", "ch3", "ch4",
1075 "ch5", "ch6", "ch7";
1076 clocks = <&cpg CPG_MOD 710>;
1077 clock-names = "fck";
1078 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1079 resets = <&cpg 710>;
1084 mmc0: mmc@ee140000 {
1085 compatible = "renesas,sdhi-r8a779a0",
1086 "renesas,rcar-gen3-sdhi";
1087 reg = <0 0xee140000 0 0x2000>;
1088 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
1089 clocks = <&cpg CPG_MOD 706>;
1090 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1091 resets = <&cpg 706>;
1092 max-frequency = <200000000>;
1093 status = "disabled";
1096 gic: interrupt-controller@f1000000 {
1097 compatible = "arm,gic-v3";
1098 #interrupt-cells = <3>;
1099 #address-cells = <0>;
1100 interrupt-controller;
1101 reg = <0x0 0xf1000000 0 0x20000>,
1102 <0x0 0xf1060000 0 0x110000>;
1103 interrupts = <GIC_PPI 9
1104 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
1107 fcpvd0: fcp@fea10000 {
1108 compatible = "renesas,fcpv";
1109 reg = <0 0xfea10000 0 0x200>;
1110 clocks = <&cpg CPG_MOD 508>;
1111 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1112 resets = <&cpg 508>;
1115 fcpvd1: fcp@fea11000 {
1116 compatible = "renesas,fcpv";
1117 reg = <0 0xfea11000 0 0x200>;
1118 clocks = <&cpg CPG_MOD 509>;
1119 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1120 resets = <&cpg 509>;
1123 vspd0: vsp@fea20000 {
1124 compatible = "renesas,vsp2";
1125 reg = <0 0xfea20000 0 0x5000>;
1126 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
1127 clocks = <&cpg CPG_MOD 830>;
1128 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1129 resets = <&cpg 830>;
1131 renesas,fcp = <&fcpvd0>;
1134 vspd1: vsp@fea28000 {
1135 compatible = "renesas,vsp2";
1136 reg = <0 0xfea28000 0 0x5000>;
1137 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
1138 clocks = <&cpg CPG_MOD 831>;
1139 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1140 resets = <&cpg 831>;
1142 renesas,fcp = <&fcpvd1>;
1145 prr: chipid@fff00044 {
1146 compatible = "renesas,prr";
1147 reg = <0 0xfff00044 0 4>;
1152 sensor_thermal1: sensor-thermal1 {
1153 polling-delay-passive = <250>;
1154 polling-delay = <1000>;
1155 thermal-sensors = <&tsc 0>;
1158 sensor1_crit: sensor1-crit {
1159 temperature = <120000>;
1160 hysteresis = <1000>;
1166 sensor_thermal2: sensor-thermal2 {
1167 polling-delay-passive = <250>;
1168 polling-delay = <1000>;
1169 thermal-sensors = <&tsc 1>;
1172 sensor2_crit: sensor2-crit {
1173 temperature = <120000>;
1174 hysteresis = <1000>;
1180 sensor_thermal3: sensor-thermal3 {
1181 polling-delay-passive = <250>;
1182 polling-delay = <1000>;
1183 thermal-sensors = <&tsc 2>;
1186 sensor3_crit: sensor3-crit {
1187 temperature = <120000>;
1188 hysteresis = <1000>;
1194 sensor_thermal4: sensor-thermal4 {
1195 polling-delay-passive = <250>;
1196 polling-delay = <1000>;
1197 thermal-sensors = <&tsc 3>;
1200 sensor4_crit: sensor4-crit {
1201 temperature = <120000>;
1202 hysteresis = <1000>;
1208 sensor_thermal5: sensor-thermal5 {
1209 polling-delay-passive = <250>;
1210 polling-delay = <1000>;
1211 thermal-sensors = <&tsc 4>;
1214 sensor5_crit: sensor5-crit {
1215 temperature = <120000>;
1216 hysteresis = <1000>;
1224 compatible = "arm,armv8-timer";
1225 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1226 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1227 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1228 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;