arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Falcon CPU board
   4  *
   5  * Copyright (C) 2020 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include "r8a779a0.dtsi"
  10
  11 / {
  12         model = "Renesas Falcon CPU board";
  13         compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
  14
  15         aliases {
  16                 serial0 = &scif0;
  17         };
  18
  19         chosen {
  20                 stdout-path = "serial0:115200n8";
  21         };
  22
  23         memory@48000000 {
  24                 device_type = "memory";
  25                 /* first 128MB is reserved for secure area. */
  26                 reg = <0x0 0x48000000 0x0 0x78000000>;
  27         };
  28
  29         memory@500000000 {
  30                 device_type = "memory";
  31                 reg = <0x5 0x00000000 0x0 0x80000000>;
  32         };
  33
  34         memory@600000000 {
  35                 device_type = "memory";
  36                 reg = <0x6 0x00000000 0x0 0x80000000>;
  37         };
  38
  39         memory@700000000 {
  40                 device_type = "memory";
  41                 reg = <0x7 0x00000000 0x0 0x80000000>;
  42         };
  43
  44         reg_1p8v: regulator-1p8v {
  45                 compatible = "regulator-fixed";
  46                 regulator-name = "fixed-1.8V";
  47                 regulator-min-microvolt = <1800000>;
  48                 regulator-max-microvolt = <1800000>;
  49                 regulator-boot-on;
  50                 regulator-always-on;
  51         };
  52
  53         reg_3p3v: regulator-3p3v {
  54                 compatible = "regulator-fixed";
  55                 regulator-name = "fixed-3.3V";
  56                 regulator-min-microvolt = <3300000>;
  57                 regulator-max-microvolt = <3300000>;
  58                 regulator-boot-on;
  59                 regulator-always-on;
  60         };
  61 };
  62
  63 &extal_clk {
  64         clock-frequency = <16666666>;
  65 };
  66
  67 &extalr_clk {
  68         clock-frequency = <32768>;
  69 };
  70
  71 &i2c0 {
  72         pinctrl-0 = <&i2c0_pins>;
  73         pinctrl-names = "default";
  74
  75         status = "okay";
  76         clock-frequency = <400000>;
  77
  78         eeprom@50 {
  79                 compatible = "rohm,br24g01", "atmel,24c01";
  80                 label = "cpu-board";
  81                 reg = <0x50>;
  82                 pagesize = <8>;
  83         };
  84 };
  85
  86 &i2c1 {
  87         pinctrl-0 = <&i2c1_pins>;
  88         pinctrl-names = "default";
  89
  90         status = "okay";
  91         clock-frequency = <400000>;
  92 };
  93
  94 &i2c6 {
  95         pinctrl-0 = <&i2c6_pins>;
  96         pinctrl-names = "default";
  97
  98         status = "okay";
  99         clock-frequency = <400000>;
 100 };
 101
 102 &mmc0 {
 103         pinctrl-0 = <&mmc_pins>;
 104         pinctrl-1 = <&mmc_pins>;
 105         pinctrl-names = "default", "state_uhs";
 106
 107         vmmc-supply = <&reg_3p3v>;
 108         vqmmc-supply = <&reg_1p8v>;
 109         mmc-hs200-1_8v;
 110         mmc-hs400-1_8v;
 111         bus-width = <8>;
 112         no-sd;
 113         no-sdio;
 114         non-removable;
 115         full-pwr-cycle-in-suspend;
 116         status = "okay";
 117 };
 118
 119 &pfc {
 120         pinctrl-0 = <&scif_clk_pins>;
 121         pinctrl-names = "default";
 122
 123         i2c0_pins: i2c0 {
 124                 groups = "i2c0";
 125                 function = "i2c0";
 126         };
 127
 128         i2c1_pins: i2c1 {
 129                 groups = "i2c1";
 130                 function = "i2c1";
 131         };
 132
 133         i2c6_pins: i2c6 {
 134                 groups = "i2c6";
 135                 function = "i2c6";
 136         };
 137
 138         mmc_pins: mmc {
 139                 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
 140                 function = "mmc";
 141                 power-source = <1800>;
 142         };
 143
 144         scif0_pins: scif0 {
 145                 groups = "scif0_data", "scif0_ctrl";
 146                 function = "scif0";
 147         };
 148
 149         scif_clk_pins: scif_clk {
 150                 groups = "scif_clk";
 151                 function = "scif_clk";
 152         };
 153 };
 154
 155 &rwdt {
 156         timeout-sec = <60>;
 157         status = "okay";
 158 };
 159
 160 &scif0 {
 161         pinctrl-0 = <&scif0_pins>;
 162         pinctrl-names = "default";
 163
 164         uart-has-rtscts;
 165         status = "okay";
 166 };
 167
 168 &scif_clk {
 169         clock-frequency = <24000000>;
 170 };