1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Falcon CPU board
5 * Copyright (C) 2020 Renesas Electronics Corp.
8 #include <dt-bindings/gpio/gpio.h>
9 #include "r8a779a0.dtsi"
12 model = "Renesas Falcon CPU board";
13 compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
20 stdout-path = "serial0:115200n8";
24 device_type = "memory";
25 /* first 128MB is reserved for secure area. */
26 reg = <0x0 0x48000000 0x0 0x78000000>;
30 device_type = "memory";
31 reg = <0x5 0x00000000 0x0 0x80000000>;
35 device_type = "memory";
36 reg = <0x6 0x00000000 0x0 0x80000000>;
40 device_type = "memory";
41 reg = <0x7 0x00000000 0x0 0x80000000>;
44 reg_1p8v: regulator-1p8v {
45 compatible = "regulator-fixed";
46 regulator-name = "fixed-1.8V";
47 regulator-min-microvolt = <1800000>;
48 regulator-max-microvolt = <1800000>;
53 reg_3p3v: regulator-3p3v {
54 compatible = "regulator-fixed";
55 regulator-name = "fixed-3.3V";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
64 pinctrl-0 = <&avb0_pins>;
65 pinctrl-names = "default";
67 tx-internal-delay-ps = <2000>;
70 phy0: ethernet-phy@0 {
73 interrupt-parent = <&gpio4>;
74 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
75 reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
80 clock-frequency = <16666666>;
84 clock-frequency = <32768>;
88 pinctrl-0 = <&i2c0_pins>;
89 pinctrl-names = "default";
92 clock-frequency = <400000>;
95 compatible = "rohm,br24g01", "atmel,24c01";
103 pinctrl-0 = <&i2c1_pins>;
104 pinctrl-names = "default";
107 clock-frequency = <400000>;
111 pinctrl-0 = <&i2c6_pins>;
112 pinctrl-names = "default";
115 clock-frequency = <400000>;
119 pinctrl-0 = <&mmc_pins>;
120 pinctrl-1 = <&mmc_pins>;
121 pinctrl-names = "default", "state_uhs";
123 vmmc-supply = <®_3p3v>;
124 vqmmc-supply = <®_1p8v>;
131 full-pwr-cycle-in-suspend;
136 pinctrl-0 = <&scif_clk_pins>;
137 pinctrl-names = "default";
141 groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
146 groups = "avb0_mdio";
147 drive-strength = <21>;
151 groups = "avb0_rgmii";
152 drive-strength = <21>;
173 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
175 power-source = <1800>;
179 groups = "scif0_data", "scif0_ctrl";
183 scif_clk_pins: scif_clk {
185 function = "scif_clk";
195 pinctrl-0 = <&scif0_pins>;
196 pinctrl-names = "default";
203 clock-frequency = <24000000>;