arch/arm64/boot/dts/renesas/r8a77995-draak.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Draak board
   4  *
   5  * Copyright (C) 2016-2018 Renesas Electronics Corp.
   6  * Copyright (C) 2017 Glider bvba
   7  */
   8
   9 /dts-v1/;
  10 #include "r8a77995.dtsi"
  11 #include <dt-bindings/gpio/gpio.h>
  12
  13 / {
  14         model = "Renesas Draak board based on r8a77995";
  15         compatible = "renesas,draak", "renesas,r8a77995";
  16
  17         aliases {
  18                 serial0 = &scif2;
  19                 ethernet0 = &avb;
  20         };
  21
  22         chosen {
  23                 bootargs = "ignore_loglevel";
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         backlight: backlight {
  28                 compatible = "pwm-backlight";
  29                 pwms = <&pwm1 0 50000>;
  30
  31                 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
  32                 default-brightness-level = <10>;
  33
  34                 power-supply = <&reg_12p0v>;
  35                 enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
  36         };
  37
  38         composite-in {
  39                 compatible = "composite-video-connector";
  40
  41                 port {
  42                         composite_con_in: endpoint {
  43                                 remote-endpoint = <&adv7180_in>;
  44                         };
  45                 };
  46         };
  47
  48         hdmi-in {
  49                 compatible = "hdmi-connector";
  50                 type = "a";
  51
  52                 port {
  53                         hdmi_con_in: endpoint {
  54                                 remote-endpoint = <&adv7612_in>;
  55                         };
  56                 };
  57         };
  58
  59         hdmi-out {
  60                 compatible = "hdmi-connector";
  61                 type = "a";
  62
  63                 port {
  64                         hdmi_con_out: endpoint {
  65                                 remote-endpoint = <&adv7511_out>;
  66                         };
  67                 };
  68         };
  69
  70         lvds-decoder {
  71                 compatible = "thine,thc63lvd1024";
  72                 vcc-supply = <&reg_3p3v>;
  73
  74                 ports {
  75                         #address-cells = <1>;
  76                         #size-cells = <0>;
  77
  78                         port@0 {
  79                                 reg = <0>;
  80                                 thc63lvd1024_in: endpoint {
  81                                         remote-endpoint = <&lvds0_out>;
  82                                 };
  83                         };
  84
  85                         port@2 {
  86                                 reg = <2>;
  87                                 thc63lvd1024_out: endpoint {
  88                                         remote-endpoint = <&adv7511_in>;
  89                                 };
  90                         };
  91                 };
  92         };
  93
  94         memory@48000000 {
  95                 device_type = "memory";
  96                 /* first 128MB is reserved for secure area. */
  97                 reg = <0x0 0x48000000 0x0 0x18000000>;
  98         };
  99
 100         reg_1p8v: regulator0 {
 101                 compatible = "regulator-fixed";
 102                 regulator-name = "fixed-1.8V";
 103                 regulator-min-microvolt = <1800000>;
 104                 regulator-max-microvolt = <1800000>;
 105                 regulator-boot-on;
 106                 regulator-always-on;
 107         };
 108
 109         reg_3p3v: regulator1 {
 110                 compatible = "regulator-fixed";
 111                 regulator-name = "fixed-3.3V";
 112                 regulator-min-microvolt = <3300000>;
 113                 regulator-max-microvolt = <3300000>;
 114                 regulator-boot-on;
 115                 regulator-always-on;
 116         };
 117
 118         reg_12p0v: regulator1 {
 119                 compatible = "regulator-fixed";
 120                 regulator-name = "D12.0V";
 121                 regulator-min-microvolt = <12000000>;
 122                 regulator-max-microvolt = <12000000>;
 123                 regulator-boot-on;
 124                 regulator-always-on;
 125         };
 126
 127         vga {
 128                 compatible = "vga-connector";
 129
 130                 port {
 131                         vga_in: endpoint {
 132                                 remote-endpoint = <&adv7123_out>;
 133                         };
 134                 };
 135         };
 136
 137         vga-encoder {
 138                 compatible = "adi,adv7123";
 139
 140                 ports {
 141                         #address-cells = <1>;
 142                         #size-cells = <0>;
 143
 144                         port@0 {
 145                                 reg = <0>;
 146                                 adv7123_in: endpoint {
 147                                         remote-endpoint = <&du_out_rgb>;
 148                                 };
 149                         };
 150                         port@1 {
 151                                 reg = <1>;
 152                                 adv7123_out: endpoint {
 153                                         remote-endpoint = <&vga_in>;
 154                                 };
 155                         };
 156                 };
 157         };
 158
 159         x12_clk: x12 {
 160                 compatible = "fixed-clock";
 161                 #clock-cells = <0>;
 162                 clock-frequency = <74250000>;
 163         };
 164 };
 165
 166 &avb {
 167         pinctrl-0 = <&avb0_pins>;
 168         pinctrl-names = "default";
 169         renesas,no-ether-link;
 170         phy-handle = <&phy0>;
 171         phy-mode = "rgmii-txid";
 172         status = "okay";
 173
 174         phy0: ethernet-phy@0 {
 175                 rxc-skew-ps = <1500>;
 176                 reg = <0>;
 177                 interrupt-parent = <&gpio5>;
 178                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 179         };
 180 };
 181
 182 &can0 {
 183         pinctrl-0 = <&can0_pins>;
 184         pinctrl-names = "default";
 185         status = "okay";
 186 };
 187
 188 &can1 {
 189         pinctrl-0 = <&can1_pins>;
 190         pinctrl-names = "default";
 191         status = "okay";
 192 };
 193
 194 &du {
 195         pinctrl-0 = <&du_pins>;
 196         pinctrl-names = "default";
 197         status = "okay";
 198
 199         clocks = <&cpg CPG_MOD 724>,
 200                  <&cpg CPG_MOD 723>,
 201                  <&x12_clk>;
 202         clock-names = "du.0", "du.1", "dclkin.0";
 203
 204         ports {
 205                 port@0 {
 206                         endpoint {
 207                                 remote-endpoint = <&adv7123_in>;
 208                         };
 209                 };
 210         };
 211 };
 212
 213 &ehci0 {
 214         dr_mode = "host";
 215         status = "okay";
 216 };
 217
 218 &extal_clk {
 219         clock-frequency = <48000000>;
 220 };
 221
 222 &hsusb {
 223         dr_mode = "host";
 224         status = "okay";
 225 };
 226
 227 &i2c0 {
 228         pinctrl-0 = <&i2c0_pins>;
 229         pinctrl-names = "default";
 230         status = "okay";
 231
 232         composite-in@20 {
 233                 compatible = "adi,adv7180cp";
 234                 reg = <0x20>;
 235
 236                 ports {
 237                         #address-cells = <1>;
 238                         #size-cells = <0>;
 239
 240                         port@0 {
 241                                 reg = <0>;
 242                                 adv7180_in: endpoint {
 243                                         remote-endpoint = <&composite_con_in>;
 244                                 };
 245                         };
 246
 247                         port@3 {
 248                                 reg = <3>;
 249
 250                                 /*
 251                                  * The VIN4 video input path is shared between
 252                                  * CVBS and HDMI inputs through SW[49-53]
 253                                  * switches.
 254                                  *
 255                                  * CVBS is the default selection, link it to
 256                                  * VIN4 here.
 257                                  */
 258                                 adv7180_out: endpoint {
 259                                         remote-endpoint = <&vin4_in>;
 260                                 };
 261                         };
 262                 };
 263
 264         };
 265
 266         hdmi-encoder@39 {
 267                 compatible = "adi,adv7511w";
 268                 reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
 269                 reg-names = "main", "edid", "packet", "cec";
 270                 interrupt-parent = <&gpio1>;
 271                 interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
 272
 273                 /* Depends on LVDS */
 274                 max-clock = <135000000>;
 275                 min-vrefresh = <50>;
 276
 277                 adi,input-depth = <8>;
 278                 adi,input-colorspace = "rgb";
 279                 adi,input-clock = "1x";
 280                 adi,input-style = <1>;
 281                 adi,input-justification = "evenly";
 282
 283                 ports {
 284                         #address-cells = <1>;
 285                         #size-cells = <0>;
 286
 287                         port@0 {
 288                                 reg = <0>;
 289                                 adv7511_in: endpoint {
 290                                         remote-endpoint = <&thc63lvd1024_out>;
 291                                 };
 292                         };
 293
 294                         port@1 {
 295                                 reg = <1>;
 296                                 adv7511_out: endpoint {
 297                                         remote-endpoint = <&hdmi_con_out>;
 298                                 };
 299                         };
 300                 };
 301         };
 302
 303         hdmi-decoder@4c {
 304                 compatible = "adi,adv7612";
 305                 reg = <0x4c>;
 306                 default-input = <0>;
 307
 308                 ports {
 309                         #address-cells = <1>;
 310                         #size-cells = <0>;
 311
 312                         port@0 {
 313                                 reg = <0>;
 314
 315                                 adv7612_in: endpoint {
 316                                         remote-endpoint = <&hdmi_con_in>;
 317                                 };
 318                         };
 319
 320                         port@2 {
 321                                 reg = <2>;
 322
 323                                 /*
 324                                  * The VIN4 video input path is shared between
 325                                  * CVBS and HDMI inputs through SW[49-53]
 326                                  * switches.
 327                                  *
 328                                  * CVBS is the default selection, leave HDMI
 329                                  * not connected here.
 330                                  */
 331                                 adv7612_out: endpoint {
 332                                         pclk-sample = <0>;
 333                                         hsync-active = <0>;
 334                                         vsync-active = <0>;
 335                                 };
 336                         };
 337                 };
 338         };
 339
 340         eeprom@50 {
 341                 compatible = "rohm,br24t01", "atmel,24c01";
 342                 reg = <0x50>;
 343                 pagesize = <8>;
 344         };
 345 };
 346
 347 &i2c1 {
 348         pinctrl-0 = <&i2c1_pins>;
 349         pinctrl-names = "default";
 350         status = "okay";
 351 };
 352
 353 &lvds0 {
 354         status = "okay";
 355
 356         clocks = <&cpg CPG_MOD 727>,
 357                  <&x12_clk>,
 358                  <&extal_clk>;
 359         clock-names = "fck", "dclkin.0", "extal";
 360
 361         ports {
 362                 port@1 {
 363                         lvds0_out: endpoint {
 364                                 remote-endpoint = <&thc63lvd1024_in>;
 365                         };
 366                 };
 367         };
 368 };
 369
 370 &lvds1 {
 371         /*
 372          * Even though the LVDS1 output is not connected, the encoder must be
 373          * enabled to supply a pixel clock to the DU for the DPAD output when
 374          * LVDS0 is in use.
 375          */
 376         status = "okay";
 377
 378         clocks = <&cpg CPG_MOD 727>,
 379                  <&x12_clk>,
 380                  <&extal_clk>;
 381         clock-names = "fck", "dclkin.0", "extal";
 382 };
 383
 384 &ohci0 {
 385         dr_mode = "host";
 386         status = "okay";
 387 };
 388
 389 &pfc {
 390         avb0_pins: avb {
 391                 mux {
 392                         groups = "avb0_link", "avb0_mdio", "avb0_mii";
 393                         function = "avb0";
 394                 };
 395         };
 396
 397         can0_pins: can0 {
 398                 groups = "can0_data_a";
 399                 function = "can0";
 400         };
 401
 402         can1_pins: can1 {
 403                 groups = "can1_data_a";
 404                 function = "can1";
 405         };
 406
 407         du_pins: du {
 408                 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
 409                 function = "du";
 410         };
 411
 412         i2c0_pins: i2c0 {
 413                 groups = "i2c0";
 414                 function = "i2c0";
 415         };
 416
 417         i2c1_pins: i2c1 {
 418                 groups = "i2c1";
 419                 function = "i2c1";
 420         };
 421
 422         pwm0_pins: pwm0 {
 423                 groups = "pwm0_c";
 424                 function = "pwm0";
 425         };
 426
 427         pwm1_pins: pwm1 {
 428                 groups = "pwm1_c";
 429                 function = "pwm1";
 430         };
 431
 432         scif2_pins: scif2 {
 433                 groups = "scif2_data";
 434                 function = "scif2";
 435         };
 436
 437         sdhi2_pins: sd2 {
 438                 groups = "mmc_data8", "mmc_ctrl";
 439                 function = "mmc";
 440                 power-source = <1800>;
 441         };
 442
 443         sdhi2_pins_uhs: sd2_uhs {
 444                 groups = "mmc_data8", "mmc_ctrl";
 445                 function = "mmc";
 446                 power-source = <1800>;
 447         };
 448
 449         usb0_pins: usb0 {
 450                 groups = "usb0";
 451                 function = "usb0";
 452         };
 453
 454         vin4_pins_cvbs: vin4 {
 455                 groups = "vin4_data8", "vin4_sync", "vin4_clk";
 456                 function = "vin4";
 457         };
 458 };
 459
 460 &pwm0 {
 461         pinctrl-0 = <&pwm0_pins>;
 462         pinctrl-names = "default";
 463
 464         status = "okay";
 465 };
 466
 467 &pwm1 {
 468         pinctrl-0 = <&pwm1_pins>;
 469         pinctrl-names = "default";
 470
 471         status = "okay";
 472 };
 473
 474 &rwdt {
 475         timeout-sec = <60>;
 476         status = "okay";
 477 };
 478
 479 &scif2 {
 480         pinctrl-0 = <&scif2_pins>;
 481         pinctrl-names = "default";
 482
 483         status = "okay";
 484 };
 485
 486 &sdhi2 {
 487         /* used for on-board eMMC */
 488         pinctrl-0 = <&sdhi2_pins>;
 489         pinctrl-1 = <&sdhi2_pins_uhs>;
 490         pinctrl-names = "default", "state_uhs";
 491
 492         vmmc-supply = <&reg_3p3v>;
 493         vqmmc-supply = <&reg_1p8v>;
 494         bus-width = <8>;
 495         mmc-hs200-1_8v;
 496         non-removable;
 497         status = "okay";
 498 };
 499
 500 &usb2_phy0 {
 501         pinctrl-0 = <&usb0_pins>;
 502         pinctrl-names = "default";
 503
 504         renesas,no-otg-pins;
 505         status = "okay";
 506 };
 507
 508 &vin4 {
 509         pinctrl-0 = <&vin4_pins_cvbs>;
 510         pinctrl-names = "default";
 511
 512         status = "okay";
 513
 514         ports {
 515                 #address-cells = <1>;
 516                 #size-cells = <0>;
 517
 518                 port@0 {
 519                         reg = <0>;
 520
 521                         vin4_in: endpoint {
 522                                 remote-endpoint = <&adv7180_out>;
 523                         };
 524                 };
 525         };
 526 };