1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Draak board with R-Car D3
5 * Copyright (C) 2016-2018 Renesas Electronics Corp.
6 * Copyright (C) 2017 Glider bvba
10 #include "r8a77995.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
15 model = "Renesas Draak board based on r8a77995";
16 compatible = "renesas,draak", "renesas,r8a77995";
23 audio_clkout: audio-clkout {
25 * This is same as <&rcar_sound 0>
26 * but needed to avoid cs2000/rcar_sound probe dead-lock
28 compatible = "fixed-clock";
30 clock-frequency = <12288000>;
33 backlight: backlight {
34 compatible = "pwm-backlight";
35 pwms = <&pwm1 0 50000>;
37 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
38 default-brightness-level = <10>;
40 power-supply = <®_12p0v>;
41 enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
45 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
46 stdout-path = "serial0:115200n8";
50 compatible = "composite-video-connector";
53 composite_con_in: endpoint {
54 remote-endpoint = <&adv7180_in>;
60 compatible = "hdmi-connector";
64 hdmi_con_in: endpoint {
65 remote-endpoint = <&adv7612_in>;
71 compatible = "hdmi-connector";
75 hdmi_con_out: endpoint {
76 remote-endpoint = <&adv7511_out>;
82 compatible = "gpio-keys";
84 pinctrl-0 = <&keys_pins>;
85 pinctrl-names = "default";
88 gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
92 debounce-interval = <20>;
95 gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;
99 debounce-interval = <20>;
102 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
103 linux,code = <KEY_3>;
106 debounce-interval = <20>;
109 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
110 linux,code = <KEY_4>;
113 debounce-interval = <20>;
118 compatible = "thine,thc63lvd1024";
119 vcc-supply = <®_3p3v>;
122 #address-cells = <1>;
127 thc63lvd1024_in: endpoint {
128 remote-endpoint = <&lvds0_out>;
134 thc63lvd1024_out: endpoint {
135 remote-endpoint = <&adv7511_in>;
142 device_type = "memory";
143 /* first 128MB is reserved for secure area. */
144 reg = <0x0 0x48000000 0x0 0x18000000>;
147 reg_1p8v: regulator-1p8v {
148 compatible = "regulator-fixed";
149 regulator-name = "fixed-1.8V";
150 regulator-min-microvolt = <1800000>;
151 regulator-max-microvolt = <1800000>;
156 reg_3p3v: regulator-3p3v {
157 compatible = "regulator-fixed";
158 regulator-name = "fixed-3.3V";
159 regulator-min-microvolt = <3300000>;
160 regulator-max-microvolt = <3300000>;
165 reg_12p0v: regulator-12p0v {
166 compatible = "regulator-fixed";
167 regulator-name = "D12.0V";
168 regulator-min-microvolt = <12000000>;
169 regulator-max-microvolt = <12000000>;
175 compatible = "audio-graph-card";
177 dais = <&rsnd_port0 /* ak4613 */
178 /* HDMI is not yet supported */
183 compatible = "vga-connector";
187 remote-endpoint = <&adv7123_out>;
193 compatible = "adi,adv7123";
196 #address-cells = <1>;
201 adv7123_in: endpoint {
202 remote-endpoint = <&du_out_rgb>;
207 adv7123_out: endpoint {
208 remote-endpoint = <&vga_in>;
215 compatible = "fixed-clock";
217 clock-frequency = <74250000>;
221 compatible = "fixed-clock";
223 clock-frequency = <24576000>;
229 * X11 is connected to VI4_FIELD/SCIF_CLK/AUDIO_CLKB,
230 * and R-Car Sound uses AUDIO_CLKB.
231 * Note is that schematic indicates VI4_FIELD conection only
232 * not AUDIO_CLKB at SoC page.
233 * And this VI4_FIELD/SCIF_CLK/AUDIO_CLKB is connected to SW60.
234 * SW60 should be 1-2.
237 clock-frequency = <22579200>;
241 pinctrl-0 = <&avb0_pins>;
242 pinctrl-names = "default";
243 renesas,no-ether-link;
244 phy-handle = <&phy0>;
247 phy0: ethernet-phy@0 {
248 rxc-skew-ps = <1500>;
250 interrupt-parent = <&gpio5>;
251 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
253 * TX clock internal delay mode is required for reliable
254 * 1Gbps communication using the KSZ9031RNX phy present on
255 * the Draak board, however, TX clock internal delay mode
256 * isn't supported on r8a77995. Thus, limit speed to
257 * 100Mbps for reliable communication.
264 pinctrl-0 = <&can0_pins>;
265 pinctrl-names = "default";
270 pinctrl-0 = <&can1_pins>;
271 pinctrl-names = "default";
276 pinctrl-0 = <&du_pins>;
277 pinctrl-names = "default";
280 clocks = <&cpg CPG_MOD 724>,
283 clock-names = "du.0", "du.1", "dclkin.0";
288 remote-endpoint = <&adv7123_in>;
300 clock-frequency = <48000000>;
309 pinctrl-0 = <&i2c0_pins>;
310 pinctrl-names = "default";
314 compatible = "asahi-kasei,ak4613";
315 #sound-dai-cells = <0>;
317 clocks = <&rcar_sound 0>; /* audio_clkout */
319 asahi-kasei,in1-single-end;
320 asahi-kasei,in2-single-end;
321 asahi-kasei,out1-single-end;
322 asahi-kasei,out2-single-end;
323 asahi-kasei,out3-single-end;
324 asahi-kasei,out4-single-end;
325 asahi-kasei,out5-single-end;
326 asahi-kasei,out6-single-end;
329 ak4613_endpoint: endpoint {
330 remote-endpoint = <&rsnd_for_ak4613>;
336 compatible = "adi,adv7180cp";
340 #address-cells = <1>;
345 adv7180_in: endpoint {
346 remote-endpoint = <&composite_con_in>;
354 * The VIN4 video input path is shared between
355 * CVBS and HDMI inputs through SW[49-53]
358 * CVBS is the default selection, link it to
361 adv7180_out: endpoint {
362 remote-endpoint = <&vin4_in>;
370 compatible = "adi,adv7511w";
371 reg = <0x39>, <0x3f>, <0x3c>, <0x38>;
372 reg-names = "main", "edid", "cec", "packet";
373 interrupt-parent = <&gpio1>;
374 interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
376 adi,input-depth = <8>;
377 adi,input-colorspace = "rgb";
378 adi,input-clock = "1x";
381 #address-cells = <1>;
386 adv7511_in: endpoint {
387 remote-endpoint = <&thc63lvd1024_out>;
393 adv7511_out: endpoint {
394 remote-endpoint = <&hdmi_con_out>;
401 compatible = "adi,adv7612";
406 #address-cells = <1>;
412 adv7612_in: endpoint {
413 remote-endpoint = <&hdmi_con_in>;
421 * The VIN4 video input path is shared between
422 * CVBS and HDMI inputs through SW[49-53]
425 * CVBS is the default selection, leave HDMI
426 * not connected here.
428 adv7612_out: endpoint {
437 cs2000: clk-multiplier@4f {
439 compatible = "cirrus,cs2000-cp";
441 clocks = <&audio_clkout>, <&x19_clk>; /* audio_clkout_1, x19 */
442 clock-names = "clk_in", "ref_clk";
444 assigned-clocks = <&cs2000>;
445 assigned-clock-rates = <24576000>; /* 1/1 divide */
449 compatible = "rohm,br24t01", "atmel,24c01";
456 pinctrl-0 = <&i2c1_pins>;
457 pinctrl-names = "default";
464 clocks = <&cpg CPG_MOD 727>,
467 clock-names = "fck", "dclkin.0", "extal";
471 lvds0_out: endpoint {
472 remote-endpoint = <&thc63lvd1024_in>;
480 * Even though the LVDS1 output is not connected, the encoder must be
481 * enabled to supply a pixel clock to the DU for the DPAD output when
486 clocks = <&cpg CPG_MOD 727>,
489 clock-names = "fck", "dclkin.0", "extal";
499 groups = "avb0_link", "avb0_mdio", "avb0_mii";
504 groups = "can0_data_a";
509 groups = "can1_data_a";
514 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
529 pins = "GP_4_12", "GP_4_13", "GP_4_14", "GP_4_15";
544 groups = "scif2_data";
549 groups = "mmc_data8", "mmc_ctrl";
551 power-source = <1800>;
554 sdhi2_pins_uhs: sd2_uhs {
555 groups = "mmc_data8", "mmc_ctrl";
557 power-source = <1800>;
561 groups = "ssi34_ctrl", "ssi3_data", "ssi4_data_a";
565 sound_clk_pins: sound-clk {
566 groups = "audio_clk_a", "audio_clk_b",
567 "audio_clkout", "audio_clkout1";
568 function = "audio_clk";
576 vin4_pins_cvbs: vin4 {
577 groups = "vin4_data8", "vin4_sync", "vin4_clk";
583 pinctrl-0 = <&pwm0_pins>;
584 pinctrl-names = "default";
590 pinctrl-0 = <&pwm1_pins>;
591 pinctrl-names = "default";
597 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
598 pinctrl-names = "default";
601 #sound-dai-cells = <0>;
603 /* audio_clkout0/1 */
605 clock-frequency = <12288000 11289600>;
609 clocks = <&cpg CPG_MOD 1005>,
610 <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
611 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
612 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
613 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
614 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
615 <&cs2000>, <&audio_clk_b>,
616 <&cpg CPG_CORE R8A77995_CLK_ZA2>;
620 rsnd_for_ak4613: endpoint {
621 remote-endpoint = <&ak4613_endpoint>;
622 dai-format = "left_j";
623 bitclock-master = <&rsnd_for_ak4613>;
624 frame-master = <&rsnd_for_ak4613>;
625 playback = <&ssi3>, <&src5>, <&dvc0>;
626 capture = <&ssi4>, <&src6>, <&dvc1>;
638 pinctrl-0 = <&scif2_pins>;
639 pinctrl-names = "default";
645 /* used for on-board eMMC */
646 pinctrl-0 = <&sdhi2_pins>;
647 pinctrl-1 = <&sdhi2_pins_uhs>;
648 pinctrl-names = "default", "state_uhs";
650 vmmc-supply = <®_3p3v>;
651 vqmmc-supply = <®_1p8v>;
665 pinctrl-0 = <&usb0_pins>;
666 pinctrl-names = "default";
673 pinctrl-0 = <&vin4_pins_cvbs>;
674 pinctrl-names = "default";
681 remote-endpoint = <&adv7180_out>;