1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 * Copyright (C) 2018 Cogent Embedded, Inc.
9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/r8a77980-sysc.h>
15 compatible = "renesas,r8a77980";
28 /* External CAN clock - to be overridden by boards that provide it */
30 compatible = "fixed-clock";
32 clock-frequency = <0>;
41 compatible = "arm,cortex-a53";
43 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
44 power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
45 next-level-cache = <&L2_CA53>;
46 enable-method = "psci";
51 compatible = "arm,cortex-a53";
53 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
54 power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
55 next-level-cache = <&L2_CA53>;
56 enable-method = "psci";
61 compatible = "arm,cortex-a53";
63 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
64 power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
65 next-level-cache = <&L2_CA53>;
66 enable-method = "psci";
71 compatible = "arm,cortex-a53";
73 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
74 power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
75 next-level-cache = <&L2_CA53>;
76 enable-method = "psci";
79 L2_CA53: cache-controller {
81 power-domains = <&sysc R8A77980_PD_CA53_SCU>;
88 compatible = "fixed-clock";
90 /* This value must be overridden by the board */
91 clock-frequency = <0>;
95 compatible = "fixed-clock";
97 /* This value must be overridden by the board */
98 clock-frequency = <0>;
101 /* External PCIe clock - can be overridden by the board */
102 pcie_bus_clk: pcie_bus {
103 compatible = "fixed-clock";
105 clock-frequency = <0>;
109 compatible = "arm,cortex-a53-pmu";
110 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
111 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
112 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
113 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
114 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
118 compatible = "arm,psci-1.0", "arm,psci-0.2";
122 /* External SCIF clock - to be overridden by boards that provide it */
124 compatible = "fixed-clock";
126 clock-frequency = <0>;
130 compatible = "simple-bus";
131 interrupt-parent = <&gic>;
133 #address-cells = <2>;
137 rwdt: watchdog@e6020000 {
138 compatible = "renesas,r8a77980-wdt",
139 "renesas,rcar-gen3-wdt";
140 reg = <0 0xe6020000 0 0x0c>;
141 clocks = <&cpg CPG_MOD 402>;
142 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
147 gpio0: gpio@e6050000 {
148 compatible = "renesas,gpio-r8a77980",
149 "renesas,rcar-gen3-gpio";
150 reg = <0 0xe6050000 0 0x50>;
151 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
154 gpio-ranges = <&pfc 0 0 22>;
155 #interrupt-cells = <2>;
156 interrupt-controller;
157 clocks = <&cpg CPG_MOD 912>;
158 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
162 gpio1: gpio@e6051000 {
163 compatible = "renesas,gpio-r8a77980",
164 "renesas,rcar-gen3-gpio";
165 reg = <0 0xe6051000 0 0x50>;
166 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
169 gpio-ranges = <&pfc 0 32 28>;
170 #interrupt-cells = <2>;
171 interrupt-controller;
172 clocks = <&cpg CPG_MOD 911>;
173 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
177 gpio2: gpio@e6052000 {
178 compatible = "renesas,gpio-r8a77980",
179 "renesas,rcar-gen3-gpio";
180 reg = <0 0xe6052000 0 0x50>;
181 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
184 gpio-ranges = <&pfc 0 64 30>;
185 #interrupt-cells = <2>;
186 interrupt-controller;
187 clocks = <&cpg CPG_MOD 910>;
188 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
192 gpio3: gpio@e6053000 {
193 compatible = "renesas,gpio-r8a77980",
194 "renesas,rcar-gen3-gpio";
195 reg = <0 0xe6053000 0 0x50>;
196 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
199 gpio-ranges = <&pfc 0 96 17>;
200 #interrupt-cells = <2>;
201 interrupt-controller;
202 clocks = <&cpg CPG_MOD 909>;
203 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
207 gpio4: gpio@e6054000 {
208 compatible = "renesas,gpio-r8a77980",
209 "renesas,rcar-gen3-gpio";
210 reg = <0 0xe6054000 0 0x50>;
211 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
214 gpio-ranges = <&pfc 0 128 25>;
215 #interrupt-cells = <2>;
216 interrupt-controller;
217 clocks = <&cpg CPG_MOD 908>;
218 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
222 gpio5: gpio@e6055000 {
223 compatible = "renesas,gpio-r8a77980",
224 "renesas,rcar-gen3-gpio";
225 reg = <0 0xe6055000 0 0x50>;
226 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
229 gpio-ranges = <&pfc 0 160 15>;
230 #interrupt-cells = <2>;
231 interrupt-controller;
232 clocks = <&cpg CPG_MOD 907>;
233 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
237 pfc: pinctrl@e6060000 {
238 compatible = "renesas,pfc-r8a77980";
239 reg = <0 0xe6060000 0 0x50c>;
242 cmt0: timer@e60f0000 {
243 compatible = "renesas,r8a77980-cmt0",
244 "renesas,rcar-gen3-cmt0";
245 reg = <0 0xe60f0000 0 0x1004>;
246 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
247 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
248 clocks = <&cpg CPG_MOD 303>;
250 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
255 cmt1: timer@e6130000 {
256 compatible = "renesas,r8a77980-cmt1",
257 "renesas,rcar-gen3-cmt1";
258 reg = <0 0xe6130000 0 0x1004>;
259 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
260 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
261 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
262 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
263 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
264 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
265 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
266 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
267 clocks = <&cpg CPG_MOD 302>;
269 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
274 cmt2: timer@e6140000 {
275 compatible = "renesas,r8a77980-cmt1",
276 "renesas,rcar-gen3-cmt1";
277 reg = <0 0xe6140000 0 0x1004>;
278 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
284 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
286 clocks = <&cpg CPG_MOD 301>;
288 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
293 cmt3: timer@e6148000 {
294 compatible = "renesas,r8a77980-cmt1",
295 "renesas,rcar-gen3-cmt1";
296 reg = <0 0xe6148000 0 0x1004>;
297 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
299 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
300 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
301 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
302 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
303 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
304 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
305 clocks = <&cpg CPG_MOD 300>;
307 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
312 cpg: clock-controller@e6150000 {
313 compatible = "renesas,r8a77980-cpg-mssr";
314 reg = <0 0xe6150000 0 0x1000>;
315 clocks = <&extal_clk>, <&extalr_clk>;
316 clock-names = "extal", "extalr";
318 #power-domain-cells = <0>;
322 rst: reset-controller@e6160000 {
323 compatible = "renesas,r8a77980-rst";
324 reg = <0 0xe6160000 0 0x200>;
327 sysc: system-controller@e6180000 {
328 compatible = "renesas,r8a77980-sysc";
329 reg = <0 0xe6180000 0 0x440>;
330 #power-domain-cells = <1>;
333 tsc: thermal@e6198000 {
334 compatible = "renesas,r8a77980-thermal";
335 reg = <0 0xe6198000 0 0x100>,
336 <0 0xe61a0000 0 0x100>;
337 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
338 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
339 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
340 clocks = <&cpg CPG_MOD 522>;
341 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
343 #thermal-sensor-cells = <1>;
346 intc_ex: interrupt-controller@e61c0000 {
347 compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
348 #interrupt-cells = <2>;
349 interrupt-controller;
350 reg = <0 0xe61c0000 0 0x200>;
351 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
357 clocks = <&cpg CPG_MOD 407>;
358 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
362 tmu0: timer@e61e0000 {
363 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
364 reg = <0 0xe61e0000 0 0x30>;
365 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
368 clocks = <&cpg CPG_MOD 125>;
370 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
375 tmu1: timer@e6fc0000 {
376 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
377 reg = <0 0xe6fc0000 0 0x30>;
378 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
379 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
380 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
381 clocks = <&cpg CPG_MOD 124>;
383 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
388 tmu2: timer@e6fd0000 {
389 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
390 reg = <0 0xe6fd0000 0 0x30>;
391 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
392 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
393 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
394 clocks = <&cpg CPG_MOD 123>;
396 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
401 tmu3: timer@e6fe0000 {
402 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
403 reg = <0 0xe6fe0000 0 0x30>;
404 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
405 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
406 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
407 clocks = <&cpg CPG_MOD 122>;
409 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
414 tmu4: timer@ffc00000 {
415 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
416 reg = <0 0xffc00000 0 0x30>;
417 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
418 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
419 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
420 clocks = <&cpg CPG_MOD 121>;
422 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
428 compatible = "renesas,i2c-r8a77980",
429 "renesas,rcar-gen3-i2c";
430 reg = <0 0xe6500000 0 0x40>;
431 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
432 clocks = <&cpg CPG_MOD 931>;
433 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
435 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
436 <&dmac2 0x91>, <&dmac2 0x90>;
437 dma-names = "tx", "rx", "tx", "rx";
438 i2c-scl-internal-delay-ns = <6>;
439 #address-cells = <1>;
445 compatible = "renesas,i2c-r8a77980",
446 "renesas,rcar-gen3-i2c";
447 reg = <0 0xe6508000 0 0x40>;
448 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
449 clocks = <&cpg CPG_MOD 930>;
450 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
452 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
453 <&dmac2 0x93>, <&dmac2 0x92>;
454 dma-names = "tx", "rx", "tx", "rx";
455 i2c-scl-internal-delay-ns = <6>;
456 #address-cells = <1>;
462 compatible = "renesas,i2c-r8a77980",
463 "renesas,rcar-gen3-i2c";
464 reg = <0 0xe6510000 0 0x40>;
465 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
466 clocks = <&cpg CPG_MOD 929>;
467 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
469 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
470 <&dmac2 0x95>, <&dmac2 0x94>;
471 dma-names = "tx", "rx", "tx", "rx";
472 i2c-scl-internal-delay-ns = <6>;
473 #address-cells = <1>;
479 compatible = "renesas,i2c-r8a77980",
480 "renesas,rcar-gen3-i2c";
481 reg = <0 0xe66d0000 0 0x40>;
482 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
483 clocks = <&cpg CPG_MOD 928>;
484 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
486 i2c-scl-internal-delay-ns = <6>;
487 #address-cells = <1>;
493 compatible = "renesas,i2c-r8a77980",
494 "renesas,rcar-gen3-i2c";
495 reg = <0 0xe66d8000 0 0x40>;
496 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
497 clocks = <&cpg CPG_MOD 927>;
498 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
500 i2c-scl-internal-delay-ns = <6>;
501 #address-cells = <1>;
507 compatible = "renesas,i2c-r8a77980",
508 "renesas,rcar-gen3-i2c";
509 reg = <0 0xe66e0000 0 0x40>;
510 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
511 clocks = <&cpg CPG_MOD 919>;
512 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
514 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>,
515 <&dmac2 0x9b>, <&dmac2 0x9a>;
516 dma-names = "tx", "rx", "tx", "rx";
517 i2c-scl-internal-delay-ns = <6>;
518 #address-cells = <1>;
523 hscif0: serial@e6540000 {
524 compatible = "renesas,hscif-r8a77980",
525 "renesas,rcar-gen3-hscif",
527 reg = <0 0xe6540000 0 0x60>;
528 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
529 clocks = <&cpg CPG_MOD 520>,
530 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
532 clock-names = "fck", "brg_int", "scif_clk";
533 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
534 <&dmac2 0x31>, <&dmac2 0x30>;
535 dma-names = "tx", "rx", "tx", "rx";
536 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
541 hscif1: serial@e6550000 {
542 compatible = "renesas,hscif-r8a77980",
543 "renesas,rcar-gen3-hscif",
545 reg = <0 0xe6550000 0 0x60>;
546 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
547 clocks = <&cpg CPG_MOD 519>,
548 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
550 clock-names = "fck", "brg_int", "scif_clk";
551 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
552 <&dmac2 0x33>, <&dmac2 0x32>;
553 dma-names = "tx", "rx", "tx", "rx";
554 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
559 hscif2: serial@e6560000 {
560 compatible = "renesas,hscif-r8a77980",
561 "renesas,rcar-gen3-hscif",
563 reg = <0 0xe6560000 0 0x60>;
564 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
565 clocks = <&cpg CPG_MOD 518>,
566 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
568 clock-names = "fck", "brg_int", "scif_clk";
569 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
570 <&dmac2 0x35>, <&dmac2 0x34>;
571 dma-names = "tx", "rx", "tx", "rx";
572 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
577 hscif3: serial@e66a0000 {
578 compatible = "renesas,hscif-r8a77980",
579 "renesas,rcar-gen3-hscif",
581 reg = <0 0xe66a0000 0 0x60>;
582 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
583 clocks = <&cpg CPG_MOD 517>,
584 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
586 clock-names = "fck", "brg_int", "scif_clk";
587 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
588 <&dmac2 0x37>, <&dmac2 0x36>;
589 dma-names = "tx", "rx", "tx", "rx";
590 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
595 pcie_phy: pcie-phy@e65d0000 {
596 compatible = "renesas,r8a77980-pcie-phy";
597 reg = <0 0xe65d0000 0 0x8000>;
599 clocks = <&cpg CPG_MOD 319>;
600 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
605 canfd: can@e66c0000 {
606 compatible = "renesas,r8a77980-canfd",
607 "renesas,rcar-gen3-canfd";
608 reg = <0 0xe66c0000 0 0x8000>;
609 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
610 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
611 clocks = <&cpg CPG_MOD 914>,
612 <&cpg CPG_CORE R8A77980_CLK_CANFD>,
614 clock-names = "fck", "canfd", "can_clk";
615 assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
616 assigned-clock-rates = <40000000>;
617 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
630 avb: ethernet@e6800000 {
631 compatible = "renesas,etheravb-r8a77980",
632 "renesas,etheravb-rcar-gen3";
633 reg = <0 0xe6800000 0 0x800>;
634 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
635 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
636 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
637 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
638 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
639 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
640 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
641 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
642 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
643 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
644 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
645 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
646 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
647 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
648 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
649 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
650 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
651 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
652 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
653 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
654 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
655 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
656 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
657 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
658 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
659 interrupt-names = "ch0", "ch1", "ch2", "ch3",
660 "ch4", "ch5", "ch6", "ch7",
661 "ch8", "ch9", "ch10", "ch11",
662 "ch12", "ch13", "ch14", "ch15",
663 "ch16", "ch17", "ch18", "ch19",
664 "ch20", "ch21", "ch22", "ch23",
666 clocks = <&cpg CPG_MOD 812>;
668 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
671 rx-internal-delay-ps = <0>;
672 tx-internal-delay-ps = <2000>;
673 iommus = <&ipmmu_ds1 33>;
674 #address-cells = <1>;
680 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
681 reg = <0 0xe6e30000 0 0x10>;
683 clocks = <&cpg CPG_MOD 523>;
684 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
690 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
691 reg = <0 0xe6e31000 0 0x10>;
693 clocks = <&cpg CPG_MOD 523>;
694 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
700 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
701 reg = <0 0xe6e32000 0 0x10>;
703 clocks = <&cpg CPG_MOD 523>;
704 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
710 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
711 reg = <0 0xe6e33000 0 0x10>;
713 clocks = <&cpg CPG_MOD 523>;
714 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
720 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
721 reg = <0 0xe6e34000 0 0x10>;
723 clocks = <&cpg CPG_MOD 523>;
724 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
729 scif0: serial@e6e60000 {
730 compatible = "renesas,scif-r8a77980",
731 "renesas,rcar-gen3-scif",
733 reg = <0 0xe6e60000 0 0x40>;
734 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
735 clocks = <&cpg CPG_MOD 207>,
736 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
738 clock-names = "fck", "brg_int", "scif_clk";
739 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
740 <&dmac2 0x51>, <&dmac2 0x50>;
741 dma-names = "tx", "rx", "tx", "rx";
742 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
747 scif1: serial@e6e68000 {
748 compatible = "renesas,scif-r8a77980",
749 "renesas,rcar-gen3-scif",
751 reg = <0 0xe6e68000 0 0x40>;
752 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
753 clocks = <&cpg CPG_MOD 206>,
754 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
756 clock-names = "fck", "brg_int", "scif_clk";
757 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
758 <&dmac2 0x53>, <&dmac2 0x52>;
759 dma-names = "tx", "rx", "tx", "rx";
760 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
765 scif3: serial@e6c50000 {
766 compatible = "renesas,scif-r8a77980",
767 "renesas,rcar-gen3-scif",
769 reg = <0 0xe6c50000 0 0x40>;
770 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
771 clocks = <&cpg CPG_MOD 204>,
772 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
774 clock-names = "fck", "brg_int", "scif_clk";
775 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
776 <&dmac2 0x57>, <&dmac2 0x56>;
777 dma-names = "tx", "rx", "tx", "rx";
778 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
783 scif4: serial@e6c40000 {
784 compatible = "renesas,scif-r8a77980",
785 "renesas,rcar-gen3-scif",
787 reg = <0 0xe6c40000 0 0x40>;
788 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
789 clocks = <&cpg CPG_MOD 203>,
790 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
792 clock-names = "fck", "brg_int", "scif_clk";
793 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
794 <&dmac2 0x59>, <&dmac2 0x58>;
795 dma-names = "tx", "rx", "tx", "rx";
796 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
802 compatible = "renesas,tpu-r8a77980", "renesas,tpu";
803 reg = <0 0xe6e80000 0 0x148>;
804 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
805 clocks = <&cpg CPG_MOD 304>;
806 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
812 msiof0: spi@e6e90000 {
813 compatible = "renesas,msiof-r8a77980",
814 "renesas,rcar-gen3-msiof";
815 reg = <0 0xe6e90000 0 0x64>;
816 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
817 clocks = <&cpg CPG_MOD 211>;
818 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
820 #address-cells = <1>;
825 msiof1: spi@e6ea0000 {
826 compatible = "renesas,msiof-r8a77980",
827 "renesas,rcar-gen3-msiof";
828 reg = <0 0xe6ea0000 0 0x0064>;
829 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
830 clocks = <&cpg CPG_MOD 210>;
831 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
833 #address-cells = <1>;
838 msiof2: spi@e6c00000 {
839 compatible = "renesas,msiof-r8a77980",
840 "renesas,rcar-gen3-msiof";
841 reg = <0 0xe6c00000 0 0x0064>;
842 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
843 clocks = <&cpg CPG_MOD 209>;
844 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
846 #address-cells = <1>;
851 msiof3: spi@e6c10000 {
852 compatible = "renesas,msiof-r8a77980",
853 "renesas,rcar-gen3-msiof";
854 reg = <0 0xe6c10000 0 0x0064>;
855 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
856 clocks = <&cpg CPG_MOD 208>;
857 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
859 #address-cells = <1>;
864 vin0: video@e6ef0000 {
865 compatible = "renesas,vin-r8a77980";
866 reg = <0 0xe6ef0000 0 0x1000>;
867 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
868 clocks = <&cpg CPG_MOD 811>;
869 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
875 #address-cells = <1>;
879 #address-cells = <1>;
884 vin0csi40: endpoint@2 {
886 remote-endpoint = <&csi40vin0>;
892 vin1: video@e6ef1000 {
893 compatible = "renesas,vin-r8a77980";
894 reg = <0 0xe6ef1000 0 0x1000>;
895 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
896 clocks = <&cpg CPG_MOD 810>;
897 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
903 #address-cells = <1>;
907 #address-cells = <1>;
912 vin1csi40: endpoint@2 {
914 remote-endpoint = <&csi40vin1>;
920 vin2: video@e6ef2000 {
921 compatible = "renesas,vin-r8a77980";
922 reg = <0 0xe6ef2000 0 0x1000>;
923 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
924 clocks = <&cpg CPG_MOD 809>;
925 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
931 #address-cells = <1>;
935 #address-cells = <1>;
940 vin2csi40: endpoint@2 {
942 remote-endpoint = <&csi40vin2>;
948 vin3: video@e6ef3000 {
949 compatible = "renesas,vin-r8a77980";
950 reg = <0 0xe6ef3000 0 0x1000>;
951 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
952 clocks = <&cpg CPG_MOD 808>;
953 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
959 #address-cells = <1>;
963 #address-cells = <1>;
968 vin3csi40: endpoint@2 {
970 remote-endpoint = <&csi40vin3>;
976 vin4: video@e6ef4000 {
977 compatible = "renesas,vin-r8a77980";
978 reg = <0 0xe6ef4000 0 0x1000>;
979 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
980 clocks = <&cpg CPG_MOD 807>;
981 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
987 #address-cells = <1>;
991 #address-cells = <1>;
996 vin4csi41: endpoint@3 {
998 remote-endpoint = <&csi41vin4>;
1004 vin5: video@e6ef5000 {
1005 compatible = "renesas,vin-r8a77980";
1006 reg = <0 0xe6ef5000 0 0x1000>;
1007 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1008 clocks = <&cpg CPG_MOD 806>;
1009 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1010 resets = <&cpg 806>;
1012 status = "disabled";
1015 #address-cells = <1>;
1019 #address-cells = <1>;
1024 vin5csi41: endpoint@3 {
1026 remote-endpoint = <&csi41vin5>;
1032 vin6: video@e6ef6000 {
1033 compatible = "renesas,vin-r8a77980";
1034 reg = <0 0xe6ef6000 0 0x1000>;
1035 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1036 clocks = <&cpg CPG_MOD 805>;
1037 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1038 resets = <&cpg 805>;
1040 status = "disabled";
1043 #address-cells = <1>;
1047 #address-cells = <1>;
1052 vin6csi41: endpoint@3 {
1054 remote-endpoint = <&csi41vin6>;
1060 vin7: video@e6ef7000 {
1061 compatible = "renesas,vin-r8a77980";
1062 reg = <0 0xe6ef7000 0 0x1000>;
1063 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1064 clocks = <&cpg CPG_MOD 804>;
1065 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1066 resets = <&cpg 804>;
1068 status = "disabled";
1071 #address-cells = <1>;
1075 #address-cells = <1>;
1080 vin7csi41: endpoint@3 {
1082 remote-endpoint = <&csi41vin7>;
1088 vin8: video@e6ef8000 {
1089 compatible = "renesas,vin-r8a77980";
1090 reg = <0 0xe6ef8000 0 0x1000>;
1091 interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1092 clocks = <&cpg CPG_MOD 628>;
1093 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1094 resets = <&cpg 628>;
1096 status = "disabled";
1099 vin9: video@e6ef9000 {
1100 compatible = "renesas,vin-r8a77980";
1101 reg = <0 0xe6ef9000 0 0x1000>;
1102 interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1103 clocks = <&cpg CPG_MOD 627>;
1104 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1105 resets = <&cpg 627>;
1107 status = "disabled";
1110 vin10: video@e6efa000 {
1111 compatible = "renesas,vin-r8a77980";
1112 reg = <0 0xe6efa000 0 0x1000>;
1113 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
1114 clocks = <&cpg CPG_MOD 625>;
1115 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1116 resets = <&cpg 625>;
1118 status = "disabled";
1121 vin11: video@e6efb000 {
1122 compatible = "renesas,vin-r8a77980";
1123 reg = <0 0xe6efb000 0 0x1000>;
1124 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>;
1125 clocks = <&cpg CPG_MOD 618>;
1126 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1127 resets = <&cpg 618>;
1129 status = "disabled";
1132 vin12: video@e6efc000 {
1133 compatible = "renesas,vin-r8a77980";
1134 reg = <0 0xe6efc000 0 0x1000>;
1135 interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
1136 clocks = <&cpg CPG_MOD 612>;
1137 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1138 resets = <&cpg 612>;
1140 status = "disabled";
1143 vin13: video@e6efd000 {
1144 compatible = "renesas,vin-r8a77980";
1145 reg = <0 0xe6efd000 0 0x1000>;
1146 interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
1147 clocks = <&cpg CPG_MOD 608>;
1148 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1149 resets = <&cpg 608>;
1151 status = "disabled";
1154 vin14: video@e6efe000 {
1155 compatible = "renesas,vin-r8a77980";
1156 reg = <0 0xe6efe000 0 0x1000>;
1157 interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
1158 clocks = <&cpg CPG_MOD 605>;
1159 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1160 resets = <&cpg 605>;
1162 status = "disabled";
1165 vin15: video@e6eff000 {
1166 compatible = "renesas,vin-r8a77980";
1167 reg = <0 0xe6eff000 0 0x1000>;
1168 interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
1169 clocks = <&cpg CPG_MOD 604>;
1170 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1171 resets = <&cpg 604>;
1173 status = "disabled";
1176 dmac1: dma-controller@e7300000 {
1177 compatible = "renesas,dmac-r8a77980",
1178 "renesas,rcar-dmac";
1179 reg = <0 0xe7300000 0 0x10000>;
1180 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1181 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1182 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1183 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1184 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1185 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1186 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1187 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1188 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1189 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
1190 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
1191 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
1192 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
1193 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
1194 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
1195 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
1196 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1197 interrupt-names = "error",
1198 "ch0", "ch1", "ch2", "ch3",
1199 "ch4", "ch5", "ch6", "ch7",
1200 "ch8", "ch9", "ch10", "ch11",
1201 "ch12", "ch13", "ch14", "ch15";
1202 clocks = <&cpg CPG_MOD 218>;
1203 clock-names = "fck";
1204 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1205 resets = <&cpg 218>;
1207 dma-channels = <16>;
1208 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1209 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1210 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1211 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1212 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1213 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1214 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1215 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1218 dmac2: dma-controller@e7310000 {
1219 compatible = "renesas,dmac-r8a77980",
1220 "renesas,rcar-dmac";
1221 reg = <0 0xe7310000 0 0x10000>;
1222 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
1223 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1224 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1225 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1226 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1227 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1228 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1229 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1230 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
1231 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
1232 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
1233 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
1234 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
1235 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
1236 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
1237 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
1238 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
1239 interrupt-names = "error",
1240 "ch0", "ch1", "ch2", "ch3",
1241 "ch4", "ch5", "ch6", "ch7",
1242 "ch8", "ch9", "ch10", "ch11",
1243 "ch12", "ch13", "ch14", "ch15";
1244 clocks = <&cpg CPG_MOD 217>;
1245 clock-names = "fck";
1246 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1247 resets = <&cpg 217>;
1249 dma-channels = <16>;
1250 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1251 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1252 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1253 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1254 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1255 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1256 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1257 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1260 gether: ethernet@e7400000 {
1261 compatible = "renesas,gether-r8a77980";
1262 reg = <0 0xe7400000 0 0x1000>;
1263 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1264 clocks = <&cpg CPG_MOD 813>;
1265 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1266 resets = <&cpg 813>;
1267 #address-cells = <1>;
1269 status = "disabled";
1272 ipmmu_ds1: iommu@e7740000 {
1273 compatible = "renesas,ipmmu-r8a77980";
1274 reg = <0 0xe7740000 0 0x1000>;
1275 renesas,ipmmu-main = <&ipmmu_mm 0>;
1276 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1280 ipmmu_ir: iommu@ff8b0000 {
1281 compatible = "renesas,ipmmu-r8a77980";
1282 reg = <0 0xff8b0000 0 0x1000>;
1283 renesas,ipmmu-main = <&ipmmu_mm 3>;
1284 power-domains = <&sysc R8A77980_PD_A3IR>;
1288 ipmmu_mm: iommu@e67b0000 {
1289 compatible = "renesas,ipmmu-r8a77980";
1290 reg = <0 0xe67b0000 0 0x1000>;
1291 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1292 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1293 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1297 ipmmu_rt: iommu@ffc80000 {
1298 compatible = "renesas,ipmmu-r8a77980";
1299 reg = <0 0xffc80000 0 0x1000>;
1300 renesas,ipmmu-main = <&ipmmu_mm 10>;
1301 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1305 ipmmu_vc0: iommu@fe990000 {
1306 compatible = "renesas,ipmmu-r8a77980";
1307 reg = <0 0xfe990000 0 0x1000>;
1308 renesas,ipmmu-main = <&ipmmu_mm 12>;
1309 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1313 ipmmu_vi0: iommu@febd0000 {
1314 compatible = "renesas,ipmmu-r8a77980";
1315 reg = <0 0xfebd0000 0 0x1000>;
1316 renesas,ipmmu-main = <&ipmmu_mm 14>;
1317 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1321 ipmmu_vip0: iommu@e7b00000 {
1322 compatible = "renesas,ipmmu-r8a77980";
1323 reg = <0 0xe7b00000 0 0x1000>;
1324 renesas,ipmmu-main = <&ipmmu_mm 4>;
1325 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1329 ipmmu_vip1: iommu@e7960000 {
1330 compatible = "renesas,ipmmu-r8a77980";
1331 reg = <0 0xe7960000 0 0x1000>;
1332 renesas,ipmmu-main = <&ipmmu_mm 11>;
1333 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1337 mmc0: mmc@ee140000 {
1338 compatible = "renesas,sdhi-r8a77980",
1339 "renesas,rcar-gen3-sdhi";
1340 reg = <0 0xee140000 0 0x2000>;
1341 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1342 clocks = <&cpg CPG_MOD 314>;
1343 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1344 resets = <&cpg 314>;
1345 max-frequency = <200000000>;
1346 iommus = <&ipmmu_ds1 32>;
1347 status = "disabled";
1351 compatible = "renesas,r8a77980-rpc-if",
1352 "renesas,rcar-gen3-rpc-if";
1353 reg = <0 0xee200000 0 0x200>,
1354 <0 0x08000000 0 0x4000000>,
1355 <0 0xee208000 0 0x100>;
1356 reg-names = "regs", "dirmap", "wbuf";
1357 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1358 clocks = <&cpg CPG_MOD 917>;
1359 clock-names = "rpc";
1360 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1361 resets = <&cpg 917>;
1362 #address-cells = <1>;
1364 status = "disabled";
1367 gic: interrupt-controller@f1010000 {
1368 compatible = "arm,gic-400";
1369 #interrupt-cells = <3>;
1370 #address-cells = <0>;
1371 interrupt-controller;
1372 reg = <0x0 0xf1010000 0 0x1000>,
1373 <0x0 0xf1020000 0 0x20000>,
1374 <0x0 0xf1040000 0 0x20000>,
1375 <0x0 0xf1060000 0 0x20000>;
1376 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
1377 IRQ_TYPE_LEVEL_HIGH)>;
1378 clocks = <&cpg CPG_MOD 408>;
1379 clock-names = "clk";
1380 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1381 resets = <&cpg 408>;
1384 pciec: pcie@fe000000 {
1385 compatible = "renesas,pcie-r8a77980",
1386 "renesas,pcie-rcar-gen3";
1387 reg = <0 0xfe000000 0 0x80000>;
1388 #address-cells = <3>;
1390 bus-range = <0x00 0xff>;
1391 device_type = "pci";
1392 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
1393 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
1394 <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
1395 <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
1396 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1397 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1398 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1399 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1400 #interrupt-cells = <1>;
1401 interrupt-map-mask = <0 0 0 0>;
1402 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1403 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1404 clock-names = "pcie", "pcie_bus";
1405 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1406 resets = <&cpg 319>;
1409 status = "disabled";
1412 vspd0: vsp@fea20000 {
1413 compatible = "renesas,vsp2";
1414 reg = <0 0xfea20000 0 0x5000>;
1415 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1416 clocks = <&cpg CPG_MOD 623>;
1417 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1418 resets = <&cpg 623>;
1419 renesas,fcp = <&fcpvd0>;
1422 fcpvd0: fcp@fea27000 {
1423 compatible = "renesas,fcpv";
1424 reg = <0 0xfea27000 0 0x200>;
1425 clocks = <&cpg CPG_MOD 603>;
1426 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1427 resets = <&cpg 603>;
1430 csi40: csi2@feaa0000 {
1431 compatible = "renesas,r8a77980-csi2";
1432 reg = <0 0xfeaa0000 0 0x10000>;
1433 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1434 clocks = <&cpg CPG_MOD 716>;
1435 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1436 resets = <&cpg 716>;
1437 status = "disabled";
1440 #address-cells = <1>;
1448 #address-cells = <1>;
1453 csi40vin0: endpoint@0 {
1455 remote-endpoint = <&vin0csi40>;
1457 csi40vin1: endpoint@1 {
1459 remote-endpoint = <&vin1csi40>;
1461 csi40vin2: endpoint@2 {
1463 remote-endpoint = <&vin2csi40>;
1465 csi40vin3: endpoint@3 {
1467 remote-endpoint = <&vin3csi40>;
1473 csi41: csi2@feab0000 {
1474 compatible = "renesas,r8a77980-csi2";
1475 reg = <0 0xfeab0000 0 0x10000>;
1476 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
1477 clocks = <&cpg CPG_MOD 715>;
1478 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1479 resets = <&cpg 715>;
1480 status = "disabled";
1483 #address-cells = <1>;
1491 #address-cells = <1>;
1496 csi41vin4: endpoint@0 {
1498 remote-endpoint = <&vin4csi41>;
1500 csi41vin5: endpoint@1 {
1502 remote-endpoint = <&vin5csi41>;
1504 csi41vin6: endpoint@2 {
1506 remote-endpoint = <&vin6csi41>;
1508 csi41vin7: endpoint@3 {
1510 remote-endpoint = <&vin7csi41>;
1516 du: display@feb00000 {
1517 compatible = "renesas,du-r8a77980";
1518 reg = <0 0xfeb00000 0 0x80000>;
1519 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1520 clocks = <&cpg CPG_MOD 724>;
1521 clock-names = "du.0";
1522 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1523 resets = <&cpg 724>;
1524 reset-names = "du.0";
1525 renesas,vsps = <&vspd0 0>;
1527 status = "disabled";
1530 #address-cells = <1>;
1535 du_out_rgb: endpoint {
1541 du_out_lvds0: endpoint {
1542 remote-endpoint = <&lvds0_in>;
1548 lvds0: lvds-encoder@feb90000 {
1549 compatible = "renesas,r8a77980-lvds";
1550 reg = <0 0xfeb90000 0 0x14>;
1551 clocks = <&cpg CPG_MOD 727>;
1552 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1553 resets = <&cpg 727>;
1554 status = "disabled";
1557 #address-cells = <1>;
1562 lvds0_in: endpoint {
1570 lvds0_out: endpoint {
1576 prr: chipid@fff00044 {
1577 compatible = "renesas,prr";
1578 reg = <0 0xfff00044 0 4>;
1584 polling-delay-passive = <250>;
1585 polling-delay = <1000>;
1586 thermal-sensors = <&tsc 0>;
1590 temperature = <95000>;
1591 hysteresis = <1000>;
1595 temperature = <120000>;
1596 hysteresis = <1000>;
1603 polling-delay-passive = <250>;
1604 polling-delay = <1000>;
1605 thermal-sensors = <&tsc 1>;
1609 temperature = <95000>;
1610 hysteresis = <1000>;
1614 temperature = <120000>;
1615 hysteresis = <1000>;
1623 compatible = "arm,armv8-timer";
1624 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
1625 IRQ_TYPE_LEVEL_LOW)>,
1626 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
1627 IRQ_TYPE_LEVEL_LOW)>,
1628 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
1629 IRQ_TYPE_LEVEL_LOW)>,
1630 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
1631 IRQ_TYPE_LEVEL_LOW)>;