1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Eagle board
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
10 #include "r8a77970.dtsi"
13 model = "Renesas Eagle board based on r8a77970";
14 compatible = "renesas,eagle", "renesas,r8a77970";
22 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
23 stdout-path = "serial0:115200n8";
26 d3p3: regulator-fixed {
27 compatible = "regulator-fixed";
28 regulator-name = "fixed-3.3V";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
36 compatible = "hdmi-connector";
40 hdmi_con_out: endpoint {
41 remote-endpoint = <&adv7511_out>;
47 compatible = "thine,thc63lvd1024";
57 thc63lvd1024_in: endpoint {
58 remote-endpoint = <&lvds0_out>;
64 thc63lvd1024_out: endpoint {
65 remote-endpoint = <&adv7511_in>;
72 device_type = "memory";
73 /* first 128MB is reserved for secure area. */
74 reg = <0x0 0x48000000 0x0 0x38000000>;
78 compatible = "fixed-clock";
80 clock-frequency = <148500000>;
85 pinctrl-0 = <&avb_pins>;
86 pinctrl-names = "default";
88 renesas,no-ether-link;
90 rx-internal-delay-ps = <1800>;
91 tx-internal-delay-ps = <2000>;
94 phy0: ethernet-phy@0 {
97 interrupt-parent = <&gpio1>;
98 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
103 pinctrl-0 = <&canfd0_pins>;
104 pinctrl-names = "default";
113 clocks = <&cpg CPG_MOD 724>, <&x1_clk>;
114 clock-names = "du.0", "dclkin.0";
119 clock-frequency = <16666666>;
123 clock-frequency = <32768>;
127 pinctrl-0 = <&i2c0_pins>;
128 pinctrl-names = "default";
131 clock-frequency = <400000>;
133 io_expander: gpio@20 {
134 compatible = "onnn,pca9654";
141 compatible = "adi,adv7511w";
143 interrupt-parent = <&gpio1>;
144 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
146 adi,input-depth = <8>;
147 adi,input-colorspace = "rgb";
148 adi,input-clock = "1x";
151 #address-cells = <1>;
156 adv7511_in: endpoint {
157 remote-endpoint = <&thc63lvd1024_out>;
163 adv7511_out: endpoint {
164 remote-endpoint = <&hdmi_con_out>;
176 lvds0_out: endpoint {
177 remote-endpoint = <&thc63lvd1024_in>;
185 groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
189 canfd0_pins: canfd0 {
190 groups = "canfd0_data_a";
200 groups = "qspi0_ctrl", "qspi0_data4";
205 groups = "scif0_data";
211 pinctrl-0 = <&qspi0_pins>;
212 pinctrl-names = "default";
217 compatible = "spansion,s25fs512s", "jedec,spi-nor";
219 spi-max-frequency = <50000000>;
220 spi-rx-bus-width = <4>;
223 compatible = "fixed-partitions";
224 #address-cells = <1>;
228 reg = <0x00000000 0x040000>;
232 reg = <0x00040000 0x080000>;
235 cert_header_sa3@c0000 {
236 reg = <0x000c0000 0x080000>;
240 reg = <0x00140000 0x040000>;
243 cert_header_sa6@180000 {
244 reg = <0x00180000 0x040000>;
248 reg = <0x001c0000 0x460000>;
252 reg = <0x00640000 0x0c0000>;
256 reg = <0x00700000 0x040000>;
260 reg = <0x00740000 0x080000>;
263 reg = <0x007c0000 0x1400000>;
266 reg = <0x01bc0000 0x2440000>;
278 pinctrl-0 = <&scif0_pins>;
279 pinctrl-names = "default";