1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77961-sysc.h>
12 #define CPG_AUDIO_CLK_I R8A77961_CLK_S0D4
15 compatible = "renesas,r8a77961";
20 * The external audio clocks are configured as 0 Hz fixed frequency
22 * Boards that provide audio clocks should override them.
24 audio_clk_a: audio_clk_a {
25 compatible = "fixed-clock";
27 clock-frequency = <0>;
30 audio_clk_b: audio_clk_b {
31 compatible = "fixed-clock";
33 clock-frequency = <0>;
36 audio_clk_c: audio_clk_c {
37 compatible = "fixed-clock";
39 clock-frequency = <0>;
42 /* External CAN clock - to be overridden by boards that provide it */
44 compatible = "fixed-clock";
46 clock-frequency = <0>;
49 cluster0_opp: opp_table0 {
50 compatible = "operating-points-v2";
54 opp-hz = /bits/ 64 <500000000>;
55 opp-microvolt = <820000>;
56 clock-latency-ns = <300000>;
59 opp-hz = /bits/ 64 <1000000000>;
60 opp-microvolt = <820000>;
61 clock-latency-ns = <300000>;
64 opp-hz = /bits/ 64 <1500000000>;
65 opp-microvolt = <820000>;
66 clock-latency-ns = <300000>;
69 opp-hz = /bits/ 64 <1600000000>;
70 opp-microvolt = <900000>;
71 clock-latency-ns = <300000>;
75 opp-hz = /bits/ 64 <1700000000>;
76 opp-microvolt = <900000>;
77 clock-latency-ns = <300000>;
81 opp-hz = /bits/ 64 <1800000000>;
82 opp-microvolt = <960000>;
83 clock-latency-ns = <300000>;
88 cluster1_opp: opp_table1 {
89 compatible = "operating-points-v2";
93 opp-hz = /bits/ 64 <800000000>;
94 opp-microvolt = <820000>;
95 clock-latency-ns = <300000>;
98 opp-hz = /bits/ 64 <1000000000>;
99 opp-microvolt = <820000>;
100 clock-latency-ns = <300000>;
103 opp-hz = /bits/ 64 <1200000000>;
104 opp-microvolt = <820000>;
105 clock-latency-ns = <300000>;
108 opp-hz = /bits/ 64 <1300000000>;
109 opp-microvolt = <820000>;
110 clock-latency-ns = <300000>;
116 #address-cells = <1>;
146 compatible = "arm,cortex-a57";
149 power-domains = <&sysc R8A77961_PD_CA57_CPU0>;
150 next-level-cache = <&L2_CA57>;
151 enable-method = "psci";
152 cpu-idle-states = <&CPU_SLEEP_0>;
153 dynamic-power-coefficient = <854>;
154 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
155 operating-points-v2 = <&cluster0_opp>;
156 capacity-dmips-mhz = <1024>;
157 #cooling-cells = <2>;
161 compatible = "arm,cortex-a57";
164 power-domains = <&sysc R8A77961_PD_CA57_CPU1>;
165 next-level-cache = <&L2_CA57>;
166 enable-method = "psci";
167 cpu-idle-states = <&CPU_SLEEP_0>;
168 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
169 operating-points-v2 = <&cluster0_opp>;
170 capacity-dmips-mhz = <1024>;
171 #cooling-cells = <2>;
175 compatible = "arm,cortex-a53";
178 power-domains = <&sysc R8A77961_PD_CA53_CPU0>;
179 next-level-cache = <&L2_CA53>;
180 enable-method = "psci";
181 cpu-idle-states = <&CPU_SLEEP_1>;
182 #cooling-cells = <2>;
183 dynamic-power-coefficient = <277>;
184 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
185 operating-points-v2 = <&cluster1_opp>;
186 capacity-dmips-mhz = <535>;
190 compatible = "arm,cortex-a53";
193 power-domains = <&sysc R8A77961_PD_CA53_CPU1>;
194 next-level-cache = <&L2_CA53>;
195 enable-method = "psci";
196 cpu-idle-states = <&CPU_SLEEP_1>;
197 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
198 operating-points-v2 = <&cluster1_opp>;
199 capacity-dmips-mhz = <535>;
203 compatible = "arm,cortex-a53";
206 power-domains = <&sysc R8A77961_PD_CA53_CPU2>;
207 next-level-cache = <&L2_CA53>;
208 enable-method = "psci";
209 cpu-idle-states = <&CPU_SLEEP_1>;
210 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
211 operating-points-v2 = <&cluster1_opp>;
212 capacity-dmips-mhz = <535>;
216 compatible = "arm,cortex-a53";
219 power-domains = <&sysc R8A77961_PD_CA53_CPU3>;
220 next-level-cache = <&L2_CA53>;
221 enable-method = "psci";
222 cpu-idle-states = <&CPU_SLEEP_1>;
223 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
224 operating-points-v2 = <&cluster1_opp>;
225 capacity-dmips-mhz = <535>;
228 L2_CA57: cache-controller-0 {
229 compatible = "cache";
230 power-domains = <&sysc R8A77961_PD_CA57_SCU>;
235 L2_CA53: cache-controller-1 {
236 compatible = "cache";
237 power-domains = <&sysc R8A77961_PD_CA53_SCU>;
243 entry-method = "psci";
245 CPU_SLEEP_0: cpu-sleep-0 {
246 compatible = "arm,idle-state";
247 arm,psci-suspend-param = <0x0010000>;
249 entry-latency-us = <400>;
250 exit-latency-us = <500>;
251 min-residency-us = <4000>;
254 CPU_SLEEP_1: cpu-sleep-1 {
255 compatible = "arm,idle-state";
256 arm,psci-suspend-param = <0x0010000>;
258 entry-latency-us = <700>;
259 exit-latency-us = <700>;
260 min-residency-us = <5000>;
266 compatible = "fixed-clock";
268 /* This value must be overridden by the board */
269 clock-frequency = <0>;
273 compatible = "fixed-clock";
275 /* This value must be overridden by the board */
276 clock-frequency = <0>;
279 /* External PCIe clock - can be overridden by the board */
280 pcie_bus_clk: pcie_bus {
281 compatible = "fixed-clock";
283 clock-frequency = <0>;
287 compatible = "arm,cortex-a53-pmu";
288 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
289 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
290 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
291 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
292 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
296 compatible = "arm,cortex-a57-pmu";
297 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
298 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
299 interrupt-affinity = <&a57_0>, <&a57_1>;
303 compatible = "arm,psci-1.0", "arm,psci-0.2";
307 /* External SCIF clock - to be overridden by boards that provide it */
309 compatible = "fixed-clock";
311 clock-frequency = <0>;
315 compatible = "simple-bus";
316 interrupt-parent = <&gic>;
317 #address-cells = <2>;
321 rwdt: watchdog@e6020000 {
322 compatible = "renesas,r8a77961-wdt",
323 "renesas,rcar-gen3-wdt";
324 reg = <0 0xe6020000 0 0x0c>;
325 clocks = <&cpg CPG_MOD 402>;
326 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
331 gpio0: gpio@e6050000 {
332 compatible = "renesas,gpio-r8a77961",
333 "renesas,rcar-gen3-gpio";
334 reg = <0 0xe6050000 0 0x50>;
335 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
338 gpio-ranges = <&pfc 0 0 16>;
339 #interrupt-cells = <2>;
340 interrupt-controller;
341 clocks = <&cpg CPG_MOD 912>;
342 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
346 gpio1: gpio@e6051000 {
347 compatible = "renesas,gpio-r8a77961",
348 "renesas,rcar-gen3-gpio";
349 reg = <0 0xe6051000 0 0x50>;
350 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
353 gpio-ranges = <&pfc 0 32 29>;
354 #interrupt-cells = <2>;
355 interrupt-controller;
356 clocks = <&cpg CPG_MOD 911>;
357 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
361 gpio2: gpio@e6052000 {
362 compatible = "renesas,gpio-r8a77961",
363 "renesas,rcar-gen3-gpio";
364 reg = <0 0xe6052000 0 0x50>;
365 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
368 gpio-ranges = <&pfc 0 64 15>;
369 #interrupt-cells = <2>;
370 interrupt-controller;
371 clocks = <&cpg CPG_MOD 910>;
372 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
376 gpio3: gpio@e6053000 {
377 compatible = "renesas,gpio-r8a77961",
378 "renesas,rcar-gen3-gpio";
379 reg = <0 0xe6053000 0 0x50>;
380 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
383 gpio-ranges = <&pfc 0 96 16>;
384 #interrupt-cells = <2>;
385 interrupt-controller;
386 clocks = <&cpg CPG_MOD 909>;
387 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
391 gpio4: gpio@e6054000 {
392 compatible = "renesas,gpio-r8a77961",
393 "renesas,rcar-gen3-gpio";
394 reg = <0 0xe6054000 0 0x50>;
395 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
398 gpio-ranges = <&pfc 0 128 18>;
399 #interrupt-cells = <2>;
400 interrupt-controller;
401 clocks = <&cpg CPG_MOD 908>;
402 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
406 gpio5: gpio@e6055000 {
407 compatible = "renesas,gpio-r8a77961",
408 "renesas,rcar-gen3-gpio";
409 reg = <0 0xe6055000 0 0x50>;
410 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
413 gpio-ranges = <&pfc 0 160 26>;
414 #interrupt-cells = <2>;
415 interrupt-controller;
416 clocks = <&cpg CPG_MOD 907>;
417 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
421 gpio6: gpio@e6055400 {
422 compatible = "renesas,gpio-r8a77961",
423 "renesas,rcar-gen3-gpio";
424 reg = <0 0xe6055400 0 0x50>;
425 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
428 gpio-ranges = <&pfc 0 192 32>;
429 #interrupt-cells = <2>;
430 interrupt-controller;
431 clocks = <&cpg CPG_MOD 906>;
432 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
436 gpio7: gpio@e6055800 {
437 compatible = "renesas,gpio-r8a77961",
438 "renesas,rcar-gen3-gpio";
439 reg = <0 0xe6055800 0 0x50>;
440 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
443 gpio-ranges = <&pfc 0 224 4>;
444 #interrupt-cells = <2>;
445 interrupt-controller;
446 clocks = <&cpg CPG_MOD 905>;
447 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
451 pfc: pin-controller@e6060000 {
452 compatible = "renesas,pfc-r8a77961";
453 reg = <0 0xe6060000 0 0x50c>;
456 cpg: clock-controller@e6150000 {
457 compatible = "renesas,r8a77961-cpg-mssr";
458 reg = <0 0xe6150000 0 0x1000>;
459 clocks = <&extal_clk>, <&extalr_clk>;
460 clock-names = "extal", "extalr";
462 #power-domain-cells = <0>;
466 rst: reset-controller@e6160000 {
467 compatible = "renesas,r8a77961-rst";
468 reg = <0 0xe6160000 0 0x0200>;
471 sysc: system-controller@e6180000 {
472 compatible = "renesas,r8a77961-sysc";
473 reg = <0 0xe6180000 0 0x0400>;
474 #power-domain-cells = <1>;
477 intc_ex: interrupt-controller@e61c0000 {
478 #interrupt-cells = <2>;
479 interrupt-controller;
480 reg = <0 0xe61c0000 0 0x200>;
485 #address-cells = <1>;
487 compatible = "renesas,i2c-r8a77961",
488 "renesas,rcar-gen3-i2c";
489 reg = <0 0xe6500000 0 0x40>;
490 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
491 clocks = <&cpg CPG_MOD 931>;
492 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
494 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
495 <&dmac2 0x91>, <&dmac2 0x90>;
496 dma-names = "tx", "rx", "tx", "rx";
497 i2c-scl-internal-delay-ns = <110>;
502 #address-cells = <1>;
504 compatible = "renesas,i2c-r8a77961",
505 "renesas,rcar-gen3-i2c";
506 reg = <0 0xe6508000 0 0x40>;
507 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 930>;
509 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
511 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
512 <&dmac2 0x93>, <&dmac2 0x92>;
513 dma-names = "tx", "rx", "tx", "rx";
514 i2c-scl-internal-delay-ns = <6>;
519 #address-cells = <1>;
521 compatible = "renesas,i2c-r8a77961",
522 "renesas,rcar-gen3-i2c";
523 reg = <0 0xe6510000 0 0x40>;
524 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&cpg CPG_MOD 929>;
526 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
528 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
529 <&dmac2 0x95>, <&dmac2 0x94>;
530 dma-names = "tx", "rx", "tx", "rx";
531 i2c-scl-internal-delay-ns = <6>;
536 #address-cells = <1>;
538 compatible = "renesas,i2c-r8a77961",
539 "renesas,rcar-gen3-i2c";
540 reg = <0 0xe66d0000 0 0x40>;
541 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 928>;
543 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
545 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
546 dma-names = "tx", "rx";
547 i2c-scl-internal-delay-ns = <110>;
552 #address-cells = <1>;
554 compatible = "renesas,i2c-r8a77961",
555 "renesas,rcar-gen3-i2c";
556 reg = <0 0xe66d8000 0 0x40>;
557 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 927>;
559 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
561 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
562 dma-names = "tx", "rx";
563 i2c-scl-internal-delay-ns = <110>;
568 #address-cells = <1>;
570 compatible = "renesas,i2c-r8a77961",
571 "renesas,rcar-gen3-i2c";
572 reg = <0 0xe66e0000 0 0x40>;
573 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&cpg CPG_MOD 919>;
575 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
577 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
578 dma-names = "tx", "rx";
579 i2c-scl-internal-delay-ns = <110>;
584 #address-cells = <1>;
586 compatible = "renesas,i2c-r8a77961",
587 "renesas,rcar-gen3-i2c";
588 reg = <0 0xe66e8000 0 0x40>;
589 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
590 clocks = <&cpg CPG_MOD 918>;
591 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
593 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
594 dma-names = "tx", "rx";
595 i2c-scl-internal-delay-ns = <6>;
599 i2c_dvfs: i2c@e60b0000 {
600 #address-cells = <1>;
602 compatible = "renesas,iic-r8a77961",
603 "renesas,rcar-gen3-iic",
604 "renesas,rmobile-iic";
605 reg = <0 0xe60b0000 0 0x425>;
606 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
607 clocks = <&cpg CPG_MOD 926>;
608 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
610 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
611 dma-names = "tx", "rx";
616 hscif1: serial@e6550000 {
617 reg = <0 0xe6550000 0 0x60>;
621 hsusb: usb@e6590000 {
622 reg = <0 0xe6590000 0 0x200>;
626 usb3_phy0: usb-phy@e65ee000 {
627 reg = <0 0xe65ee000 0 0x90>;
632 dmac0: dma-controller@e6700000 {
633 compatible = "renesas,dmac-r8a77961",
635 reg = <0 0xe6700000 0 0x10000>;
636 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
637 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
638 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
639 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
640 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
641 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
642 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
643 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
644 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
645 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
646 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
647 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
648 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
649 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
650 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
651 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
652 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
653 interrupt-names = "error",
654 "ch0", "ch1", "ch2", "ch3",
655 "ch4", "ch5", "ch6", "ch7",
656 "ch8", "ch9", "ch10", "ch11",
657 "ch12", "ch13", "ch14", "ch15";
658 clocks = <&cpg CPG_MOD 219>;
660 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
666 dmac1: dma-controller@e7300000 {
667 compatible = "renesas,dmac-r8a77961",
669 reg = <0 0xe7300000 0 0x10000>;
670 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
671 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
672 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
673 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
674 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
675 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
676 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
677 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
678 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
679 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
680 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
681 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
682 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
683 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
684 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
685 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
686 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
687 interrupt-names = "error",
688 "ch0", "ch1", "ch2", "ch3",
689 "ch4", "ch5", "ch6", "ch7",
690 "ch8", "ch9", "ch10", "ch11",
691 "ch12", "ch13", "ch14", "ch15";
692 clocks = <&cpg CPG_MOD 218>;
694 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
700 dmac2: dma-controller@e7310000 {
701 compatible = "renesas,dmac-r8a77961",
703 reg = <0 0xe7310000 0 0x10000>;
704 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
705 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
706 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
708 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
709 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
710 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
711 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
712 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
713 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
714 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
715 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
716 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
717 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
718 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
719 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
720 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
721 interrupt-names = "error",
722 "ch0", "ch1", "ch2", "ch3",
723 "ch4", "ch5", "ch6", "ch7",
724 "ch8", "ch9", "ch10", "ch11",
725 "ch12", "ch13", "ch14", "ch15";
726 clocks = <&cpg CPG_MOD 217>;
728 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
734 avb: ethernet@e6800000 {
735 compatible = "renesas,etheravb-r8a77961",
736 "renesas,etheravb-rcar-gen3";
737 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
738 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
739 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
740 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
741 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
742 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
743 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
744 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
745 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
746 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
747 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
748 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
754 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
755 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
756 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
757 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
758 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
763 interrupt-names = "ch0", "ch1", "ch2", "ch3",
764 "ch4", "ch5", "ch6", "ch7",
765 "ch8", "ch9", "ch10", "ch11",
766 "ch12", "ch13", "ch14", "ch15",
767 "ch16", "ch17", "ch18", "ch19",
768 "ch20", "ch21", "ch22", "ch23",
770 clocks = <&cpg CPG_MOD 812>;
771 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
774 #address-cells = <1>;
780 reg = <0 0xe6e31000 0 8>;
785 scif1: serial@e6e68000 {
786 reg = <0 0xe6e68000 0 64>;
790 scif2: serial@e6e88000 {
791 compatible = "renesas,scif-r8a77961",
792 "renesas,rcar-gen3-scif", "renesas,scif";
793 reg = <0 0xe6e88000 0 64>;
794 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
795 clocks = <&cpg CPG_MOD 310>,
796 <&cpg CPG_CORE R8A77961_CLK_S3D1>,
798 clock-names = "fck", "brg_int", "scif_clk";
799 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
804 vin0: video@e6ef0000 {
805 reg = <0 0xe6ef0000 0 0x1000>;
809 vin1: video@e6ef1000 {
810 reg = <0 0xe6ef1000 0 0x1000>;
814 vin2: video@e6ef2000 {
815 reg = <0 0xe6ef2000 0 0x1000>;
819 vin3: video@e6ef3000 {
820 reg = <0 0xe6ef3000 0 0x1000>;
824 vin4: video@e6ef4000 {
825 reg = <0 0xe6ef4000 0 0x1000>;
829 vin5: video@e6ef5000 {
830 reg = <0 0xe6ef5000 0 0x1000>;
834 vin6: video@e6ef6000 {
835 reg = <0 0xe6ef6000 0 0x1000>;
839 vin7: video@e6ef7000 {
840 reg = <0 0xe6ef7000 0 0x1000>;
844 rcar_sound: sound@ec500000 {
845 reg = <0 0xec500000 0 0x1000>, /* SCU */
846 <0 0xec5a0000 0 0x100>, /* ADG */
847 <0 0xec540000 0 0x1000>, /* SSIU */
848 <0 0xec541000 0 0x280>, /* SSI */
849 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
867 xhci0: usb@ee000000 {
868 reg = <0 0xee000000 0 0xc00>;
872 usb3_peri0: usb@ee020000 {
873 reg = <0 0xee020000 0 0x400>;
877 ohci0: usb@ee080000 {
878 reg = <0 0xee080000 0 0x100>;
882 ohci1: usb@ee0a0000 {
883 reg = <0 0xee0a0000 0 0x100>;
887 ehci0: usb@ee080100 {
888 reg = <0 0xee080100 0 0x100>;
892 ehci1: usb@ee0a0100 {
893 reg = <0 0xee0a0100 0 0x100>;
897 usb2_phy0: usb-phy@ee080200 {
898 reg = <0 0xee080200 0 0x700>;
902 usb2_phy1: usb-phy@ee0a0200 {
903 reg = <0 0xee0a0200 0 0x700>;
908 compatible = "renesas,sdhi-r8a77961",
909 "renesas,rcar-gen3-sdhi";
910 reg = <0 0xee100000 0 0x2000>;
911 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
912 clocks = <&cpg CPG_MOD 314>;
913 max-frequency = <200000000>;
914 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
920 compatible = "renesas,sdhi-r8a77961",
921 "renesas,rcar-gen3-sdhi";
922 reg = <0 0xee120000 0 0x2000>;
923 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
924 clocks = <&cpg CPG_MOD 313>;
925 max-frequency = <200000000>;
926 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
932 compatible = "renesas,sdhi-r8a77961",
933 "renesas,rcar-gen3-sdhi";
934 reg = <0 0xee140000 0 0x2000>;
935 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
936 clocks = <&cpg CPG_MOD 312>;
937 max-frequency = <200000000>;
938 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
944 compatible = "renesas,sdhi-r8a77961",
945 "renesas,rcar-gen3-sdhi";
946 reg = <0 0xee160000 0 0x2000>;
947 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
948 clocks = <&cpg CPG_MOD 311>;
949 max-frequency = <200000000>;
950 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
955 gic: interrupt-controller@f1010000 {
956 compatible = "arm,gic-400";
957 #interrupt-cells = <3>;
958 #address-cells = <0>;
959 interrupt-controller;
960 reg = <0x0 0xf1010000 0 0x1000>,
961 <0x0 0xf1020000 0 0x20000>,
962 <0x0 0xf1040000 0 0x20000>,
963 <0x0 0xf1060000 0 0x20000>;
964 interrupts = <GIC_PPI 9
965 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
966 clocks = <&cpg CPG_MOD 408>;
968 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
972 pciec0: pcie@fe000000 {
973 reg = <0 0xfe000000 0 0x80000>;
977 pciec1: pcie@ee800000 {
978 reg = <0 0xee800000 0 0x80000>;
982 csi20: csi2@fea80000 {
983 reg = <0 0xfea80000 0 0x10000>;
987 #address-cells = <1>;
991 #address-cells = <1>;
998 csi40: csi2@feaa0000 {
999 reg = <0 0xfeaa0000 0 0x10000>;
1003 #address-cells = <1>;
1007 #address-cells = <1>;
1015 hdmi0: hdmi@fead0000 {
1016 reg = <0 0xfead0000 0 0x10000>;
1020 #address-cells = <1>;
1035 du: display@feb00000 {
1036 reg = <0 0xfeb00000 0 0x70000>;
1040 #address-cells = <1>;
1045 du_out_rgb: endpoint {
1050 du_out_hdmi0: endpoint {
1055 du_out_lvds0: endpoint {
1061 prr: chipid@fff00044 {
1062 compatible = "renesas,prr";
1063 reg = <0 0xfff00044 0 4>;
1068 compatible = "arm,armv8-timer";
1069 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
1070 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
1071 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
1072 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
1075 /* External USB clocks - can be overridden by the board */
1076 usb3s0_clk: usb3s0 {
1077 compatible = "fixed-clock";
1079 clock-frequency = <0>;
1082 usb_extal_clk: usb_extal {
1083 compatible = "fixed-clock";
1085 clock-frequency = <0>;