arch/arm64/boot/dts/renesas/r8a7796.dtsi

   1 /*
   2  * Device Tree Source for the r8a7796 SoC
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7796-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7796";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c_dvfs;
  29         };
  30
  31         psci {
  32                 compatible = "arm,psci-0.2";
  33                 method = "smc";
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 /* 1 core only at this point */
  41                 a57_0: cpu@0 {
  42                         compatible = "arm,cortex-a57", "arm,armv8";
  43                         reg = <0x0>;
  44                         device_type = "cpu";
  45                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
  46                         next-level-cache = <&L2_CA57>;
  47                         enable-method = "psci";
  48                 };
  49
  50                 L2_CA57: cache-controller@0 {
  51                         compatible = "cache";
  52                         reg = <0>;
  53                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
  54                         cache-unified;
  55                         cache-level = <2>;
  56                 };
  57         };
  58
  59         extal_clk: extal {
  60                 compatible = "fixed-clock";
  61                 #clock-cells = <0>;
  62                 /* This value must be overridden by the board */
  63                 clock-frequency = <0>;
  64         };
  65
  66         extalr_clk: extalr {
  67                 compatible = "fixed-clock";
  68                 #clock-cells = <0>;
  69                 /* This value must be overridden by the board */
  70                 clock-frequency = <0>;
  71         };
  72
  73         /* External CAN clock - to be overridden by boards that provide it */
  74         can_clk: can {
  75                 compatible = "fixed-clock";
  76                 #clock-cells = <0>;
  77                 clock-frequency = <0>;
  78         };
  79
  80         /* External SCIF clock - to be overridden by boards that provide it */
  81         scif_clk: scif {
  82                 compatible = "fixed-clock";
  83                 #clock-cells = <0>;
  84                 clock-frequency = <0>;
  85         };
  86
  87         soc {
  88                 compatible = "simple-bus";
  89                 interrupt-parent = <&gic>;
  90                 #address-cells = <2>;
  91                 #size-cells = <2>;
  92                 ranges;
  93
  94                 gic: interrupt-controller@f1010000 {
  95                         compatible = "arm,gic-400";
  96                         #interrupt-cells = <3>;
  97                         #address-cells = <0>;
  98                         interrupt-controller;
  99                         reg = <0x0 0xf1010000 0 0x1000>,
 100                               <0x0 0xf1020000 0 0x20000>,
 101                               <0x0 0xf1040000 0 0x20000>,
 102                               <0x0 0xf1060000 0 0x20000>;
 103                         interrupts = <GIC_PPI 9
 104                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
 105                         clocks = <&cpg CPG_MOD 408>;
 106                         clock-names = "clk";
 107                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 108                 };
 109
 110                 timer {
 111                         compatible = "arm,armv8-timer";
 112                         interrupts = <GIC_PPI 13
 113                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 114                                      <GIC_PPI 14
 115                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 116                                      <GIC_PPI 11
 117                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 118                                      <GIC_PPI 10
 119                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
 120                 };
 121
 122                 wdt0: watchdog@e6020000 {
 123                         compatible = "renesas,r8a7796-wdt",
 124                                      "renesas,rcar-gen3-wdt";
 125                         reg = <0 0xe6020000 0 0x0c>;
 126                         clocks = <&cpg CPG_MOD 402>;
 127                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 128                         status = "disabled";
 129                 };
 130
 131                 gpio0: gpio@e6050000 {
 132                         compatible = "renesas,gpio-r8a7796",
 133                                      "renesas,gpio-rcar";
 134                         reg = <0 0xe6050000 0 0x50>;
 135                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 136                         #gpio-cells = <2>;
 137                         gpio-controller;
 138                         gpio-ranges = <&pfc 0 0 16>;
 139                         #interrupt-cells = <2>;
 140                         interrupt-controller;
 141                         clocks = <&cpg CPG_MOD 912>;
 142                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 143                 };
 144
 145                 gpio1: gpio@e6051000 {
 146                         compatible = "renesas,gpio-r8a7796",
 147                                      "renesas,gpio-rcar";
 148                         reg = <0 0xe6051000 0 0x50>;
 149                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 150                         #gpio-cells = <2>;
 151                         gpio-controller;
 152                         gpio-ranges = <&pfc 0 32 29>;
 153                         #interrupt-cells = <2>;
 154                         interrupt-controller;
 155                         clocks = <&cpg CPG_MOD 911>;
 156                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 157                 };
 158
 159                 gpio2: gpio@e6052000 {
 160                         compatible = "renesas,gpio-r8a7796",
 161                                      "renesas,gpio-rcar";
 162                         reg = <0 0xe6052000 0 0x50>;
 163                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 164                         #gpio-cells = <2>;
 165                         gpio-controller;
 166                         gpio-ranges = <&pfc 0 64 15>;
 167                         #interrupt-cells = <2>;
 168                         interrupt-controller;
 169                         clocks = <&cpg CPG_MOD 910>;
 170                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 171                 };
 172
 173                 gpio3: gpio@e6053000 {
 174                         compatible = "renesas,gpio-r8a7796",
 175                                      "renesas,gpio-rcar";
 176                         reg = <0 0xe6053000 0 0x50>;
 177                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 178                         #gpio-cells = <2>;
 179                         gpio-controller;
 180                         gpio-ranges = <&pfc 0 96 16>;
 181                         #interrupt-cells = <2>;
 182                         interrupt-controller;
 183                         clocks = <&cpg CPG_MOD 909>;
 184                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 185                 };
 186
 187                 gpio4: gpio@e6054000 {
 188                         compatible = "renesas,gpio-r8a7796",
 189                                      "renesas,gpio-rcar";
 190                         reg = <0 0xe6054000 0 0x50>;
 191                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 192                         #gpio-cells = <2>;
 193                         gpio-controller;
 194                         gpio-ranges = <&pfc 0 128 18>;
 195                         #interrupt-cells = <2>;
 196                         interrupt-controller;
 197                         clocks = <&cpg CPG_MOD 908>;
 198                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 199                 };
 200
 201                 gpio5: gpio@e6055000 {
 202                         compatible = "renesas,gpio-r8a7796",
 203                                      "renesas,gpio-rcar";
 204                         reg = <0 0xe6055000 0 0x50>;
 205                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 206                         #gpio-cells = <2>;
 207                         gpio-controller;
 208                         gpio-ranges = <&pfc 0 160 26>;
 209                         #interrupt-cells = <2>;
 210                         interrupt-controller;
 211                         clocks = <&cpg CPG_MOD 907>;
 212                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 213                 };
 214
 215                 gpio6: gpio@e6055400 {
 216                         compatible = "renesas,gpio-r8a7796",
 217                                      "renesas,gpio-rcar";
 218                         reg = <0 0xe6055400 0 0x50>;
 219                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 220                         #gpio-cells = <2>;
 221                         gpio-controller;
 222                         gpio-ranges = <&pfc 0 192 32>;
 223                         #interrupt-cells = <2>;
 224                         interrupt-controller;
 225                         clocks = <&cpg CPG_MOD 906>;
 226                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 227                 };
 228
 229                 gpio7: gpio@e6055800 {
 230                         compatible = "renesas,gpio-r8a7796",
 231                                      "renesas,gpio-rcar";
 232                         reg = <0 0xe6055800 0 0x50>;
 233                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 234                         #gpio-cells = <2>;
 235                         gpio-controller;
 236                         gpio-ranges = <&pfc 0 224 4>;
 237                         #interrupt-cells = <2>;
 238                         interrupt-controller;
 239                         clocks = <&cpg CPG_MOD 905>;
 240                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 241                 };
 242
 243                 pfc: pin-controller@e6060000 {
 244                         compatible = "renesas,pfc-r8a7796";
 245                         reg = <0 0xe6060000 0 0x50c>;
 246                 };
 247
 248                 cpg: clock-controller@e6150000 {
 249                         compatible = "renesas,r8a7796-cpg-mssr";
 250                         reg = <0 0xe6150000 0 0x1000>;
 251                         clocks = <&extal_clk>, <&extalr_clk>;
 252                         clock-names = "extal", "extalr";
 253                         #clock-cells = <2>;
 254                         #power-domain-cells = <0>;
 255                 };
 256
 257                 rst: reset-controller@e6160000 {
 258                         compatible = "renesas,r8a7796-rst";
 259                         reg = <0 0xe6160000 0 0x0200>;
 260                 };
 261
 262                 prr: chipid@fff00044 {
 263                         compatible = "renesas,prr";
 264                         reg = <0 0xfff00044 0 4>;
 265                 };
 266
 267                 sysc: system-controller@e6180000 {
 268                         compatible = "renesas,r8a7796-sysc";
 269                         reg = <0 0xe6180000 0 0x0400>;
 270                         #power-domain-cells = <1>;
 271                 };
 272
 273                 i2c_dvfs: i2c@e60b0000 {
 274                         #address-cells = <1>;
 275                         #size-cells = <0>;
 276                         compatible = "renesas,iic-r8a7796",
 277                                      "renesas,rcar-gen3-iic",
 278                                      "renesas,rmobile-iic";
 279                         reg = <0 0xe60b0000 0 0x425>;
 280                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 281                         clocks = <&cpg CPG_MOD 926>;
 282                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 283                         status = "disabled";
 284                 };
 285
 286                 i2c0: i2c@e6500000 {
 287                         #address-cells = <1>;
 288                         #size-cells = <0>;
 289                         compatible = "renesas,i2c-r8a7796",
 290                                      "renesas,rcar-gen3-i2c";
 291                         reg = <0 0xe6500000 0 0x40>;
 292                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 293                         clocks = <&cpg CPG_MOD 931>;
 294                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 295                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 296                                <&dmac2 0x91>, <&dmac2 0x90>;
 297                         dma-names = "tx", "rx", "tx", "rx";
 298                         i2c-scl-internal-delay-ns = <110>;
 299                         status = "disabled";
 300                 };
 301
 302                 i2c1: i2c@e6508000 {
 303                         #address-cells = <1>;
 304                         #size-cells = <0>;
 305                         compatible = "renesas,i2c-r8a7796",
 306                                      "renesas,rcar-gen3-i2c";
 307                         reg = <0 0xe6508000 0 0x40>;
 308                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 309                         clocks = <&cpg CPG_MOD 930>;
 310                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 311                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 312                                <&dmac2 0x93>, <&dmac2 0x92>;
 313                         dma-names = "tx", "rx", "tx", "rx";
 314                         i2c-scl-internal-delay-ns = <6>;
 315                         status = "disabled";
 316                 };
 317
 318                 i2c2: i2c@e6510000 {
 319                         #address-cells = <1>;
 320                         #size-cells = <0>;
 321                         compatible = "renesas,i2c-r8a7796",
 322                                      "renesas,rcar-gen3-i2c";
 323                         reg = <0 0xe6510000 0 0x40>;
 324                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 325                         clocks = <&cpg CPG_MOD 929>;
 326                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 327                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 328                                <&dmac2 0x95>, <&dmac2 0x94>;
 329                         dma-names = "tx", "rx", "tx", "rx";
 330                         i2c-scl-internal-delay-ns = <6>;
 331                         status = "disabled";
 332                 };
 333
 334                 i2c3: i2c@e66d0000 {
 335                         #address-cells = <1>;
 336                         #size-cells = <0>;
 337                         compatible = "renesas,i2c-r8a7796",
 338                                      "renesas,rcar-gen3-i2c";
 339                         reg = <0 0xe66d0000 0 0x40>;
 340                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 341                         clocks = <&cpg CPG_MOD 928>;
 342                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 343                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 344                         dma-names = "tx", "rx";
 345                         i2c-scl-internal-delay-ns = <110>;
 346                         status = "disabled";
 347                 };
 348
 349                 i2c4: i2c@e66d8000 {
 350                         #address-cells = <1>;
 351                         #size-cells = <0>;
 352                         compatible = "renesas,i2c-r8a7796",
 353                                      "renesas,rcar-gen3-i2c";
 354                         reg = <0 0xe66d8000 0 0x40>;
 355                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 356                         clocks = <&cpg CPG_MOD 927>;
 357                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 358                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 359                         dma-names = "tx", "rx";
 360                         i2c-scl-internal-delay-ns = <110>;
 361                         status = "disabled";
 362                 };
 363
 364                 i2c5: i2c@e66e0000 {
 365                         #address-cells = <1>;
 366                         #size-cells = <0>;
 367                         compatible = "renesas,i2c-r8a7796",
 368                                      "renesas,rcar-gen3-i2c";
 369                         reg = <0 0xe66e0000 0 0x40>;
 370                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 371                         clocks = <&cpg CPG_MOD 919>;
 372                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 373                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 374                         dma-names = "tx", "rx";
 375                         i2c-scl-internal-delay-ns = <110>;
 376                         status = "disabled";
 377                 };
 378
 379                 i2c6: i2c@e66e8000 {
 380                         #address-cells = <1>;
 381                         #size-cells = <0>;
 382                         compatible = "renesas,i2c-r8a7796",
 383                                      "renesas,rcar-gen3-i2c";
 384                         reg = <0 0xe66e8000 0 0x40>;
 385                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 386                         clocks = <&cpg CPG_MOD 918>;
 387                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 388                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 389                         dma-names = "tx", "rx";
 390                         i2c-scl-internal-delay-ns = <6>;
 391                         status = "disabled";
 392                 };
 393
 394                 can0: can@e6c30000 {
 395                         compatible = "renesas,can-r8a7796",
 396                                      "renesas,rcar-gen3-can";
 397                         reg = <0 0xe6c30000 0 0x1000>;
 398                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 399                         clocks = <&cpg CPG_MOD 916>,
 400                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 401                                <&can_clk>;
 402                         clock-names = "clkp1", "clkp2", "can_clk";
 403                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 404                         assigned-clock-rates = <40000000>;
 405                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 406                         status = "disabled";
 407                 };
 408
 409                 can1: can@e6c38000 {
 410                         compatible = "renesas,can-r8a7796",
 411                                      "renesas,rcar-gen3-can";
 412                         reg = <0 0xe6c38000 0 0x1000>;
 413                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 414                         clocks = <&cpg CPG_MOD 915>,
 415                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 416                                <&can_clk>;
 417                         clock-names = "clkp1", "clkp2", "can_clk";
 418                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 419                         assigned-clock-rates = <40000000>;
 420                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 421                         status = "disabled";
 422                 };
 423
 424                 canfd: can@e66c0000 {
 425                         compatible = "renesas,r8a7796-canfd",
 426                                      "renesas,rcar-gen3-canfd";
 427                         reg = <0 0xe66c0000 0 0x8000>;
 428                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 429                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 430                         clocks = <&cpg CPG_MOD 914>,
 431                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 432                                <&can_clk>;
 433                         clock-names = "fck", "canfd", "can_clk";
 434                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 435                         assigned-clock-rates = <40000000>;
 436                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 437                         status = "disabled";
 438
 439                         channel0 {
 440                                 status = "disabled";
 441                         };
 442
 443                         channel1 {
 444                                 status = "disabled";
 445                         };
 446                 };
 447
 448                 avb: ethernet@e6800000 {
 449                         compatible = "renesas,etheravb-r8a7796",
 450                                      "renesas,etheravb-rcar-gen3";
 451                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 452                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 453                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 454                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 455                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 456                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 457                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 458                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 459                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 460                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 461                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 462                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 463                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 464                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 465                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 466                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 467                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 468                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 469                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 470                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 471                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 472                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 473                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 474                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 475                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 476                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 477                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 478                                           "ch4", "ch5", "ch6", "ch7",
 479                                           "ch8", "ch9", "ch10", "ch11",
 480                                           "ch12", "ch13", "ch14", "ch15",
 481                                           "ch16", "ch17", "ch18", "ch19",
 482                                           "ch20", "ch21", "ch22", "ch23",
 483                                           "ch24";
 484                         clocks = <&cpg CPG_MOD 812>;
 485                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 486                         phy-mode = "rgmii-txid";
 487                         #address-cells = <1>;
 488                         #size-cells = <0>;
 489                         status = "disabled";
 490                 };
 491
 492                 hscif0: serial@e6540000 {
 493                         compatible = "renesas,hscif-r8a7796",
 494                                      "renesas,rcar-gen3-hscif",
 495                                      "renesas,hscif";
 496                         reg = <0 0xe6540000 0 0x60>;
 497                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 498                         clocks = <&cpg CPG_MOD 520>,
 499                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 500                                  <&scif_clk>;
 501                         clock-names = "fck", "brg_int", "scif_clk";
 502                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 503                         status = "disabled";
 504                 };
 505
 506                 hscif1: serial@e6550000 {
 507                         compatible = "renesas,hscif-r8a7796",
 508                                      "renesas,rcar-gen3-hscif",
 509                                      "renesas,hscif";
 510                         reg = <0 0xe6550000 0 0x60>;
 511                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 512                         clocks = <&cpg CPG_MOD 519>,
 513                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 514                                  <&scif_clk>;
 515                         clock-names = "fck", "brg_int", "scif_clk";
 516                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 517                         status = "disabled";
 518                 };
 519
 520                 hscif2: serial@e6560000 {
 521                         compatible = "renesas,hscif-r8a7796",
 522                                      "renesas,rcar-gen3-hscif",
 523                                      "renesas,hscif";
 524                         reg = <0 0xe6560000 0 0x60>;
 525                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 526                         clocks = <&cpg CPG_MOD 518>,
 527                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 528                                  <&scif_clk>;
 529                         clock-names = "fck", "brg_int", "scif_clk";
 530                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 531                         status = "disabled";
 532                 };
 533
 534                 hscif3: serial@e66a0000 {
 535                         compatible = "renesas,hscif-r8a7796",
 536                                      "renesas,rcar-gen3-hscif",
 537                                      "renesas,hscif";
 538                         reg = <0 0xe66a0000 0 0x60>;
 539                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 540                         clocks = <&cpg CPG_MOD 517>,
 541                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 542                                  <&scif_clk>;
 543                         clock-names = "fck", "brg_int", "scif_clk";
 544                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 545                         status = "disabled";
 546                 };
 547
 548                 hscif4: serial@e66b0000 {
 549                         compatible = "renesas,hscif-r8a7796",
 550                                      "renesas,rcar-gen3-hscif",
 551                                      "renesas,hscif";
 552                         reg = <0 0xe66b0000 0 0x60>;
 553                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 554                         clocks = <&cpg CPG_MOD 516>,
 555                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 556                                  <&scif_clk>;
 557                         clock-names = "fck", "brg_int", "scif_clk";
 558                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 559                         status = "disabled";
 560                 };
 561
 562                 scif0: serial@e6e60000 {
 563                         compatible = "renesas,scif-r8a7796",
 564                                      "renesas,rcar-gen3-scif", "renesas,scif";
 565                         reg = <0 0xe6e60000 0 64>;
 566                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 567                         clocks = <&cpg CPG_MOD 207>,
 568                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 569                                  <&scif_clk>;
 570                         clock-names = "fck", "brg_int", "scif_clk";
 571                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 572                         status = "disabled";
 573                 };
 574
 575                 scif1: serial@e6e68000 {
 576                         compatible = "renesas,scif-r8a7796",
 577                                      "renesas,rcar-gen3-scif", "renesas,scif";
 578                         reg = <0 0xe6e68000 0 64>;
 579                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 580                         clocks = <&cpg CPG_MOD 206>,
 581                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 582                                  <&scif_clk>;
 583                         clock-names = "fck", "brg_int", "scif_clk";
 584                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 585                         status = "disabled";
 586                 };
 587
 588                 scif2: serial@e6e88000 {
 589                         compatible = "renesas,scif-r8a7796",
 590                                      "renesas,rcar-gen3-scif", "renesas,scif";
 591                         reg = <0 0xe6e88000 0 64>;
 592                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 593                         clocks = <&cpg CPG_MOD 310>,
 594                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 595                                  <&scif_clk>;
 596                         clock-names = "fck", "brg_int", "scif_clk";
 597                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 598                         status = "disabled";
 599                 };
 600
 601                 scif3: serial@e6c50000 {
 602                         compatible = "renesas,scif-r8a7796",
 603                                      "renesas,rcar-gen3-scif", "renesas,scif";
 604                         reg = <0 0xe6c50000 0 64>;
 605                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 606                         clocks = <&cpg CPG_MOD 204>,
 607                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 608                                  <&scif_clk>;
 609                         clock-names = "fck", "brg_int", "scif_clk";
 610                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 611                         status = "disabled";
 612                 };
 613
 614                 scif4: serial@e6c40000 {
 615                         compatible = "renesas,scif-r8a7796",
 616                                      "renesas,rcar-gen3-scif", "renesas,scif";
 617                         reg = <0 0xe6c40000 0 64>;
 618                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 619                         clocks = <&cpg CPG_MOD 203>,
 620                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 621                                  <&scif_clk>;
 622                         clock-names = "fck", "brg_int", "scif_clk";
 623                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 624                         status = "disabled";
 625                 };
 626
 627                 scif5: serial@e6f30000 {
 628                         compatible = "renesas,scif-r8a7796",
 629                                      "renesas,rcar-gen3-scif", "renesas,scif";
 630                         reg = <0 0xe6f30000 0 64>;
 631                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 632                         clocks = <&cpg CPG_MOD 202>,
 633                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 634                                  <&scif_clk>;
 635                         clock-names = "fck", "brg_int", "scif_clk";
 636                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 637                         status = "disabled";
 638                 };
 639
 640                 msiof0: spi@e6e90000 {
 641                         compatible = "renesas,msiof-r8a7796",
 642                                      "renesas,rcar-gen3-msiof";
 643                         reg = <0 0xe6e90000 0 0x0064>;
 644                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 645                         clocks = <&cpg CPG_MOD 211>;
 646                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
 647                                <&dmac2 0x41>, <&dmac2 0x40>;
 648                         dma-names = "tx", "rx";
 649                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 650                         #address-cells = <1>;
 651                         #size-cells = <0>;
 652                         status = "disabled";
 653                 };
 654
 655                 msiof1: spi@e6ea0000 {
 656                         compatible = "renesas,msiof-r8a7796",
 657                                      "renesas,rcar-gen3-msiof";
 658                         reg = <0 0xe6ea0000 0 0x0064>;
 659                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 660                         clocks = <&cpg CPG_MOD 210>;
 661                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
 662                                <&dmac2 0x43>, <&dmac2 0x42>;
 663                         dma-names = "tx", "rx";
 664                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 665                         #address-cells = <1>;
 666                         #size-cells = <0>;
 667                         status = "disabled";
 668                 };
 669
 670                 msiof2: spi@e6c00000 {
 671                         compatible = "renesas,msiof-r8a7796",
 672                                      "renesas,rcar-gen3-msiof";
 673                         reg = <0 0xe6c00000 0 0x0064>;
 674                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 675                         clocks = <&cpg CPG_MOD 209>;
 676                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
 677                         dma-names = "tx", "rx";
 678                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 679                         #address-cells = <1>;
 680                         #size-cells = <0>;
 681                         status = "disabled";
 682                 };
 683
 684                 msiof3: spi@e6c10000 {
 685                         compatible = "renesas,msiof-r8a7796",
 686                                      "renesas,rcar-gen3-msiof";
 687                         reg = <0 0xe6c10000 0 0x0064>;
 688                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 689                         clocks = <&cpg CPG_MOD 208>;
 690                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
 691                         dma-names = "tx", "rx";
 692                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 693                         #address-cells = <1>;
 694                         #size-cells = <0>;
 695                         status = "disabled";
 696                 };
 697
 698                 dmac0: dma-controller@e6700000 {
 699                         compatible = "renesas,dmac-r8a7796",
 700                                      "renesas,rcar-dmac";
 701                         reg = <0 0xe6700000 0 0x10000>;
 702                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 703                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 704                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 705                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 706                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 707                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 708                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 709                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 710                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 711                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 712                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 713                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 714                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 715                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 716                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 717                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 718                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 719                         interrupt-names = "error",
 720                                         "ch0", "ch1", "ch2", "ch3",
 721                                         "ch4", "ch5", "ch6", "ch7",
 722                                         "ch8", "ch9", "ch10", "ch11",
 723                                         "ch12", "ch13", "ch14", "ch15";
 724                         clocks = <&cpg CPG_MOD 219>;
 725                         clock-names = "fck";
 726                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 727                         #dma-cells = <1>;
 728                         dma-channels = <16>;
 729                 };
 730
 731                 dmac1: dma-controller@e7300000 {
 732                         compatible = "renesas,dmac-r8a7796",
 733                                      "renesas,rcar-dmac";
 734                         reg = <0 0xe7300000 0 0x10000>;
 735                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 736                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 737                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 738                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 739                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 740                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 741                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 742                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 743                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 744                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 745                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 746                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 747                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 748                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 749                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 750                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 751                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 752                         interrupt-names = "error",
 753                                         "ch0", "ch1", "ch2", "ch3",
 754                                         "ch4", "ch5", "ch6", "ch7",
 755                                         "ch8", "ch9", "ch10", "ch11",
 756                                         "ch12", "ch13", "ch14", "ch15";
 757                         clocks = <&cpg CPG_MOD 218>;
 758                         clock-names = "fck";
 759                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 760                         #dma-cells = <1>;
 761                         dma-channels = <16>;
 762                 };
 763
 764                 dmac2: dma-controller@e7310000 {
 765                         compatible = "renesas,dmac-r8a7796",
 766                                      "renesas,rcar-dmac";
 767                         reg = <0 0xe7310000 0 0x10000>;
 768                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 769                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 770                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 771                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 772                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 773                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 774                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 775                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 776                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 777                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 778                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 779                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 780                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 781                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 782                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 783                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 784                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 785                         interrupt-names = "error",
 786                                         "ch0", "ch1", "ch2", "ch3",
 787                                         "ch4", "ch5", "ch6", "ch7",
 788                                         "ch8", "ch9", "ch10", "ch11",
 789                                         "ch12", "ch13", "ch14", "ch15";
 790                         clocks = <&cpg CPG_MOD 217>;
 791                         clock-names = "fck";
 792                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 793                         #dma-cells = <1>;
 794                         dma-channels = <16>;
 795                 };
 796
 797                 sdhi0: sd@ee100000 {
 798                         compatible = "renesas,sdhi-r8a7796";
 799                         reg = <0 0xee100000 0 0x2000>;
 800                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 801                         clocks = <&cpg CPG_MOD 314>;
 802                         max-frequency = <200000000>;
 803                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 804                         status = "disabled";
 805                 };
 806
 807                 sdhi1: sd@ee120000 {
 808                         compatible = "renesas,sdhi-r8a7796";
 809                         reg = <0 0xee120000 0 0x2000>;
 810                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 811                         clocks = <&cpg CPG_MOD 313>;
 812                         max-frequency = <200000000>;
 813                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 814                         status = "disabled";
 815                 };
 816
 817                 sdhi2: sd@ee140000 {
 818                         compatible = "renesas,sdhi-r8a7796";
 819                         reg = <0 0xee140000 0 0x2000>;
 820                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 821                         clocks = <&cpg CPG_MOD 312>;
 822                         max-frequency = <200000000>;
 823                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 824                         status = "disabled";
 825                 };
 826
 827                 sdhi3: sd@ee160000 {
 828                         compatible = "renesas,sdhi-r8a7796";
 829                         reg = <0 0xee160000 0 0x2000>;
 830                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 831                         clocks = <&cpg CPG_MOD 311>;
 832                         max-frequency = <200000000>;
 833                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 834                         status = "disabled";
 835                 };
 836
 837                 tsc: thermal@e6198000 {
 838                         compatible = "renesas,r8a7796-thermal";
 839                         reg = <0 0xe6198000 0 0x68>,
 840                               <0 0xe61a0000 0 0x5c>,
 841                               <0 0xe61a8000 0 0x5c>;
 842                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 843                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 844                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 845                         clocks = <&cpg CPG_MOD 522>;
 846                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 847                         #thermal-sensor-cells = <1>;
 848                         status = "okay";
 849                 };
 850
 851                 thermal-zones {
 852                         sensor_thermal1: sensor-thermal1 {
 853                                 polling-delay-passive = <250>;
 854                                 polling-delay = <1000>;
 855                                 thermal-sensors = <&tsc 0>;
 856
 857                                 trips {
 858                                         sensor1_crit: sensor1-crit {
 859                                                 temperature = <120000>;
 860                                                 hysteresis = <2000>;
 861                                                 type = "critical";
 862                                         };
 863                                 };
 864                         };
 865
 866                         sensor_thermal2: sensor-thermal2 {
 867                                 polling-delay-passive = <250>;
 868                                 polling-delay = <1000>;
 869                                 thermal-sensors = <&tsc 1>;
 870
 871                                 trips {
 872                                         sensor2_crit: sensor2-crit {
 873                                                 temperature = <120000>;
 874                                                 hysteresis = <2000>;
 875                                                 type = "critical";
 876                                         };
 877                                 };
 878                         };
 879
 880                         sensor_thermal3: sensor-thermal3 {
 881                                 polling-delay-passive = <250>;
 882                                 polling-delay = <1000>;
 883                                 thermal-sensors = <&tsc 2>;
 884
 885                                 trips {
 886                                         sensor3_crit: sensor3-crit {
 887                                                 temperature = <120000>;
 888                                                 hysteresis = <2000>;
 889                                                 type = "critical";
 890                                         };
 891                                 };
 892                         };
 893                 };
 894         };
 895 };