arch/arm64/boot/dts/renesas/r8a774a1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a774a1 SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
  11 #include <dt-bindings/power/r8a774a1-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a774a1";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         aliases {
  19                 i2c0 = &i2c0;
  20                 i2c1 = &i2c1;
  21                 i2c2 = &i2c2;
  22                 i2c3 = &i2c3;
  23                 i2c4 = &i2c4;
  24                 i2c5 = &i2c5;
  25                 i2c6 = &i2c6;
  26                 i2c7 = &i2c_dvfs;
  27         };
  28
  29         /*
  30          * The external audio clocks are configured as 0 Hz fixed frequency
  31          * clocks by default.
  32          * Boards that provide audio clocks should override them.
  33          */
  34         audio_clk_a: audio_clk_a {
  35                 compatible = "fixed-clock";
  36                 #clock-cells = <0>;
  37                 clock-frequency = <0>;
  38         };
  39
  40         audio_clk_b: audio_clk_b {
  41                 compatible = "fixed-clock";
  42                 #clock-cells = <0>;
  43                 clock-frequency = <0>;
  44         };
  45
  46         audio_clk_c: audio_clk_c {
  47                 compatible = "fixed-clock";
  48                 #clock-cells = <0>;
  49                 clock-frequency = <0>;
  50         };
  51
  52         /* External CAN clock - to be overridden by boards that provide it */
  53         can_clk: can {
  54                 compatible = "fixed-clock";
  55                 #clock-cells = <0>;
  56                 clock-frequency = <0>;
  57         };
  58
  59         cpus {
  60                 #address-cells = <1>;
  61                 #size-cells = <0>;
  62
  63                 a57_0: cpu@0 {
  64                         compatible = "arm,cortex-a57";
  65                         reg = <0x0>;
  66                         device_type = "cpu";
  67                         power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
  68                         next-level-cache = <&L2_CA57>;
  69                         enable-method = "psci";
  70                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
  71                 };
  72
  73                 a57_1: cpu@1 {
  74                         compatible = "arm,cortex-a57";
  75                         reg = <0x1>;
  76                         device_type = "cpu";
  77                         power-domains = <&sysc R8A774A1_PD_CA57_CPU1>;
  78                         next-level-cache = <&L2_CA57>;
  79                         enable-method = "psci";
  80                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
  81                 };
  82
  83                 a53_0: cpu@100 {
  84                         compatible = "arm,cortex-a53";
  85                         reg = <0x100>;
  86                         device_type = "cpu";
  87                         power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
  88                         next-level-cache = <&L2_CA53>;
  89                         enable-method = "psci";
  90                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
  91                 };
  92
  93                 a53_1: cpu@101 {
  94                         compatible = "arm,cortex-a53";
  95                         reg = <0x101>;
  96                         device_type = "cpu";
  97                         power-domains = <&sysc R8A774A1_PD_CA53_CPU1>;
  98                         next-level-cache = <&L2_CA53>;
  99                         enable-method = "psci";
 100                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 101                 };
 102
 103                 a53_2: cpu@102 {
 104                         compatible = "arm,cortex-a53";
 105                         reg = <0x102>;
 106                         device_type = "cpu";
 107                         power-domains = <&sysc R8A774A1_PD_CA53_CPU2>;
 108                         next-level-cache = <&L2_CA53>;
 109                         enable-method = "psci";
 110                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 111                 };
 112
 113                 a53_3: cpu@103 {
 114                         compatible = "arm,cortex-a53";
 115                         reg = <0x103>;
 116                         device_type = "cpu";
 117                         power-domains = <&sysc R8A774A1_PD_CA53_CPU3>;
 118                         next-level-cache = <&L2_CA53>;
 119                         enable-method = "psci";
 120                         clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 121                 };
 122
 123                 L2_CA57: cache-controller-0 {
 124                         compatible = "cache";
 125                         power-domains = <&sysc R8A774A1_PD_CA57_SCU>;
 126                         cache-unified;
 127                         cache-level = <2>;
 128                 };
 129
 130                 L2_CA53: cache-controller-1 {
 131                         compatible = "cache";
 132                         power-domains = <&sysc R8A774A1_PD_CA53_SCU>;
 133                         cache-unified;
 134                         cache-level = <2>;
 135                 };
 136         };
 137
 138         extal_clk: extal {
 139                 compatible = "fixed-clock";
 140                 #clock-cells = <0>;
 141                 /* This value must be overridden by the board */
 142                 clock-frequency = <0>;
 143         };
 144
 145         extalr_clk: extalr {
 146                 compatible = "fixed-clock";
 147                 #clock-cells = <0>;
 148                 /* This value must be overridden by the board */
 149                 clock-frequency = <0>;
 150         };
 151
 152         /* External PCIe clock - can be overridden by the board */
 153         pcie_bus_clk: pcie_bus {
 154                 compatible = "fixed-clock";
 155                 #clock-cells = <0>;
 156                 clock-frequency = <0>;
 157         };
 158
 159         pmu_a53 {
 160                 compatible = "arm,cortex-a53-pmu";
 161                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 162                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 163                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 164                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 165                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 166         };
 167
 168         pmu_a57 {
 169                 compatible = "arm,cortex-a57-pmu";
 170                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 171                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 172                 interrupt-affinity = <&a57_0>, <&a57_1>;
 173         };
 174
 175         psci {
 176                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 177                 method = "smc";
 178         };
 179
 180         /* External SCIF clock - to be overridden by boards that provide it */
 181         scif_clk: scif {
 182                 compatible = "fixed-clock";
 183                 #clock-cells = <0>;
 184                 clock-frequency = <0>;
 185         };
 186
 187         soc {
 188                 compatible = "simple-bus";
 189                 interrupt-parent = <&gic>;
 190                 #address-cells = <2>;
 191                 #size-cells = <2>;
 192                 ranges;
 193
 194                 rwdt: watchdog@e6020000 {
 195                         compatible = "renesas,r8a774a1-wdt",
 196                                      "renesas,rcar-gen3-wdt";
 197                         reg = <0 0xe6020000 0 0x0c>;
 198                         clocks = <&cpg CPG_MOD 402>;
 199                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 200                         resets = <&cpg 402>;
 201                         status = "disabled";
 202                 };
 203
 204                 gpio0: gpio@e6050000 {
 205                         compatible = "renesas,gpio-r8a774a1",
 206                                      "renesas,rcar-gen3-gpio";
 207                         reg = <0 0xe6050000 0 0x50>;
 208                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 209                         #gpio-cells = <2>;
 210                         gpio-controller;
 211                         gpio-ranges = <&pfc 0 0 16>;
 212                         #interrupt-cells = <2>;
 213                         interrupt-controller;
 214                         clocks = <&cpg CPG_MOD 912>;
 215                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 216                         resets = <&cpg 912>;
 217                 };
 218
 219                 gpio1: gpio@e6051000 {
 220                         compatible = "renesas,gpio-r8a774a1",
 221                                      "renesas,rcar-gen3-gpio";
 222                         reg = <0 0xe6051000 0 0x50>;
 223                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 224                         #gpio-cells = <2>;
 225                         gpio-controller;
 226                         gpio-ranges = <&pfc 0 32 29>;
 227                         #interrupt-cells = <2>;
 228                         interrupt-controller;
 229                         clocks = <&cpg CPG_MOD 911>;
 230                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 231                         resets = <&cpg 911>;
 232                 };
 233
 234                 gpio2: gpio@e6052000 {
 235                         compatible = "renesas,gpio-r8a774a1",
 236                                      "renesas,rcar-gen3-gpio";
 237                         reg = <0 0xe6052000 0 0x50>;
 238                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 239                         #gpio-cells = <2>;
 240                         gpio-controller;
 241                         gpio-ranges = <&pfc 0 64 15>;
 242                         #interrupt-cells = <2>;
 243                         interrupt-controller;
 244                         clocks = <&cpg CPG_MOD 910>;
 245                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 246                         resets = <&cpg 910>;
 247                 };
 248
 249                 gpio3: gpio@e6053000 {
 250                         compatible = "renesas,gpio-r8a774a1",
 251                                      "renesas,rcar-gen3-gpio";
 252                         reg = <0 0xe6053000 0 0x50>;
 253                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 254                         #gpio-cells = <2>;
 255                         gpio-controller;
 256                         gpio-ranges = <&pfc 0 96 16>;
 257                         #interrupt-cells = <2>;
 258                         interrupt-controller;
 259                         clocks = <&cpg CPG_MOD 909>;
 260                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 261                         resets = <&cpg 909>;
 262                 };
 263
 264                 gpio4: gpio@e6054000 {
 265                         compatible = "renesas,gpio-r8a774a1",
 266                                      "renesas,rcar-gen3-gpio";
 267                         reg = <0 0xe6054000 0 0x50>;
 268                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 269                         #gpio-cells = <2>;
 270                         gpio-controller;
 271                         gpio-ranges = <&pfc 0 128 18>;
 272                         #interrupt-cells = <2>;
 273                         interrupt-controller;
 274                         clocks = <&cpg CPG_MOD 908>;
 275                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 276                         resets = <&cpg 908>;
 277                 };
 278
 279                 gpio5: gpio@e6055000 {
 280                         compatible = "renesas,gpio-r8a774a1",
 281                                      "renesas,rcar-gen3-gpio";
 282                         reg = <0 0xe6055000 0 0x50>;
 283                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 284                         #gpio-cells = <2>;
 285                         gpio-controller;
 286                         gpio-ranges = <&pfc 0 160 26>;
 287                         #interrupt-cells = <2>;
 288                         interrupt-controller;
 289                         clocks = <&cpg CPG_MOD 907>;
 290                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 291                         resets = <&cpg 907>;
 292                 };
 293
 294                 gpio6: gpio@e6055400 {
 295                         compatible = "renesas,gpio-r8a774a1",
 296                                      "renesas,rcar-gen3-gpio";
 297                         reg = <0 0xe6055400 0 0x50>;
 298                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 299                         #gpio-cells = <2>;
 300                         gpio-controller;
 301                         gpio-ranges = <&pfc 0 192 32>;
 302                         #interrupt-cells = <2>;
 303                         interrupt-controller;
 304                         clocks = <&cpg CPG_MOD 906>;
 305                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 306                         resets = <&cpg 906>;
 307                 };
 308
 309                 gpio7: gpio@e6055800 {
 310                         compatible = "renesas,gpio-r8a774a1",
 311                                      "renesas,rcar-gen3-gpio";
 312                         reg = <0 0xe6055800 0 0x50>;
 313                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 314                         #gpio-cells = <2>;
 315                         gpio-controller;
 316                         gpio-ranges = <&pfc 0 224 4>;
 317                         #interrupt-cells = <2>;
 318                         interrupt-controller;
 319                         clocks = <&cpg CPG_MOD 905>;
 320                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 321                         resets = <&cpg 905>;
 322                 };
 323
 324                 pfc: pin-controller@e6060000 {
 325                         compatible = "renesas,pfc-r8a774a1";
 326                         reg = <0 0xe6060000 0 0x50c>;
 327                 };
 328
 329                 cpg: clock-controller@e6150000 {
 330                         compatible = "renesas,r8a774a1-cpg-mssr";
 331                         reg = <0 0xe6150000 0 0x0bb0>;
 332                         clocks = <&extal_clk>, <&extalr_clk>;
 333                         clock-names = "extal", "extalr";
 334                         #clock-cells = <2>;
 335                         #power-domain-cells = <0>;
 336                         #reset-cells = <1>;
 337                 };
 338
 339                 rst: reset-controller@e6160000 {
 340                         compatible = "renesas,r8a774a1-rst";
 341                         reg = <0 0xe6160000 0 0x018c>;
 342                 };
 343
 344                 sysc: system-controller@e6180000 {
 345                         compatible = "renesas,r8a774a1-sysc";
 346                         reg = <0 0xe6180000 0 0x0400>;
 347                         #power-domain-cells = <1>;
 348                 };
 349
 350                 tsc: thermal@e6198000 {
 351                         compatible = "renesas,r8a774a1-thermal";
 352                         reg = <0 0xe6198000 0 0x100>,
 353                               <0 0xe61a0000 0 0x100>,
 354                               <0 0xe61a8000 0 0x100>;
 355                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 356                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 357                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 358                         clocks = <&cpg CPG_MOD 522>;
 359                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 360                         resets = <&cpg 522>;
 361                         #thermal-sensor-cells = <1>;
 362                 };
 363
 364                 intc_ex: interrupt-controller@e61c0000 {
 365                         compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc";
 366                         #interrupt-cells = <2>;
 367                         interrupt-controller;
 368                         reg = <0 0xe61c0000 0 0x200>;
 369                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 370                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 371                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 372                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 373                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 374                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 375                         clocks = <&cpg CPG_MOD 407>;
 376                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 377                         resets = <&cpg 407>;
 378                 };
 379
 380                 i2c0: i2c@e6500000 {
 381                         #address-cells = <1>;
 382                         #size-cells = <0>;
 383                         compatible = "renesas,i2c-r8a774a1",
 384                                      "renesas,rcar-gen3-i2c";
 385                         reg = <0 0xe6500000 0 0x40>;
 386                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 387                         clocks = <&cpg CPG_MOD 931>;
 388                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 389                         resets = <&cpg 931>;
 390                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 391                                <&dmac2 0x91>, <&dmac2 0x90>;
 392                         dma-names = "tx", "rx", "tx", "rx";
 393                         i2c-scl-internal-delay-ns = <110>;
 394                         status = "disabled";
 395                 };
 396
 397                 i2c1: i2c@e6508000 {
 398                         #address-cells = <1>;
 399                         #size-cells = <0>;
 400                         compatible = "renesas,i2c-r8a774a1",
 401                                      "renesas,rcar-gen3-i2c";
 402                         reg = <0 0xe6508000 0 0x40>;
 403                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 404                         clocks = <&cpg CPG_MOD 930>;
 405                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 406                         resets = <&cpg 930>;
 407                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 408                                <&dmac2 0x93>, <&dmac2 0x92>;
 409                         dma-names = "tx", "rx", "tx", "rx";
 410                         i2c-scl-internal-delay-ns = <6>;
 411                         status = "disabled";
 412                 };
 413
 414                 i2c2: i2c@e6510000 {
 415                         #address-cells = <1>;
 416                         #size-cells = <0>;
 417                         compatible = "renesas,i2c-r8a774a1",
 418                                      "renesas,rcar-gen3-i2c";
 419                         reg = <0 0xe6510000 0 0x40>;
 420                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 421                         clocks = <&cpg CPG_MOD 929>;
 422                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 423                         resets = <&cpg 929>;
 424                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 425                                <&dmac2 0x95>, <&dmac2 0x94>;
 426                         dma-names = "tx", "rx", "tx", "rx";
 427                         i2c-scl-internal-delay-ns = <6>;
 428                         status = "disabled";
 429                 };
 430
 431                 i2c3: i2c@e66d0000 {
 432                         #address-cells = <1>;
 433                         #size-cells = <0>;
 434                         compatible = "renesas,i2c-r8a774a1",
 435                                      "renesas,rcar-gen3-i2c";
 436                         reg = <0 0xe66d0000 0 0x40>;
 437                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 438                         clocks = <&cpg CPG_MOD 928>;
 439                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 440                         resets = <&cpg 928>;
 441                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 442                         dma-names = "tx", "rx";
 443                         i2c-scl-internal-delay-ns = <110>;
 444                         status = "disabled";
 445                 };
 446
 447                 i2c4: i2c@e66d8000 {
 448                         #address-cells = <1>;
 449                         #size-cells = <0>;
 450                         compatible = "renesas,i2c-r8a774a1",
 451                                      "renesas,rcar-gen3-i2c";
 452                         reg = <0 0xe66d8000 0 0x40>;
 453                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 454                         clocks = <&cpg CPG_MOD 927>;
 455                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 456                         resets = <&cpg 927>;
 457                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 458                         dma-names = "tx", "rx";
 459                         i2c-scl-internal-delay-ns = <110>;
 460                         status = "disabled";
 461                 };
 462
 463                 i2c5: i2c@e66e0000 {
 464                         #address-cells = <1>;
 465                         #size-cells = <0>;
 466                         compatible = "renesas,i2c-r8a774a1",
 467                                      "renesas,rcar-gen3-i2c";
 468                         reg = <0 0xe66e0000 0 0x40>;
 469                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 470                         clocks = <&cpg CPG_MOD 919>;
 471                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 472                         resets = <&cpg 919>;
 473                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 474                         dma-names = "tx", "rx";
 475                         i2c-scl-internal-delay-ns = <110>;
 476                         status = "disabled";
 477                 };
 478
 479                 i2c6: i2c@e66e8000 {
 480                         #address-cells = <1>;
 481                         #size-cells = <0>;
 482                         compatible = "renesas,i2c-r8a774a1",
 483                                      "renesas,rcar-gen3-i2c";
 484                         reg = <0 0xe66e8000 0 0x40>;
 485                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 486                         clocks = <&cpg CPG_MOD 918>;
 487                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 488                         resets = <&cpg 918>;
 489                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 490                         dma-names = "tx", "rx";
 491                         i2c-scl-internal-delay-ns = <6>;
 492                         status = "disabled";
 493                 };
 494
 495                 i2c_dvfs: i2c@e60b0000 {
 496                         #address-cells = <1>;
 497                         #size-cells = <0>;
 498                         compatible = "renesas,iic-r8a774a1",
 499                                      "renesas,rcar-gen3-iic",
 500                                      "renesas,rmobile-iic";
 501                         reg = <0 0xe60b0000 0 0x425>;
 502                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 503                         clocks = <&cpg CPG_MOD 926>;
 504                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 505                         resets = <&cpg 926>;
 506                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 507                         dma-names = "tx", "rx";
 508                         status = "disabled";
 509                 };
 510
 511                 hscif0: serial@e6540000 {
 512                         compatible = "renesas,hscif-r8a774a1",
 513                                      "renesas,rcar-gen3-hscif",
 514                                      "renesas,hscif";
 515                         reg = <0 0xe6540000 0 0x60>;
 516                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 517                         clocks = <&cpg CPG_MOD 520>,
 518                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 519                                  <&scif_clk>;
 520                         clock-names = "fck", "brg_int", "scif_clk";
 521                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 522                                <&dmac2 0x31>, <&dmac2 0x30>;
 523                         dma-names = "tx", "rx", "tx", "rx";
 524                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 525                         resets = <&cpg 520>;
 526                         status = "disabled";
 527                 };
 528
 529                 hscif1: serial@e6550000 {
 530                         compatible = "renesas,hscif-r8a774a1",
 531                                      "renesas,rcar-gen3-hscif",
 532                                      "renesas,hscif";
 533                         reg = <0 0xe6550000 0 0x60>;
 534                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 535                         clocks = <&cpg CPG_MOD 519>,
 536                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 537                                  <&scif_clk>;
 538                         clock-names = "fck", "brg_int", "scif_clk";
 539                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 540                                <&dmac2 0x33>, <&dmac2 0x32>;
 541                         dma-names = "tx", "rx", "tx", "rx";
 542                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 543                         resets = <&cpg 519>;
 544                         status = "disabled";
 545                 };
 546
 547                 hscif2: serial@e6560000 {
 548                         compatible = "renesas,hscif-r8a774a1",
 549                                      "renesas,rcar-gen3-hscif",
 550                                      "renesas,hscif";
 551                         reg = <0 0xe6560000 0 0x60>;
 552                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 553                         clocks = <&cpg CPG_MOD 518>,
 554                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 555                                  <&scif_clk>;
 556                         clock-names = "fck", "brg_int", "scif_clk";
 557                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 558                                <&dmac2 0x35>, <&dmac2 0x34>;
 559                         dma-names = "tx", "rx", "tx", "rx";
 560                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 561                         resets = <&cpg 518>;
 562                         status = "disabled";
 563                 };
 564
 565                 hscif3: serial@e66a0000 {
 566                         compatible = "renesas,hscif-r8a774a1",
 567                                      "renesas,rcar-gen3-hscif",
 568                                      "renesas,hscif";
 569                         reg = <0 0xe66a0000 0 0x60>;
 570                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 571                         clocks = <&cpg CPG_MOD 517>,
 572                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 573                                  <&scif_clk>;
 574                         clock-names = "fck", "brg_int", "scif_clk";
 575                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 576                         dma-names = "tx", "rx";
 577                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 578                         resets = <&cpg 517>;
 579                         status = "disabled";
 580                 };
 581
 582                 hscif4: serial@e66b0000 {
 583                         compatible = "renesas,hscif-r8a774a1",
 584                                      "renesas,rcar-gen3-hscif",
 585                                      "renesas,hscif";
 586                         reg = <0 0xe66b0000 0 0x60>;
 587                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 588                         clocks = <&cpg CPG_MOD 516>,
 589                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 590                                  <&scif_clk>;
 591                         clock-names = "fck", "brg_int", "scif_clk";
 592                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 593                         dma-names = "tx", "rx";
 594                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 595                         resets = <&cpg 516>;
 596                         status = "disabled";
 597                 };
 598
 599                 hsusb: usb@e6590000 {
 600                         compatible = "renesas,usbhs-r8a774a1",
 601                                      "renesas,rcar-gen3-usbhs";
 602                         reg = <0 0xe6590000 0 0x200>;
 603                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 604                         clocks = <&cpg CPG_MOD 704>;
 605                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 606                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 607                         dma-names = "ch0", "ch1", "ch2", "ch3";
 608                         renesas,buswait = <11>;
 609                         phys = <&usb2_phy0>;
 610                         phy-names = "usb";
 611                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 612                         resets = <&cpg 704>;
 613                         status = "disabled";
 614                 };
 615
 616                 usb_dmac0: dma-controller@e65a0000 {
 617                         compatible = "renesas,r8a774a1-usb-dmac",
 618                                      "renesas,usb-dmac";
 619                         reg = <0 0xe65a0000 0 0x100>;
 620                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 621                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 622                         interrupt-names = "ch0", "ch1";
 623                         clocks = <&cpg CPG_MOD 330>;
 624                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 625                         resets = <&cpg 330>;
 626                         #dma-cells = <1>;
 627                         dma-channels = <2>;
 628                 };
 629
 630                 usb_dmac1: dma-controller@e65b0000 {
 631                         compatible = "renesas,r8a774a1-usb-dmac",
 632                                      "renesas,usb-dmac";
 633                         reg = <0 0xe65b0000 0 0x100>;
 634                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 635                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 636                         interrupt-names = "ch0", "ch1";
 637                         clocks = <&cpg CPG_MOD 331>;
 638                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 639                         resets = <&cpg 331>;
 640                         #dma-cells = <1>;
 641                         dma-channels = <2>;
 642                 };
 643
 644                 usb3_phy0: usb-phy@e65ee000 {
 645                         compatible = "renesas,r8a774a1-usb3-phy",
 646                                      "renesas,rcar-gen3-usb3-phy";
 647                         reg = <0 0xe65ee000 0 0x90>;
 648                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 649                                  <&usb_extal_clk>;
 650                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 651                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 652                         resets = <&cpg 328>;
 653                         #phy-cells = <0>;
 654                         status = "disabled";
 655                 };
 656
 657                 dmac0: dma-controller@e6700000 {
 658                         compatible = "renesas,dmac-r8a774a1",
 659                                      "renesas,rcar-dmac";
 660                         reg = <0 0xe6700000 0 0x10000>;
 661                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 662                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 663                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 664                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 665                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 666                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 667                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 668                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 669                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 670                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 671                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 672                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 673                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 674                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 675                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 676                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 677                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 678                         interrupt-names = "error",
 679                                         "ch0", "ch1", "ch2", "ch3",
 680                                         "ch4", "ch5", "ch6", "ch7",
 681                                         "ch8", "ch9", "ch10", "ch11",
 682                                         "ch12", "ch13", "ch14", "ch15";
 683                         clocks = <&cpg CPG_MOD 219>;
 684                         clock-names = "fck";
 685                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 686                         resets = <&cpg 219>;
 687                         #dma-cells = <1>;
 688                         dma-channels = <16>;
 689                 };
 690
 691                 dmac1: dma-controller@e7300000 {
 692                         compatible = "renesas,dmac-r8a774a1",
 693                                      "renesas,rcar-dmac";
 694                         reg = <0 0xe7300000 0 0x10000>;
 695                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 696                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 697                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 698                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 699                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 700                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 701                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 702                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 703                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 704                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 705                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 706                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 707                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 708                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 709                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 710                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 711                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 712                         interrupt-names = "error",
 713                                         "ch0", "ch1", "ch2", "ch3",
 714                                         "ch4", "ch5", "ch6", "ch7",
 715                                         "ch8", "ch9", "ch10", "ch11",
 716                                         "ch12", "ch13", "ch14", "ch15";
 717                         clocks = <&cpg CPG_MOD 218>;
 718                         clock-names = "fck";
 719                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 720                         resets = <&cpg 218>;
 721                         #dma-cells = <1>;
 722                         dma-channels = <16>;
 723                 };
 724
 725                 dmac2: dma-controller@e7310000 {
 726                         compatible = "renesas,dmac-r8a774a1",
 727                                      "renesas,rcar-dmac";
 728                         reg = <0 0xe7310000 0 0x10000>;
 729                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 730                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 731                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 732                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 733                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 734                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 735                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 736                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 737                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 738                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 739                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 740                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 741                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 742                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 743                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 744                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 745                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 746                         interrupt-names = "error",
 747                                         "ch0", "ch1", "ch2", "ch3",
 748                                         "ch4", "ch5", "ch6", "ch7",
 749                                         "ch8", "ch9", "ch10", "ch11",
 750                                         "ch12", "ch13", "ch14", "ch15";
 751                         clocks = <&cpg CPG_MOD 217>;
 752                         clock-names = "fck";
 753                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 754                         resets = <&cpg 217>;
 755                         #dma-cells = <1>;
 756                         dma-channels = <16>;
 757                 };
 758
 759                 ipmmu_ds0: mmu@e6740000 {
 760                         compatible = "renesas,ipmmu-r8a774a1";
 761                         reg = <0 0xe6740000 0 0x1000>;
 762                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 763                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 764                         #iommu-cells = <1>;
 765                 };
 766
 767                 ipmmu_ds1: mmu@e7740000 {
 768                         compatible = "renesas,ipmmu-r8a774a1";
 769                         reg = <0 0xe7740000 0 0x1000>;
 770                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 771                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 772                         #iommu-cells = <1>;
 773                 };
 774
 775                 ipmmu_hc: mmu@e6570000 {
 776                         compatible = "renesas,ipmmu-r8a774a1";
 777                         reg = <0 0xe6570000 0 0x1000>;
 778                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 779                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 780                         #iommu-cells = <1>;
 781                 };
 782
 783                 ipmmu_mm: mmu@e67b0000 {
 784                         compatible = "renesas,ipmmu-r8a774a1";
 785                         reg = <0 0xe67b0000 0 0x1000>;
 786                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 787                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 788                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 789                         #iommu-cells = <1>;
 790                 };
 791
 792                 ipmmu_mp: mmu@ec670000 {
 793                         compatible = "renesas,ipmmu-r8a774a1";
 794                         reg = <0 0xec670000 0 0x1000>;
 795                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 796                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 797                         #iommu-cells = <1>;
 798                 };
 799
 800                 ipmmu_pv0: mmu@fd800000 {
 801                         compatible = "renesas,ipmmu-r8a774a1";
 802                         reg = <0 0xfd800000 0 0x1000>;
 803                         renesas,ipmmu-main = <&ipmmu_mm 5>;
 804                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 805                         #iommu-cells = <1>;
 806                 };
 807
 808                 ipmmu_pv1: mmu@fd950000 {
 809                         compatible = "renesas,ipmmu-r8a774a1";
 810                         reg = <0 0xfd950000 0 0x1000>;
 811                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 812                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 813                         #iommu-cells = <1>;
 814                 };
 815
 816                 ipmmu_vc0: mmu@fe6b0000 {
 817                         compatible = "renesas,ipmmu-r8a774a1";
 818                         reg = <0 0xfe6b0000 0 0x1000>;
 819                         renesas,ipmmu-main = <&ipmmu_mm 8>;
 820                         power-domains = <&sysc R8A774A1_PD_A3VC>;
 821                         #iommu-cells = <1>;
 822                 };
 823
 824                 ipmmu_vi0: mmu@febd0000 {
 825                         compatible = "renesas,ipmmu-r8a774a1";
 826                         reg = <0 0xfebd0000 0 0x1000>;
 827                         renesas,ipmmu-main = <&ipmmu_mm 9>;
 828                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 829                         #iommu-cells = <1>;
 830                 };
 831
 832                 avb: ethernet@e6800000 {
 833                         compatible = "renesas,etheravb-r8a774a1",
 834                                      "renesas,etheravb-rcar-gen3";
 835                         reg = <0 0xe6800000 0 0x800>;
 836                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 837                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 838                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 839                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 840                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 841                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 842                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 843                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 844                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 845                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 846                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 847                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 848                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 849                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 850                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 851                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 852                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 853                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 854                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 855                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 856                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 857                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 858                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 859                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 860                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 861                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 862                                           "ch4", "ch5", "ch6", "ch7",
 863                                           "ch8", "ch9", "ch10", "ch11",
 864                                           "ch12", "ch13", "ch14", "ch15",
 865                                           "ch16", "ch17", "ch18", "ch19",
 866                                           "ch20", "ch21", "ch22", "ch23",
 867                                           "ch24";
 868                         clocks = <&cpg CPG_MOD 812>;
 869                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 870                         resets = <&cpg 812>;
 871                         phy-mode = "rgmii";
 872                         #address-cells = <1>;
 873                         #size-cells = <0>;
 874                         status = "disabled";
 875                 };
 876
 877                 can0: can@e6c30000 {
 878                         compatible = "renesas,can-r8a774a1",
 879                                      "renesas,rcar-gen3-can";
 880                         reg = <0 0xe6c30000 0 0x1000>;
 881                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 882                         clocks = <&cpg CPG_MOD 916>,
 883                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
 884                                  <&can_clk>;
 885                         clock-names = "clkp1", "clkp2", "can_clk";
 886                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 887                         resets = <&cpg 916>;
 888                         status = "disabled";
 889                 };
 890
 891                 can1: can@e6c38000 {
 892                         compatible = "renesas,can-r8a774a1",
 893                                      "renesas,rcar-gen3-can";
 894                         reg = <0 0xe6c38000 0 0x1000>;
 895                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 896                         clocks = <&cpg CPG_MOD 915>,
 897                                  <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
 898                                  <&can_clk>;
 899                         clock-names = "clkp1", "clkp2", "can_clk";
 900                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 901                         resets = <&cpg 915>;
 902                         status = "disabled";
 903                 };
 904
 905                 pwm0: pwm@e6e30000 {
 906                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 907                         reg = <0 0xe6e30000 0 0x8>;
 908                         #pwm-cells = <2>;
 909                         clocks = <&cpg CPG_MOD 523>;
 910                         resets = <&cpg 523>;
 911                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 912                         status = "disabled";
 913                 };
 914
 915                 pwm1: pwm@e6e31000 {
 916                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 917                         reg = <0 0xe6e31000 0 0x8>;
 918                         #pwm-cells = <2>;
 919                         clocks = <&cpg CPG_MOD 523>;
 920                         resets = <&cpg 523>;
 921                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 922                         status = "disabled";
 923                 };
 924
 925                 pwm2: pwm@e6e32000 {
 926                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 927                         reg = <0 0xe6e32000 0 0x8>;
 928                         #pwm-cells = <2>;
 929                         clocks = <&cpg CPG_MOD 523>;
 930                         resets = <&cpg 523>;
 931                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 932                         status = "disabled";
 933                 };
 934
 935                 pwm3: pwm@e6e33000 {
 936                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 937                         reg = <0 0xe6e33000 0 0x8>;
 938                         #pwm-cells = <2>;
 939                         clocks = <&cpg CPG_MOD 523>;
 940                         resets = <&cpg 523>;
 941                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 942                         status = "disabled";
 943                 };
 944
 945                 pwm4: pwm@e6e34000 {
 946                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 947                         reg = <0 0xe6e34000 0 0x8>;
 948                         #pwm-cells = <2>;
 949                         clocks = <&cpg CPG_MOD 523>;
 950                         resets = <&cpg 523>;
 951                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 952                         status = "disabled";
 953                 };
 954
 955                 pwm5: pwm@e6e35000 {
 956                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 957                         reg = <0 0xe6e35000 0 0x8>;
 958                         #pwm-cells = <2>;
 959                         clocks = <&cpg CPG_MOD 523>;
 960                         resets = <&cpg 523>;
 961                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 962                         status = "disabled";
 963                 };
 964
 965                 pwm6: pwm@e6e36000 {
 966                         compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar";
 967                         reg = <0 0xe6e36000 0 0x8>;
 968                         #pwm-cells = <2>;
 969                         clocks = <&cpg CPG_MOD 523>;
 970                         resets = <&cpg 523>;
 971                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 972                         status = "disabled";
 973                 };
 974
 975                 scif0: serial@e6e60000 {
 976                         compatible = "renesas,scif-r8a774a1",
 977                                      "renesas,rcar-gen3-scif", "renesas,scif";
 978                         reg = <0 0xe6e60000 0 0x40>;
 979                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 980                         clocks = <&cpg CPG_MOD 207>,
 981                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 982                                  <&scif_clk>;
 983                         clock-names = "fck", "brg_int", "scif_clk";
 984                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 985                                <&dmac2 0x51>, <&dmac2 0x50>;
 986                         dma-names = "tx", "rx", "tx", "rx";
 987                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
 988                         resets = <&cpg 207>;
 989                         status = "disabled";
 990                 };
 991
 992                 scif1: serial@e6e68000 {
 993                         compatible = "renesas,scif-r8a774a1",
 994                                      "renesas,rcar-gen3-scif", "renesas,scif";
 995                         reg = <0 0xe6e68000 0 0x40>;
 996                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 997                         clocks = <&cpg CPG_MOD 206>,
 998                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
 999                                  <&scif_clk>;
1000                         clock-names = "fck", "brg_int", "scif_clk";
1001                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1002                                <&dmac2 0x53>, <&dmac2 0x52>;
1003                         dma-names = "tx", "rx", "tx", "rx";
1004                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1005                         resets = <&cpg 206>;
1006                         status = "disabled";
1007                 };
1008
1009                 scif2: serial@e6e88000 {
1010                         compatible = "renesas,scif-r8a774a1",
1011                                      "renesas,rcar-gen3-scif", "renesas,scif";
1012                         reg = <0 0xe6e88000 0 0x40>;
1013                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1014                         clocks = <&cpg CPG_MOD 310>,
1015                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1016                                  <&scif_clk>;
1017                         clock-names = "fck", "brg_int", "scif_clk";
1018                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1019                                <&dmac2 0x13>, <&dmac2 0x12>;
1020                         dma-names = "tx", "rx", "tx", "rx";
1021                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1022                         resets = <&cpg 310>;
1023                         status = "disabled";
1024                 };
1025
1026                 scif3: serial@e6c50000 {
1027                         compatible = "renesas,scif-r8a774a1",
1028                                      "renesas,rcar-gen3-scif", "renesas,scif";
1029                         reg = <0 0xe6c50000 0 0x40>;
1030                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1031                         clocks = <&cpg CPG_MOD 204>,
1032                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1033                                  <&scif_clk>;
1034                         clock-names = "fck", "brg_int", "scif_clk";
1035                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1036                         dma-names = "tx", "rx";
1037                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1038                         resets = <&cpg 204>;
1039                         status = "disabled";
1040                 };
1041
1042                 scif4: serial@e6c40000 {
1043                         compatible = "renesas,scif-r8a774a1",
1044                                      "renesas,rcar-gen3-scif", "renesas,scif";
1045                         reg = <0 0xe6c40000 0 0x40>;
1046                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1047                         clocks = <&cpg CPG_MOD 203>,
1048                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1049                                  <&scif_clk>;
1050                         clock-names = "fck", "brg_int", "scif_clk";
1051                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1052                         dma-names = "tx", "rx";
1053                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1054                         resets = <&cpg 203>;
1055                         status = "disabled";
1056                 };
1057
1058                 scif5: serial@e6f30000 {
1059                         compatible = "renesas,scif-r8a774a1",
1060                                      "renesas,rcar-gen3-scif", "renesas,scif";
1061                         reg = <0 0xe6f30000 0 0x40>;
1062                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1063                         clocks = <&cpg CPG_MOD 202>,
1064                                  <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1065                                  <&scif_clk>;
1066                         clock-names = "fck", "brg_int", "scif_clk";
1067                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1068                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1069                         dma-names = "tx", "rx", "tx", "rx";
1070                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1071                         resets = <&cpg 202>;
1072                         status = "disabled";
1073                 };
1074
1075                 msiof0: spi@e6e90000 {
1076                         compatible = "renesas,msiof-r8a774a1",
1077                                      "renesas,rcar-gen3-msiof";
1078                         reg = <0 0xe6e90000 0 0x0064>;
1079                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1080                         clocks = <&cpg CPG_MOD 211>;
1081                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1082                                <&dmac2 0x41>, <&dmac2 0x40>;
1083                         dma-names = "tx", "rx", "tx", "rx";
1084                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1085                         resets = <&cpg 211>;
1086                         #address-cells = <1>;
1087                         #size-cells = <0>;
1088                         status = "disabled";
1089                 };
1090
1091                 msiof1: spi@e6ea0000 {
1092                         compatible = "renesas,msiof-r8a774a1",
1093                                      "renesas,rcar-gen3-msiof";
1094                         reg = <0 0xe6ea0000 0 0x0064>;
1095                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1096                         clocks = <&cpg CPG_MOD 210>;
1097                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1098                                <&dmac2 0x43>, <&dmac2 0x42>;
1099                         dma-names = "tx", "rx", "tx", "rx";
1100                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1101                         resets = <&cpg 210>;
1102                         #address-cells = <1>;
1103                         #size-cells = <0>;
1104                         status = "disabled";
1105                 };
1106
1107                 msiof2: spi@e6c00000 {
1108                         compatible = "renesas,msiof-r8a774a1",
1109                                      "renesas,rcar-gen3-msiof";
1110                         reg = <0 0xe6c00000 0 0x0064>;
1111                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1112                         clocks = <&cpg CPG_MOD 209>;
1113                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1114                         dma-names = "tx", "rx";
1115                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1116                         resets = <&cpg 209>;
1117                         #address-cells = <1>;
1118                         #size-cells = <0>;
1119                         status = "disabled";
1120                 };
1121
1122                 msiof3: spi@e6c10000 {
1123                         compatible = "renesas,msiof-r8a774a1",
1124                                      "renesas,rcar-gen3-msiof";
1125                         reg = <0 0xe6c10000 0 0x0064>;
1126                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1127                         clocks = <&cpg CPG_MOD 208>;
1128                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1129                         dma-names = "tx", "rx";
1130                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1131                         resets = <&cpg 208>;
1132                         #address-cells = <1>;
1133                         #size-cells = <0>;
1134                         status = "disabled";
1135                 };
1136
1137                 vin0: video@e6ef0000 {
1138                         compatible = "renesas,vin-r8a774a1";
1139                         reg = <0 0xe6ef0000 0 0x1000>;
1140                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1141                         clocks = <&cpg CPG_MOD 811>;
1142                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1143                         resets = <&cpg 811>;
1144                         renesas,id = <0>;
1145                         status = "disabled";
1146
1147                         ports {
1148                                 #address-cells = <1>;
1149                                 #size-cells = <0>;
1150
1151                                 port@1 {
1152                                         #address-cells = <1>;
1153                                         #size-cells = <0>;
1154
1155                                         reg = <1>;
1156
1157                                         vin0csi20: endpoint@0 {
1158                                                 reg = <0>;
1159                                                 remote-endpoint = <&csi20vin0>;
1160                                         };
1161                                         vin0csi40: endpoint@2 {
1162                                                 reg = <2>;
1163                                                 remote-endpoint = <&csi40vin0>;
1164                                         };
1165                                 };
1166                         };
1167                 };
1168
1169                 vin1: video@e6ef1000 {
1170                         compatible = "renesas,vin-r8a774a1";
1171                         reg = <0 0xe6ef1000 0 0x1000>;
1172                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1173                         clocks = <&cpg CPG_MOD 810>;
1174                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1175                         resets = <&cpg 810>;
1176                         renesas,id = <1>;
1177                         status = "disabled";
1178
1179                         ports {
1180                                 #address-cells = <1>;
1181                                 #size-cells = <0>;
1182
1183                                 port@1 {
1184                                         #address-cells = <1>;
1185                                         #size-cells = <0>;
1186
1187                                         reg = <1>;
1188
1189                                         vin1csi20: endpoint@0 {
1190                                                 reg = <0>;
1191                                                 remote-endpoint = <&csi20vin1>;
1192                                         };
1193                                         vin1csi40: endpoint@2 {
1194                                                 reg = <2>;
1195                                                 remote-endpoint = <&csi40vin1>;
1196                                         };
1197                                 };
1198                         };
1199                 };
1200
1201                 vin2: video@e6ef2000 {
1202                         compatible = "renesas,vin-r8a774a1";
1203                         reg = <0 0xe6ef2000 0 0x1000>;
1204                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1205                         clocks = <&cpg CPG_MOD 809>;
1206                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1207                         resets = <&cpg 809>;
1208                         renesas,id = <2>;
1209                         status = "disabled";
1210
1211                         ports {
1212                                 #address-cells = <1>;
1213                                 #size-cells = <0>;
1214
1215                                 port@1 {
1216                                         #address-cells = <1>;
1217                                         #size-cells = <0>;
1218
1219                                         reg = <1>;
1220
1221                                         vin2csi20: endpoint@0 {
1222                                                 reg = <0>;
1223                                                 remote-endpoint = <&csi20vin2>;
1224                                         };
1225                                         vin2csi40: endpoint@2 {
1226                                                 reg = <2>;
1227                                                 remote-endpoint = <&csi40vin2>;
1228                                         };
1229                                 };
1230                         };
1231                 };
1232
1233                 vin3: video@e6ef3000 {
1234                         compatible = "renesas,vin-r8a774a1";
1235                         reg = <0 0xe6ef3000 0 0x1000>;
1236                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1237                         clocks = <&cpg CPG_MOD 808>;
1238                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1239                         resets = <&cpg 808>;
1240                         renesas,id = <3>;
1241                         status = "disabled";
1242
1243                         ports {
1244                                 #address-cells = <1>;
1245                                 #size-cells = <0>;
1246
1247                                 port@1 {
1248                                         #address-cells = <1>;
1249                                         #size-cells = <0>;
1250
1251                                         reg = <1>;
1252
1253                                         vin3csi20: endpoint@0 {
1254                                                 reg = <0>;
1255                                                 remote-endpoint = <&csi20vin3>;
1256                                         };
1257                                         vin3csi40: endpoint@2 {
1258                                                 reg = <2>;
1259                                                 remote-endpoint = <&csi40vin3>;
1260                                         };
1261                                 };
1262                         };
1263                 };
1264
1265                 vin4: video@e6ef4000 {
1266                         compatible = "renesas,vin-r8a774a1";
1267                         reg = <0 0xe6ef4000 0 0x1000>;
1268                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1269                         clocks = <&cpg CPG_MOD 807>;
1270                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1271                         resets = <&cpg 807>;
1272                         renesas,id = <4>;
1273                         status = "disabled";
1274
1275                         ports {
1276                                 #address-cells = <1>;
1277                                 #size-cells = <0>;
1278
1279                                 port@1 {
1280                                         #address-cells = <1>;
1281                                         #size-cells = <0>;
1282
1283                                         reg = <1>;
1284
1285                                         vin4csi20: endpoint@0 {
1286                                                 reg = <0>;
1287                                                 remote-endpoint = <&csi20vin4>;
1288                                         };
1289                                         vin4csi40: endpoint@2 {
1290                                                 reg = <2>;
1291                                                 remote-endpoint = <&csi40vin4>;
1292                                         };
1293                                 };
1294                         };
1295                 };
1296
1297                 vin5: video@e6ef5000 {
1298                         compatible = "renesas,vin-r8a774a1";
1299                         reg = <0 0xe6ef5000 0 0x1000>;
1300                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1301                         clocks = <&cpg CPG_MOD 806>;
1302                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1303                         resets = <&cpg 806>;
1304                         renesas,id = <5>;
1305                         status = "disabled";
1306
1307                         ports {
1308                                 #address-cells = <1>;
1309                                 #size-cells = <0>;
1310
1311                                 port@1 {
1312                                         #address-cells = <1>;
1313                                         #size-cells = <0>;
1314
1315                                         reg = <1>;
1316
1317                                         vin5csi20: endpoint@0 {
1318                                                 reg = <0>;
1319                                                 remote-endpoint = <&csi20vin5>;
1320                                         };
1321                                         vin5csi40: endpoint@2 {
1322                                                 reg = <2>;
1323                                                 remote-endpoint = <&csi40vin5>;
1324                                         };
1325                                 };
1326                         };
1327                 };
1328
1329                 vin6: video@e6ef6000 {
1330                         compatible = "renesas,vin-r8a774a1";
1331                         reg = <0 0xe6ef6000 0 0x1000>;
1332                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1333                         clocks = <&cpg CPG_MOD 805>;
1334                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1335                         resets = <&cpg 805>;
1336                         renesas,id = <6>;
1337                         status = "disabled";
1338
1339                         ports {
1340                                 #address-cells = <1>;
1341                                 #size-cells = <0>;
1342
1343                                 port@1 {
1344                                         #address-cells = <1>;
1345                                         #size-cells = <0>;
1346
1347                                         reg = <1>;
1348
1349                                         vin6csi20: endpoint@0 {
1350                                                 reg = <0>;
1351                                                 remote-endpoint = <&csi20vin6>;
1352                                         };
1353                                         vin6csi40: endpoint@2 {
1354                                                 reg = <2>;
1355                                                 remote-endpoint = <&csi40vin6>;
1356                                         };
1357                                 };
1358                         };
1359                 };
1360
1361                 vin7: video@e6ef7000 {
1362                         compatible = "renesas,vin-r8a774a1";
1363                         reg = <0 0xe6ef7000 0 0x1000>;
1364                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1365                         clocks = <&cpg CPG_MOD 804>;
1366                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1367                         resets = <&cpg 804>;
1368                         renesas,id = <7>;
1369                         status = "disabled";
1370
1371                         ports {
1372                                 #address-cells = <1>;
1373                                 #size-cells = <0>;
1374
1375                                 port@1 {
1376                                         #address-cells = <1>;
1377                                         #size-cells = <0>;
1378
1379                                         reg = <1>;
1380
1381                                         vin7csi20: endpoint@0 {
1382                                                 reg = <0>;
1383                                                 remote-endpoint = <&csi20vin7>;
1384                                         };
1385                                         vin7csi40: endpoint@2 {
1386                                                 reg = <2>;
1387                                                 remote-endpoint = <&csi40vin7>;
1388                                         };
1389                                 };
1390                         };
1391                 };
1392
1393                 rcar_sound: sound@ec500000 {
1394                         /*
1395                          * #sound-dai-cells is required
1396                          *
1397                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1398                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1399                          */
1400                         /*
1401                          * #clock-cells is required for audio_clkout0/1/2/3
1402                          *
1403                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1404                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1405                          */
1406                         compatible =  "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
1407                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1408                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1409                                 <0 0xec540000 0 0x1000>, /* SSIU */
1410                                 <0 0xec541000 0 0x280>,  /* SSI */
1411                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1412                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1413
1414                         clocks = <&cpg CPG_MOD 1005>,
1415                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1416                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1417                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1418                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1419                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1420                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1421                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1422                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1423                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1424                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1425                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1426                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1427                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1428                                  <&audio_clk_a>, <&audio_clk_b>,
1429                                  <&audio_clk_c>,
1430                                  <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
1431                         clock-names = "ssi-all",
1432                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1433                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1434                                       "ssi.1", "ssi.0",
1435                                       "src.9", "src.8", "src.7", "src.6",
1436                                       "src.5", "src.4", "src.3", "src.2",
1437                                       "src.1", "src.0",
1438                                       "mix.1", "mix.0",
1439                                       "ctu.1", "ctu.0",
1440                                       "dvc.0", "dvc.1",
1441                                       "clk_a", "clk_b", "clk_c", "clk_i";
1442                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1443                         resets = <&cpg 1005>,
1444                                  <&cpg 1006>, <&cpg 1007>,
1445                                  <&cpg 1008>, <&cpg 1009>,
1446                                  <&cpg 1010>, <&cpg 1011>,
1447                                  <&cpg 1012>, <&cpg 1013>,
1448                                  <&cpg 1014>, <&cpg 1015>;
1449                         reset-names = "ssi-all",
1450                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1451                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1452                                       "ssi.1", "ssi.0";
1453                         status = "disabled";
1454
1455                         rcar_sound,dvc {
1456                                 dvc0: dvc-0 {
1457                                         dmas = <&audma1 0xbc>;
1458                                         dma-names = "tx";
1459                                 };
1460                                 dvc1: dvc-1 {
1461                                         dmas = <&audma1 0xbe>;
1462                                         dma-names = "tx";
1463                                 };
1464                         };
1465
1466                         rcar_sound,mix {
1467                                 mix0: mix-0 { };
1468                                 mix1: mix-1 { };
1469                         };
1470
1471                         rcar_sound,ctu {
1472                                 ctu00: ctu-0 { };
1473                                 ctu01: ctu-1 { };
1474                                 ctu02: ctu-2 { };
1475                                 ctu03: ctu-3 { };
1476                                 ctu10: ctu-4 { };
1477                                 ctu11: ctu-5 { };
1478                                 ctu12: ctu-6 { };
1479                                 ctu13: ctu-7 { };
1480                         };
1481
1482                         rcar_sound,src {
1483                                 src0: src-0 {
1484                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1485                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1486                                         dma-names = "rx", "tx";
1487                                 };
1488                                 src1: src-1 {
1489                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1490                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1491                                         dma-names = "rx", "tx";
1492                                 };
1493                                 src2: src-2 {
1494                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1495                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1496                                         dma-names = "rx", "tx";
1497                                 };
1498                                 src3: src-3 {
1499                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1500                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1501                                         dma-names = "rx", "tx";
1502                                 };
1503                                 src4: src-4 {
1504                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1505                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1506                                         dma-names = "rx", "tx";
1507                                 };
1508                                 src5: src-5 {
1509                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1510                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1511                                         dma-names = "rx", "tx";
1512                                 };
1513                                 src6: src-6 {
1514                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1515                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1516                                         dma-names = "rx", "tx";
1517                                 };
1518                                 src7: src-7 {
1519                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1520                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1521                                         dma-names = "rx", "tx";
1522                                 };
1523                                 src8: src-8 {
1524                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1525                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1526                                         dma-names = "rx", "tx";
1527                                 };
1528                                 src9: src-9 {
1529                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1530                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1531                                         dma-names = "rx", "tx";
1532                                 };
1533                         };
1534
1535                         rcar_sound,ssi {
1536                                 ssi0: ssi-0 {
1537                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1538                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1539                                         dma-names = "rx", "tx", "rxu", "txu";
1540                                 };
1541                                 ssi1: ssi-1 {
1542                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1543                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1544                                         dma-names = "rx", "tx", "rxu", "txu";
1545                                 };
1546                                 ssi2: ssi-2 {
1547                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1548                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1549                                         dma-names = "rx", "tx", "rxu", "txu";
1550                                 };
1551                                 ssi3: ssi-3 {
1552                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1553                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1554                                         dma-names = "rx", "tx", "rxu", "txu";
1555                                 };
1556                                 ssi4: ssi-4 {
1557                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1558                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1559                                         dma-names = "rx", "tx", "rxu", "txu";
1560                                 };
1561                                 ssi5: ssi-5 {
1562                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1563                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1564                                         dma-names = "rx", "tx", "rxu", "txu";
1565                                 };
1566                                 ssi6: ssi-6 {
1567                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1568                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1569                                         dma-names = "rx", "tx", "rxu", "txu";
1570                                 };
1571                                 ssi7: ssi-7 {
1572                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1573                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1574                                         dma-names = "rx", "tx", "rxu", "txu";
1575                                 };
1576                                 ssi8: ssi-8 {
1577                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1578                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1579                                         dma-names = "rx", "tx", "rxu", "txu";
1580                                 };
1581                                 ssi9: ssi-9 {
1582                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1583                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1584                                         dma-names = "rx", "tx", "rxu", "txu";
1585                                 };
1586                         };
1587
1588                         ports {
1589                                 #address-cells = <1>;
1590                                 #size-cells = <0>;
1591                                 port@0 {
1592                                         reg = <0>;
1593                                 };
1594                                 port@1 {
1595                                         reg = <1>;
1596                                 };
1597                         };
1598                 };
1599
1600                 audma0: dma-controller@ec700000 {
1601                         compatible = "renesas,dmac-r8a774a1",
1602                                      "renesas,rcar-dmac";
1603                         reg = <0 0xec700000 0 0x10000>;
1604                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1605                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1606                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1607                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1608                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1609                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1610                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1611                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1612                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1613                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1614                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1615                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1616                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1617                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1618                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1619                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1620                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1621                         interrupt-names = "error",
1622                                         "ch0", "ch1", "ch2", "ch3",
1623                                         "ch4", "ch5", "ch6", "ch7",
1624                                         "ch8", "ch9", "ch10", "ch11",
1625                                         "ch12", "ch13", "ch14", "ch15";
1626                         clocks = <&cpg CPG_MOD 502>;
1627                         clock-names = "fck";
1628                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1629                         resets = <&cpg 502>;
1630                         #dma-cells = <1>;
1631                         dma-channels = <16>;
1632                 };
1633
1634                 audma1: dma-controller@ec720000 {
1635                         compatible = "renesas,dmac-r8a774a1",
1636                                      "renesas,rcar-dmac";
1637                         reg = <0 0xec720000 0 0x10000>;
1638                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1639                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1640                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1641                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1642                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1643                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1644                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1645                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1646                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1647                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1648                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1649                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1650                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1651                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1652                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1653                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1654                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1655                         interrupt-names = "error",
1656                                         "ch0", "ch1", "ch2", "ch3",
1657                                         "ch4", "ch5", "ch6", "ch7",
1658                                         "ch8", "ch9", "ch10", "ch11",
1659                                         "ch12", "ch13", "ch14", "ch15";
1660                         clocks = <&cpg CPG_MOD 501>;
1661                         clock-names = "fck";
1662                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1663                         resets = <&cpg 501>;
1664                         #dma-cells = <1>;
1665                         dma-channels = <16>;
1666                 };
1667
1668                 xhci0: usb@ee000000 {
1669                         compatible = "renesas,xhci-r8a774a1",
1670                                      "renesas,rcar-gen3-xhci";
1671                         reg = <0 0xee000000 0 0xc00>;
1672                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1673                         clocks = <&cpg CPG_MOD 328>;
1674                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1675                         resets = <&cpg 328>;
1676                         status = "disabled";
1677                 };
1678
1679                 usb3_peri0: usb@ee020000 {
1680                         compatible = "renesas,r8a774a1-usb3-peri",
1681                                      "renesas,rcar-gen3-usb3-peri";
1682                         reg = <0 0xee020000 0 0x400>;
1683                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1684                         clocks = <&cpg CPG_MOD 328>;
1685                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1686                         resets = <&cpg 328>;
1687                         status = "disabled";
1688                 };
1689
1690                 ohci0: usb@ee080000 {
1691                         compatible = "generic-ohci";
1692                         reg = <0 0xee080000 0 0x100>;
1693                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1694                         clocks = <&cpg CPG_MOD 703>;
1695                         phys = <&usb2_phy0>;
1696                         phy-names = "usb";
1697                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1698                         resets = <&cpg 703>;
1699                         status = "disabled";
1700                 };
1701
1702                 ohci1: usb@ee0a0000 {
1703                         compatible = "generic-ohci";
1704                         reg = <0 0xee0a0000 0 0x100>;
1705                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1706                         clocks = <&cpg CPG_MOD 702>;
1707                         phys = <&usb2_phy1>;
1708                         phy-names = "usb";
1709                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1710                         resets = <&cpg 702>;
1711                         status = "disabled";
1712                 };
1713
1714                 ehci0: usb@ee080100 {
1715                         compatible = "generic-ehci";
1716                         reg = <0 0xee080100 0 0x100>;
1717                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1718                         clocks = <&cpg CPG_MOD 703>;
1719                         phys = <&usb2_phy0>;
1720                         phy-names = "usb";
1721                         companion = <&ohci0>;
1722                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1723                         resets = <&cpg 703>;
1724                         status = "disabled";
1725                 };
1726
1727                 ehci1: usb@ee0a0100 {
1728                         compatible = "generic-ehci";
1729                         reg = <0 0xee0a0100 0 0x100>;
1730                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1731                         clocks = <&cpg CPG_MOD 702>;
1732                         phys = <&usb2_phy1>;
1733                         phy-names = "usb";
1734                         companion = <&ohci1>;
1735                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1736                         resets = <&cpg 702>;
1737                         status = "disabled";
1738                 };
1739
1740                 usb2_phy0: usb-phy@ee080200 {
1741                         compatible = "renesas,usb2-phy-r8a774a1",
1742                                      "renesas,rcar-gen3-usb2-phy";
1743                         reg = <0 0xee080200 0 0x700>;
1744                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1745                         clocks = <&cpg CPG_MOD 703>;
1746                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1747                         resets = <&cpg 703>;
1748                         #phy-cells = <0>;
1749                         status = "disabled";
1750                 };
1751
1752                 usb2_phy1: usb-phy@ee0a0200 {
1753                         compatible = "renesas,usb2-phy-r8a774a1",
1754                                      "renesas,rcar-gen3-usb2-phy";
1755                         reg = <0 0xee0a0200 0 0x700>;
1756                         clocks = <&cpg CPG_MOD 702>;
1757                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1758                         resets = <&cpg 702>;
1759                         #phy-cells = <0>;
1760                         status = "disabled";
1761                 };
1762
1763                 sdhi0: sd@ee100000 {
1764                         compatible = "renesas,sdhi-r8a774a1",
1765                                      "renesas,rcar-gen3-sdhi";
1766                         reg = <0 0xee100000 0 0x2000>;
1767                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1768                         clocks = <&cpg CPG_MOD 314>;
1769                         max-frequency = <200000000>;
1770                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1771                         resets = <&cpg 314>;
1772                         status = "disabled";
1773                 };
1774
1775                 sdhi1: sd@ee120000 {
1776                         compatible = "renesas,sdhi-r8a774a1",
1777                                      "renesas,rcar-gen3-sdhi";
1778                         reg = <0 0xee120000 0 0x2000>;
1779                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1780                         clocks = <&cpg CPG_MOD 313>;
1781                         max-frequency = <200000000>;
1782                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1783                         resets = <&cpg 313>;
1784                         status = "disabled";
1785                 };
1786
1787                 sdhi2: sd@ee140000 {
1788                         compatible = "renesas,sdhi-r8a774a1",
1789                                      "renesas,rcar-gen3-sdhi";
1790                         reg = <0 0xee140000 0 0x2000>;
1791                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1792                         clocks = <&cpg CPG_MOD 312>;
1793                         max-frequency = <200000000>;
1794                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1795                         resets = <&cpg 312>;
1796                         status = "disabled";
1797                 };
1798
1799                 sdhi3: sd@ee160000 {
1800                         compatible = "renesas,sdhi-r8a774a1",
1801                                      "renesas,rcar-gen3-sdhi";
1802                         reg = <0 0xee160000 0 0x2000>;
1803                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1804                         clocks = <&cpg CPG_MOD 311>;
1805                         max-frequency = <200000000>;
1806                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1807                         resets = <&cpg 311>;
1808                         status = "disabled";
1809                 };
1810
1811                 gic: interrupt-controller@f1010000 {
1812                         compatible = "arm,gic-400";
1813                         #interrupt-cells = <3>;
1814                         #address-cells = <0>;
1815                         interrupt-controller;
1816                         reg = <0x0 0xf1010000 0 0x1000>,
1817                               <0x0 0xf1020000 0 0x20000>,
1818                               <0x0 0xf1040000 0 0x20000>,
1819                               <0x0 0xf1060000 0 0x20000>;
1820                         interrupts = <GIC_PPI 9
1821                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
1822                         clocks = <&cpg CPG_MOD 408>;
1823                         clock-names = "clk";
1824                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1825                         resets = <&cpg 408>;
1826                 };
1827
1828                 fcpf0: fcp@fe950000 {
1829                         compatible = "renesas,fcpf";
1830                         reg = <0 0xfe950000 0 0x200>;
1831                         clocks = <&cpg CPG_MOD 615>;
1832                         power-domains = <&sysc R8A774A1_PD_A3VC>;
1833                         resets = <&cpg 615>;
1834                 };
1835
1836                 fcpvb0: fcp@fe96f000 {
1837                         compatible = "renesas,fcpv";
1838                         reg = <0 0xfe96f000 0 0x200>;
1839                         clocks = <&cpg CPG_MOD 607>;
1840                         power-domains = <&sysc R8A774A1_PD_A3VC>;
1841                         resets = <&cpg 607>;
1842                 };
1843
1844                 fcpvd0: fcp@fea27000 {
1845                         compatible = "renesas,fcpv";
1846                         reg = <0 0xfea27000 0 0x200>;
1847                         clocks = <&cpg CPG_MOD 603>;
1848                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1849                         resets = <&cpg 603>;
1850                         iommus = <&ipmmu_vi0 8>;
1851                 };
1852
1853                 fcpvd1: fcp@fea2f000 {
1854                         compatible = "renesas,fcpv";
1855                         reg = <0 0xfea2f000 0 0x200>;
1856                         clocks = <&cpg CPG_MOD 602>;
1857                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1858                         resets = <&cpg 602>;
1859                         iommus = <&ipmmu_vi0 9>;
1860                 };
1861
1862                 fcpvd2: fcp@fea37000 {
1863                         compatible = "renesas,fcpv";
1864                         reg = <0 0xfea37000 0 0x200>;
1865                         clocks = <&cpg CPG_MOD 601>;
1866                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1867                         resets = <&cpg 601>;
1868                         iommus = <&ipmmu_vi0 10>;
1869                 };
1870
1871                 fcpvi0: fcp@fe9af000 {
1872                         compatible = "renesas,fcpv";
1873                         reg = <0 0xfe9af000 0 0x200>;
1874                         clocks = <&cpg CPG_MOD 611>;
1875                         power-domains = <&sysc R8A774A1_PD_A3VC>;
1876                         resets = <&cpg 611>;
1877                         iommus = <&ipmmu_vc0 19>;
1878                 };
1879
1880                 csi20: csi2@fea80000 {
1881                         compatible = "renesas,r8a774a1-csi2";
1882                         reg = <0 0xfea80000 0 0x10000>;
1883                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1884                         clocks = <&cpg CPG_MOD 714>;
1885                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1886                         resets = <&cpg 714>;
1887                         status = "disabled";
1888
1889                         ports {
1890                                 #address-cells = <1>;
1891                                 #size-cells = <0>;
1892
1893                                 port@1 {
1894                                         #address-cells = <1>;
1895                                         #size-cells = <0>;
1896
1897                                         reg = <1>;
1898
1899                                         csi20vin0: endpoint@0 {
1900                                                 reg = <0>;
1901                                                 remote-endpoint = <&vin0csi20>;
1902                                         };
1903                                         csi20vin1: endpoint@1 {
1904                                                 reg = <1>;
1905                                                 remote-endpoint = <&vin1csi20>;
1906                                         };
1907                                         csi20vin2: endpoint@2 {
1908                                                 reg = <2>;
1909                                                 remote-endpoint = <&vin2csi20>;
1910                                         };
1911                                         csi20vin3: endpoint@3 {
1912                                                 reg = <3>;
1913                                                 remote-endpoint = <&vin3csi20>;
1914                                         };
1915                                         csi20vin4: endpoint@4 {
1916                                                 reg = <4>;
1917                                                 remote-endpoint = <&vin4csi20>;
1918                                         };
1919                                         csi20vin5: endpoint@5 {
1920                                                 reg = <5>;
1921                                                 remote-endpoint = <&vin5csi20>;
1922                                         };
1923                                         csi20vin6: endpoint@6 {
1924                                                 reg = <6>;
1925                                                 remote-endpoint = <&vin6csi20>;
1926                                         };
1927                                         csi20vin7: endpoint@7 {
1928                                                 reg = <7>;
1929                                                 remote-endpoint = <&vin7csi20>;
1930                                         };
1931                                 };
1932                         };
1933                 };
1934
1935                 csi40: csi2@feaa0000 {
1936                         compatible = "renesas,r8a774a1-csi2";
1937                         reg = <0 0xfeaa0000 0 0x10000>;
1938                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1939                         clocks = <&cpg CPG_MOD 716>;
1940                         power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
1941                         resets = <&cpg 716>;
1942                         status = "disabled";
1943
1944                         ports {
1945                                 #address-cells = <1>;
1946                                 #size-cells = <0>;
1947
1948                                 port@1 {
1949                                         #address-cells = <1>;
1950                                         #size-cells = <0>;
1951
1952                                         reg = <1>;
1953
1954                                         csi40vin0: endpoint@0 {
1955                                                 reg = <0>;
1956                                                 remote-endpoint = <&vin0csi40>;
1957                                         };
1958                                         csi40vin1: endpoint@1 {
1959                                                 reg = <1>;
1960                                                 remote-endpoint = <&vin1csi40>;
1961                                         };
1962                                         csi40vin2: endpoint@2 {
1963                                                 reg = <2>;
1964                                                 remote-endpoint = <&vin2csi40>;
1965                                         };
1966                                         csi40vin3: endpoint@3 {
1967                                                 reg = <3>;
1968                                                 remote-endpoint = <&vin3csi40>;
1969                                         };
1970                                         csi40vin4: endpoint@4 {
1971                                                 reg = <4>;
1972                                                 remote-endpoint = <&vin4csi40>;
1973                                         };
1974                                         csi40vin5: endpoint@5 {
1975                                                 reg = <5>;
1976                                                 remote-endpoint = <&vin5csi40>;
1977                                         };
1978                                         csi40vin6: endpoint@6 {
1979                                                 reg = <6>;
1980                                                 remote-endpoint = <&vin6csi40>;
1981                                         };
1982                                         csi40vin7: endpoint@7 {
1983                                                 reg = <7>;
1984                                                 remote-endpoint = <&vin7csi40>;
1985                                         };
1986                                 };
1987
1988                         };
1989                 };
1990
1991                 prr: chipid@fff00044 {
1992                         compatible = "renesas,prr";
1993                         reg = <0 0xfff00044 0 4>;
1994                 };
1995         };
1996
1997         thermal-zones {
1998                 sensor_thermal1: sensor-thermal1 {
1999                         polling-delay-passive = <250>;
2000                         polling-delay = <1000>;
2001                         thermal-sensors = <&tsc 0>;
2002
2003                         trips {
2004                                 sensor1_crit: sensor1-crit {
2005                                         temperature = <120000>;
2006                                         hysteresis = <1000>;
2007                                         type = "critical";
2008                                 };
2009                         };
2010                 };
2011
2012                 sensor_thermal2: sensor-thermal2 {
2013                         polling-delay-passive = <250>;
2014                         polling-delay = <1000>;
2015                         thermal-sensors = <&tsc 1>;
2016
2017                         trips {
2018                                 sensor2_crit: sensor2-crit {
2019                                         temperature = <120000>;
2020                                         hysteresis = <1000>;
2021                                         type = "critical";
2022                                 };
2023                         };
2024
2025                 };
2026
2027                 sensor_thermal3: sensor-thermal3 {
2028                         polling-delay-passive = <250>;
2029                         polling-delay = <1000>;
2030                         thermal-sensors = <&tsc 2>;
2031
2032                         trips {
2033                                 sensor3_crit: sensor3-crit {
2034                                         temperature = <120000>;
2035                                         hysteresis = <1000>;
2036                                         type = "critical";
2037                                 };
2038                         };
2039                 };
2040         };
2041
2042         timer {
2043                 compatible = "arm,armv8-timer";
2044                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2045                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2046                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2047                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2048         };
2049
2050         /* External USB clocks - can be overridden by the board */
2051         usb3s0_clk: usb3s0 {
2052                 compatible = "fixed-clock";
2053                 #clock-cells = <0>;
2054                 clock-frequency = <0>;
2055         };
2056
2057         usb_extal_clk: usb_extal {
2058                 compatible = "fixed-clock";
2059                 #clock-cells = <0>;
2060                 clock-frequency = <0>;
2061         };
2062 };