arch/arm64/boot/dts/renesas/ebisu.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Ebisu board
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10
  11 / {
  12         model = "Renesas Ebisu board";
  13         compatible = "renesas,ebisu";
  14
  15         aliases {
  16                 serial0 = &scif2;
  17                 ethernet0 = &avb;
  18                 mmc0 = &sdhi3;
  19                 mmc1 = &sdhi0;
  20                 mmc2 = &sdhi1;
  21         };
  22
  23         chosen {
  24                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  25                 stdout-path = "serial0:115200n8";
  26         };
  27
  28         audio_clkout: audio-clkout {
  29                 /*
  30                  * This is same as <&rcar_sound 0>
  31                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  32                  */
  33                 compatible = "fixed-clock";
  34                 #clock-cells = <0>;
  35                 clock-frequency = <11289600>;
  36         };
  37
  38         backlight: backlight {
  39                 compatible = "pwm-backlight";
  40                 pwms = <&pwm3 0 50000>;
  41
  42                 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
  43                 default-brightness-level = <10>;
  44
  45                 power-supply = <&reg_12p0v>;
  46         };
  47
  48         cvbs-in {
  49                 compatible = "composite-video-connector";
  50                 label = "CVBS IN";
  51
  52                 port {
  53                         cvbs_con: endpoint {
  54                                 remote-endpoint = <&adv7482_ain7>;
  55                         };
  56                 };
  57         };
  58
  59         hdmi-in {
  60                 compatible = "hdmi-connector";
  61                 label = "HDMI IN";
  62                 type = "a";
  63
  64                 port {
  65                         hdmi_in_con: endpoint {
  66                                 remote-endpoint = <&adv7482_hdmi>;
  67                         };
  68                 };
  69         };
  70
  71         hdmi-out {
  72                 compatible = "hdmi-connector";
  73                 type = "a";
  74
  75                 port {
  76                         hdmi_con_out: endpoint {
  77                                 remote-endpoint = <&adv7511_out>;
  78                         };
  79                 };
  80         };
  81
  82         keys {
  83                 compatible = "gpio-keys";
  84
  85                 pinctrl-0 = <&keys_pins>;
  86                 pinctrl-names = "default";
  87
  88                 key-1 {
  89                         gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
  90                         linux,code = <KEY_1>;
  91                         label = "SW4-1";
  92                         wakeup-source;
  93                         debounce-interval = <20>;
  94                 };
  95                 key-2 {
  96                         gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
  97                         linux,code = <KEY_2>;
  98                         label = "SW4-2";
  99                         wakeup-source;
 100                         debounce-interval = <20>;
 101                 };
 102                 key-3 {
 103                         gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
 104                         linux,code = <KEY_3>;
 105                         label = "SW4-3";
 106                         wakeup-source;
 107                         debounce-interval = <20>;
 108                 };
 109                 key-4 {
 110                         gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
 111                         linux,code = <KEY_4>;
 112                         label = "SW4-4";
 113                         wakeup-source;
 114                         debounce-interval = <20>;
 115                 };
 116         };
 117
 118         lvds-decoder {
 119                 compatible = "thine,thc63lvd1024";
 120                 vcc-supply = <&reg_3p3v>;
 121
 122                 ports {
 123                         #address-cells = <1>;
 124                         #size-cells = <0>;
 125
 126                         port@0 {
 127                                 reg = <0>;
 128                                 thc63lvd1024_in: endpoint {
 129                                         remote-endpoint = <&lvds0_out>;
 130                                 };
 131                         };
 132
 133                         port@2 {
 134                                 reg = <2>;
 135                                 thc63lvd1024_out: endpoint {
 136                                         remote-endpoint = <&adv7511_in>;
 137                                 };
 138                         };
 139                 };
 140         };
 141
 142         memory@48000000 {
 143                 device_type = "memory";
 144                 /* first 128MB is reserved for secure area. */
 145                 reg = <0x0 0x48000000 0x0 0x38000000>;
 146         };
 147
 148         reg_1p8v: regulator0 {
 149                 compatible = "regulator-fixed";
 150                 regulator-name = "fixed-1.8V";
 151                 regulator-min-microvolt = <1800000>;
 152                 regulator-max-microvolt = <1800000>;
 153                 regulator-boot-on;
 154                 regulator-always-on;
 155         };
 156
 157         reg_3p3v: regulator1 {
 158                 compatible = "regulator-fixed";
 159                 regulator-name = "fixed-3.3V";
 160                 regulator-min-microvolt = <3300000>;
 161                 regulator-max-microvolt = <3300000>;
 162                 regulator-boot-on;
 163                 regulator-always-on;
 164         };
 165
 166         reg_12p0v: regulator2 {
 167                 compatible = "regulator-fixed";
 168                 regulator-name = "D12.0V";
 169                 regulator-min-microvolt = <12000000>;
 170                 regulator-max-microvolt = <12000000>;
 171                 regulator-boot-on;
 172                 regulator-always-on;
 173         };
 174
 175         rsnd_ak4613: sound {
 176                 compatible = "simple-audio-card";
 177
 178                 simple-audio-card,name = "rsnd-ak4613";
 179                 simple-audio-card,format = "left_j";
 180                 simple-audio-card,bitclock-master = <&sndcpu>;
 181                 simple-audio-card,frame-master = <&sndcpu>;
 182
 183                 sndcodec: simple-audio-card,codec {
 184                         sound-dai = <&ak4613>;
 185                 };
 186
 187                 sndcpu: simple-audio-card,cpu {
 188                         sound-dai = <&rcar_sound>;
 189                 };
 190         };
 191
 192         vbus0_usb2: regulator-vbus0-usb2 {
 193                 compatible = "regulator-fixed";
 194
 195                 regulator-name = "USB20_VBUS_CN";
 196                 regulator-min-microvolt = <5000000>;
 197                 regulator-max-microvolt = <5000000>;
 198
 199                 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
 200                 enable-active-high;
 201         };
 202
 203         vcc_sdhi0: regulator-vcc-sdhi0 {
 204                 compatible = "regulator-fixed";
 205
 206                 regulator-name = "SDHI0 Vcc";
 207                 regulator-min-microvolt = <3300000>;
 208                 regulator-max-microvolt = <3300000>;
 209
 210                 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
 211                 enable-active-high;
 212         };
 213
 214         vccq_sdhi0: regulator-vccq-sdhi0 {
 215                 compatible = "regulator-gpio";
 216
 217                 regulator-name = "SDHI0 VccQ";
 218                 regulator-min-microvolt = <1800000>;
 219                 regulator-max-microvolt = <3300000>;
 220
 221                 gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
 222                 gpios-states = <1>;
 223                 states = <3300000 1>, <1800000 0>;
 224         };
 225
 226         vcc_sdhi1: regulator-vcc-sdhi1 {
 227                 compatible = "regulator-fixed";
 228
 229                 regulator-name = "SDHI1 Vcc";
 230                 regulator-min-microvolt = <3300000>;
 231                 regulator-max-microvolt = <3300000>;
 232
 233                 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 234                 enable-active-high;
 235         };
 236
 237         vccq_sdhi1: regulator-vccq-sdhi1 {
 238                 compatible = "regulator-gpio";
 239
 240                 regulator-name = "SDHI1 VccQ";
 241                 regulator-min-microvolt = <1800000>;
 242                 regulator-max-microvolt = <3300000>;
 243
 244                 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
 245                 gpios-states = <1>;
 246                 states = <3300000 1>, <1800000 0>;
 247         };
 248
 249         vga {
 250                 compatible = "vga-connector";
 251
 252                 port {
 253                         vga_in: endpoint {
 254                                 remote-endpoint = <&adv7123_out>;
 255                         };
 256                 };
 257         };
 258
 259         vga-encoder {
 260                 compatible = "adi,adv7123";
 261
 262                 ports {
 263                         #address-cells = <1>;
 264                         #size-cells = <0>;
 265
 266                         port@0 {
 267                                 reg = <0>;
 268                                 adv7123_in: endpoint {
 269                                         remote-endpoint = <&du_out_rgb>;
 270                                 };
 271                         };
 272                         port@1 {
 273                                 reg = <1>;
 274                                 adv7123_out: endpoint {
 275                                         remote-endpoint = <&vga_in>;
 276                                 };
 277                         };
 278                 };
 279         };
 280
 281         x12_clk: x12 {
 282                 compatible = "fixed-clock";
 283                 #clock-cells = <0>;
 284                 clock-frequency = <24576000>;
 285         };
 286
 287         x13_clk: x13 {
 288                 compatible = "fixed-clock";
 289                 #clock-cells = <0>;
 290                 clock-frequency = <74250000>;
 291         };
 292 };
 293
 294 &audio_clk_a {
 295         clock-frequency = <22579200>;
 296 };
 297
 298 &avb {
 299         pinctrl-0 = <&avb_pins>;
 300         pinctrl-names = "default";
 301         phy-handle = <&phy0>;
 302         status = "okay";
 303
 304         phy0: ethernet-phy@0 {
 305                 compatible = "ethernet-phy-id0022.1622",
 306                              "ethernet-phy-ieee802.3-c22";
 307                 rxc-skew-ps = <1500>;
 308                 reg = <0>;
 309                 interrupt-parent = <&gpio2>;
 310                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 311                 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
 312                 /*
 313                  * TX clock internal delay mode is required for reliable
 314                  * 1Gbps communication using the KSZ9031RNX phy present on
 315                  * the Ebisu board, however, TX clock internal delay mode
 316                  * isn't supported on R-Car E3(e).  Thus, limit speed to
 317                  * 100Mbps for reliable communication.
 318                  */
 319                 max-speed = <100>;
 320         };
 321 };
 322
 323 &canfd {
 324         pinctrl-0 = <&canfd0_pins>;
 325         pinctrl-names = "default";
 326         status = "okay";
 327
 328         channel0 {
 329                 status = "okay";
 330         };
 331 };
 332
 333 &csi40 {
 334         status = "okay";
 335
 336         ports {
 337                 port@0 {
 338                         csi40_in: endpoint {
 339                                 clock-lanes = <0>;
 340                                 data-lanes = <1 2>;
 341                                 remote-endpoint = <&adv7482_txa>;
 342                         };
 343                 };
 344         };
 345 };
 346
 347 &du {
 348         pinctrl-0 = <&du_pins>;
 349         pinctrl-names = "default";
 350         status = "okay";
 351
 352         clocks = <&cpg CPG_MOD 724>,
 353                  <&cpg CPG_MOD 723>,
 354                  <&x13_clk>;
 355         clock-names = "du.0", "du.1", "dclkin.0";
 356
 357         ports {
 358                 port@0 {
 359                         endpoint {
 360                                 remote-endpoint = <&adv7123_in>;
 361                         };
 362                 };
 363         };
 364 };
 365
 366 &ehci0 {
 367         dr_mode = "otg";
 368         status = "okay";
 369 };
 370
 371 &extal_clk {
 372         clock-frequency = <48000000>;
 373 };
 374
 375 &hsusb {
 376         dr_mode = "otg";
 377         status = "okay";
 378 };
 379
 380 &i2c0 {
 381         status = "okay";
 382
 383         io_expander: gpio@20 {
 384                 compatible = "onnn,pca9654";
 385                 reg = <0x20>;
 386                 gpio-controller;
 387                 #gpio-cells = <2>;
 388                 interrupt-parent = <&gpio2>;
 389                 interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
 390         };
 391
 392         hdmi-encoder@39 {
 393                 compatible = "adi,adv7511w";
 394                 reg = <0x39>;
 395                 interrupt-parent = <&gpio1>;
 396                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 397
 398                 adi,input-depth = <8>;
 399                 adi,input-colorspace = "rgb";
 400                 adi,input-clock = "1x";
 401
 402                 ports {
 403                         #address-cells = <1>;
 404                         #size-cells = <0>;
 405
 406                         port@0 {
 407                                 reg = <0>;
 408                                 adv7511_in: endpoint {
 409                                         remote-endpoint = <&thc63lvd1024_out>;
 410                                 };
 411                         };
 412
 413                         port@1 {
 414                                 reg = <1>;
 415                                 adv7511_out: endpoint {
 416                                         remote-endpoint = <&hdmi_con_out>;
 417                                 };
 418                         };
 419                 };
 420         };
 421
 422         video-receiver@70 {
 423                 compatible = "adi,adv7482";
 424                 reg = <0x70>;
 425
 426                 interrupt-parent = <&gpio0>;
 427                 interrupt-names = "intrq1", "intrq2";
 428                 interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
 429                              <17 IRQ_TYPE_LEVEL_LOW>;
 430
 431                 ports {
 432                         #address-cells = <1>;
 433                         #size-cells = <0>;
 434
 435                         port@7 {
 436                                 reg = <7>;
 437
 438                                 adv7482_ain7: endpoint {
 439                                         remote-endpoint = <&cvbs_con>;
 440                                 };
 441                         };
 442
 443                         port@8 {
 444                                 reg = <8>;
 445
 446                                 adv7482_hdmi: endpoint {
 447                                         remote-endpoint = <&hdmi_in_con>;
 448                                 };
 449                         };
 450
 451                         port@a {
 452                                 reg = <10>;
 453
 454                                 adv7482_txa: endpoint {
 455                                         clock-lanes = <0>;
 456                                         data-lanes = <1 2>;
 457                                         remote-endpoint = <&csi40_in>;
 458                                 };
 459                         };
 460                 };
 461         };
 462 };
 463
 464 &i2c3 {
 465         status = "okay";
 466
 467         ak4613: codec@10 {
 468                 compatible = "asahi-kasei,ak4613";
 469                 #sound-dai-cells = <0>;
 470                 reg = <0x10>;
 471                 clocks = <&rcar_sound 3>;
 472
 473                 asahi-kasei,in1-single-end;
 474                 asahi-kasei,in2-single-end;
 475                 asahi-kasei,out1-single-end;
 476                 asahi-kasei,out2-single-end;
 477                 asahi-kasei,out3-single-end;
 478                 asahi-kasei,out4-single-end;
 479                 asahi-kasei,out5-single-end;
 480                 asahi-kasei,out6-single-end;
 481         };
 482
 483         cs2000: clk-multiplier@4f {
 484                 #clock-cells = <0>;
 485                 compatible = "cirrus,cs2000-cp";
 486                 reg = <0x4f>;
 487                 clocks = <&audio_clkout>, <&x12_clk>;
 488                 clock-names = "clk_in", "ref_clk";
 489
 490                 assigned-clocks = <&cs2000>;
 491                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 492         };
 493 };
 494
 495 &i2c_dvfs {
 496         status = "okay";
 497
 498         clock-frequency = <400000>;
 499
 500         pmic: pmic@30 {
 501                 pinctrl-0 = <&irq0_pins>;
 502                 pinctrl-names = "default";
 503
 504                 compatible = "rohm,bd9571mwv";
 505                 reg = <0x30>;
 506                 interrupt-parent = <&intc_ex>;
 507                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 508                 interrupt-controller;
 509                 #interrupt-cells = <2>;
 510                 gpio-controller;
 511                 #gpio-cells = <2>;
 512                 rohm,ddr-backup-power = <0x1>;
 513                 rohm,rstbmode-level;
 514         };
 515
 516         eeprom@50 {
 517                 compatible = "rohm,br24t01", "atmel,24c01";
 518                 reg = <0x50>;
 519                 pagesize = <8>;
 520         };
 521 };
 522
 523 &lvds0 {
 524         status = "okay";
 525
 526         clocks = <&cpg CPG_MOD 727>,
 527                  <&x13_clk>,
 528                  <&extal_clk>;
 529         clock-names = "fck", "dclkin.0", "extal";
 530
 531         ports {
 532                 port@1 {
 533                         lvds0_out: endpoint {
 534                                 remote-endpoint = <&thc63lvd1024_in>;
 535                         };
 536                 };
 537         };
 538 };
 539
 540 &lvds1 {
 541         /*
 542          * Even though the LVDS1 output is not connected, the encoder must be
 543          * enabled to supply a pixel clock to the DU for the DPAD output when
 544          * LVDS0 is in use.
 545          */
 546         status = "okay";
 547
 548         clocks = <&cpg CPG_MOD 727>,
 549                  <&x13_clk>,
 550                  <&extal_clk>;
 551         clock-names = "fck", "dclkin.0", "extal";
 552 };
 553
 554 &ohci0 {
 555         dr_mode = "otg";
 556         status = "okay";
 557 };
 558
 559 &pcie_bus_clk {
 560         clock-frequency = <100000000>;
 561 };
 562
 563 &pciec0 {
 564         status = "okay";
 565 };
 566
 567 &pfc {
 568         avb_pins: avb {
 569                 groups = "avb_link", "avb_mii";
 570                 function = "avb";
 571         };
 572
 573         canfd0_pins: canfd0 {
 574                 groups = "canfd0_data";
 575                 function = "canfd0";
 576         };
 577
 578         du_pins: du {
 579                 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
 580                 function = "du";
 581         };
 582
 583         irq0_pins: irq0 {
 584                 groups = "intc_ex_irq0";
 585                 function = "intc_ex";
 586         };
 587
 588         keys_pins: keys {
 589                 pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
 590                 bias-pull-up;
 591         };
 592
 593         pwm3_pins: pwm3 {
 594                 groups = "pwm3_b";
 595                 function = "pwm3";
 596         };
 597
 598         pwm5_pins: pwm5 {
 599                 groups = "pwm5_a";
 600                 function = "pwm5";
 601         };
 602
 603         scif2_pins: scif2 {
 604                 groups = "scif2_data_a";
 605                 function = "scif2";
 606         };
 607
 608         sdhi0_pins: sd0 {
 609                 groups = "sdhi0_data4", "sdhi0_ctrl";
 610                 function = "sdhi0";
 611                 power-source = <3300>;
 612         };
 613
 614         sdhi0_pins_uhs: sd0_uhs {
 615                 groups = "sdhi0_data4", "sdhi0_ctrl";
 616                 function = "sdhi0";
 617                 power-source = <1800>;
 618         };
 619
 620         sdhi1_pins: sd1 {
 621                 groups = "sdhi1_data4", "sdhi1_ctrl";
 622                 function = "sdhi1";
 623                 power-source = <3300>;
 624         };
 625
 626         sdhi1_pins_uhs: sd1_uhs {
 627                 groups = "sdhi1_data4", "sdhi1_ctrl";
 628                 function = "sdhi1";
 629                 power-source = <1800>;
 630         };
 631
 632         sdhi3_pins: sd3 {
 633                 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
 634                 function = "sdhi3";
 635                 power-source = <1800>;
 636         };
 637
 638         sound_clk_pins: sound_clk {
 639                 groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
 640                          "audio_clkout_a", "audio_clkout1_a";
 641                 function = "audio_clk";
 642         };
 643
 644         sound_pins: sound {
 645                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
 646                 function = "ssi";
 647         };
 648
 649         usb0_pins: usb {
 650                 groups = "usb0_b", "usb0_id";
 651                 function = "usb0";
 652         };
 653
 654         usb30_pins: usb30 {
 655                 groups = "usb30";
 656                 function = "usb30";
 657         };
 658 };
 659
 660 &pwm3 {
 661         pinctrl-0 = <&pwm3_pins>;
 662         pinctrl-names = "default";
 663
 664         status = "okay";
 665 };
 666
 667 &pwm5 {
 668         pinctrl-0 = <&pwm5_pins>;
 669         pinctrl-names = "default";
 670
 671         status = "okay";
 672 };
 673
 674 &rcar_sound {
 675         pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
 676         pinctrl-names = "default";
 677
 678         /* Single DAI */
 679         #sound-dai-cells = <0>;
 680
 681         /* audio_clkout0/1/2/3 */
 682         #clock-cells = <1>;
 683         clock-frequency = <12288000 11289600>;
 684
 685         status = "okay";
 686
 687         /* update <audio_clk_b> to <cs2000> */
 688         clocks = <&cpg CPG_MOD 1005>,
 689                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 690                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 691                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 692                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 693                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 694                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 695                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 696                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 697                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 698                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 699                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 700                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 701                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 702                  <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
 703                  <&cpg CPG_CORE R8A77990_CLK_ZA2>;
 704
 705         rcar_sound,dai {
 706                 dai0 {
 707                         playback = <&ssi0>, <&src0>, <&dvc0>;
 708                         capture  = <&ssi1>, <&src1>, <&dvc1>;
 709                 };
 710         };
 711
 712 };
 713
 714 &rwdt {
 715         timeout-sec = <60>;
 716         status = "okay";
 717 };
 718
 719 &scif2 {
 720         pinctrl-0 = <&scif2_pins>;
 721         pinctrl-names = "default";
 722
 723         status = "okay";
 724 };
 725
 726 &sdhi0 {
 727         pinctrl-0 = <&sdhi0_pins>;
 728         pinctrl-1 = <&sdhi0_pins_uhs>;
 729         pinctrl-names = "default", "state_uhs";
 730
 731         vmmc-supply = <&vcc_sdhi0>;
 732         vqmmc-supply = <&vccq_sdhi0>;
 733         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 734         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 735         bus-width = <4>;
 736         sd-uhs-sdr50;
 737         sd-uhs-sdr104;
 738         status = "okay";
 739 };
 740
 741 &sdhi1 {
 742         pinctrl-0 = <&sdhi1_pins>;
 743         pinctrl-1 = <&sdhi1_pins_uhs>;
 744         pinctrl-names = "default", "state_uhs";
 745
 746         vmmc-supply = <&vcc_sdhi1>;
 747         vqmmc-supply = <&vccq_sdhi1>;
 748         cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
 749         bus-width = <4>;
 750         sd-uhs-sdr50;
 751         sd-uhs-sdr104;
 752         status = "okay";
 753 };
 754
 755 &sdhi3 {
 756         /* used for on-board 8bit eMMC */
 757         pinctrl-0 = <&sdhi3_pins>;
 758         pinctrl-1 = <&sdhi3_pins>;
 759         pinctrl-names = "default", "state_uhs";
 760
 761         vmmc-supply = <&reg_3p3v>;
 762         vqmmc-supply = <&reg_1p8v>;
 763         mmc-hs200-1_8v;
 764         mmc-hs400-1_8v;
 765         bus-width = <8>;
 766         no-sd;
 767         no-sdio;
 768         non-removable;
 769         full-pwr-cycle-in-suspend;
 770         status = "okay";
 771 };
 772
 773 &ssi1 {
 774         shared-pin;
 775 };
 776
 777 &usb2_phy0 {
 778         pinctrl-0 = <&usb0_pins>;
 779         pinctrl-names = "default";
 780
 781         vbus-supply = <&vbus0_usb2>;
 782         status = "okay";
 783 };
 784
 785 &usb3_peri0 {
 786         companion = <&xhci0>;
 787         status = "okay";
 788 };
 789
 790 &vin4 {
 791         status = "okay";
 792 };
 793
 794 &vin5 {
 795         status = "okay";
 796 };
 797
 798 &xhci0 {
 799         pinctrl-0 = <&usb30_pins>;
 800         pinctrl-names = "default";
 801
 802         status = "okay";
 803 };