arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright 2020, Compass Electronics Group, LLC
   4  */
   5
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/clk/versaclock.h>
   8
   9 / {
  10         memory@48000000 {
  11                 device_type = "memory";
  12                 /* first 128MB is reserved for secure area. */
  13                 reg = <0x0 0x48000000 0x0 0x78000000>;
  14         };
  15
  16         osc_32k: osc_32k {
  17                 compatible = "fixed-clock";
  18                 #clock-cells = <0>;
  19                 clock-frequency = <32768>;
  20                 clock-output-names = "osc_32k";
  21         };
  22
  23         reg_1p8v: regulator0 {
  24                 compatible = "regulator-fixed";
  25                 regulator-name = "fixed-1.8V";
  26                 regulator-min-microvolt = <1800000>;
  27                 regulator-max-microvolt = <1800000>;
  28                 regulator-boot-on;
  29                 regulator-always-on;
  30         };
  31
  32         reg_3p3v: regulator1 {
  33                 compatible = "regulator-fixed";
  34                 regulator-name = "fixed-3.3V";
  35                 regulator-min-microvolt = <3300000>;
  36                 regulator-max-microvolt = <3300000>;
  37                 regulator-boot-on;
  38                 regulator-always-on;
  39         };
  40
  41         wlan_pwrseq: wlan_pwrseq {
  42                 compatible = "mmc-pwrseq-simple";
  43                 reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
  44                 clocks = <&osc_32k>;
  45                 clock-names = "ext_clock";
  46                 post-power-on-delay-ms = <80>;
  47         };
  48 };
  49
  50 &avb {
  51         pinctrl-0 = <&avb_pins>;
  52         pinctrl-names = "default";
  53         phy-handle = <&phy0>;
  54         rx-internal-delay-ps = <1800>;
  55         tx-internal-delay-ps = <2000>;
  56         status = "okay";
  57
  58         phy0: ethernet-phy@0 {
  59                 reg = <0>;
  60                 interrupt-parent = <&gpio2>;
  61                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  62                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
  63         };
  64 };
  65
  66 &extal_clk {
  67         clock-frequency = <16666666>;
  68 };
  69
  70 &extalr_clk {
  71         clock-frequency = <32768>;
  72 };
  73
  74 &gpio6 {
  75         usb_hub_reset {
  76                 gpio-hog;
  77                 gpios = <10 GPIO_ACTIVE_HIGH>;
  78                 output-high;
  79                 line-name = "usb-hub-reset";
  80         };
  81 };
  82
  83 &hscif0 {
  84         pinctrl-0 = <&hscif0_pins>;
  85         pinctrl-names = "default";
  86         uart-has-rtscts;
  87         status = "okay";
  88
  89         bluetooth {
  90                 compatible = "brcm,bcm43438-bt";
  91                 shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
  92                 host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
  93                 device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
  94                 clocks = <&osc_32k>;
  95                 clock-names = "extclk";
  96                 max-speed = <4000000>;
  97         };
  98 };
  99
 100 &hscif2 {
 101         status = "okay";
 102         pinctrl-0 = <&hscif2_pins>;
 103         pinctrl-names = "default";
 104 };
 105
 106 &i2c4 {
 107         status = "okay";
 108         clock-frequency = <100000>;
 109
 110         pca9654: gpio@20 {
 111                 compatible = "onnn,pca9654";
 112                 reg = <0x20>;
 113                 gpio-controller;
 114                 #gpio-cells = <2>;
 115                 gpio-line-names =
 116                         "i2c4_20_0",
 117                         "wl_reg_on",
 118                         "bt_reg_on",
 119                         "i2c4_20_3",
 120                         "i2c4_20_4",
 121                         "bt_dev_wake",
 122                         "i2c4_20_6",
 123                         "i2c4_20_7";
 124         };
 125
 126         pca9654_lte: gpio@21 {
 127                 compatible = "onnn,pca9654";
 128                 reg = <0x21>;
 129                 interrupt-parent = <&gpio5>;
 130                 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
 131                 interrupt-controller;
 132                 #interrupt-cells = <2>;
 133                 gpio-controller;
 134                 #gpio-cells = <2>;
 135                 gpio-line-names =
 136                         "i2c4_21_0",
 137                         "zoe_pwr_on",
 138                         "zoe_extint",
 139                         "zoe_reset_n",
 140                         "sara_reset",
 141                         "i2c4_21_5",
 142                         "sara_pwr_off",
 143                         "sara_networking_status";
 144         };
 145
 146         eeprom@50 {
 147                 compatible = "microchip,24c64", "atmel,24c64";
 148                 pagesize = <32>;
 149                 read-only;      /* Manufacturing EEPROM programmed at factory */
 150                 reg = <0x50>;
 151         };
 152
 153         rtc@51 {
 154                 compatible = "nxp,pcf85263";
 155                 reg = <0x51>;
 156         };
 157
 158         versaclock5: versaclock_som@6a {
 159                 compatible = "idt,5p49v6965";
 160                 reg = <0x6a>;
 161                 #clock-cells = <1>;
 162                 clocks = <&x304_clk>;
 163                 clock-names = "xin";
 164                 /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
 165                 assigned-clocks = <&versaclock5 1>,
 166                                    <&versaclock5 2>,
 167                                    <&versaclock5 3>,
 168                                    <&versaclock5 4>;
 169
 170                 assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
 171
 172                 OUT1 {
 173                         idt,mode = <VC5_CMOS>;
 174                         idt,voltage-microvolt = <1800000>;
 175                         idt,slew-percent = <100>;
 176                 };
 177
 178                 OUT2 {
 179                         idt,mode = <VC5_CMOS>;
 180                         idt,voltage-microvolt = <1800000>;
 181                         idt,slew-percent = <100>;
 182                 };
 183
 184                 OUT3 {
 185                         idt,mode = <VC5_CMOS>;
 186                         idt,voltage-microvolt = <1800000>;
 187                         idt,slew-percent = <100>;
 188                 };
 189
 190                 OUT4 {
 191                         idt,mode = <VC5_CMOS>;
 192                         idt,voltage-microvolt = <3300000>;
 193                         idt,slew-percent = <100>;
 194                 };
 195         };
 196 };
 197
 198 &pfc {
 199         pinctrl-0 = <&scif_clk_pins>;
 200         pinctrl-names = "default";
 201
 202         avb_pins: avb {
 203                 mux {
 204                         groups = "avb_link", "avb_mdio", "avb_mii";
 205                         function = "avb";
 206                 };
 207
 208                 pins_mdio {
 209                         groups = "avb_mdio";
 210                         drive-strength = <24>;
 211                 };
 212
 213                 pins_mii_tx {
 214                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 215                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 216                         drive-strength = <12>;
 217                 };
 218         };
 219
 220         scif2_pins: scif2 {
 221                 groups = "scif2_data_a";
 222                 function = "scif2";
 223         };
 224
 225         hscif0_pins: hscif0 {
 226                 groups = "hscif0_data", "hscif0_ctrl";
 227                 function = "hscif0";
 228         };
 229
 230         hscif1_pins: hscif1 {
 231                 groups = "hscif1_data_a", "hscif1_ctrl_a";
 232                 function = "hscif1";
 233         };
 234
 235         hscif2_pins: hscif2 {
 236                 groups = "hscif2_data_a";
 237                 function = "hscif2";
 238         };
 239
 240         scif0_pins: scif0 {
 241                 groups = "scif0_data";
 242                 function = "scif0";
 243         };
 244
 245         scif5_pins: scif5 {
 246                 groups = "scif5_data_a";
 247                 function = "scif5";
 248         };
 249
 250         scif_clk_pins: scif_clk {
 251                 groups = "scif_clk_a";
 252                 function = "scif_clk";
 253         };
 254
 255         i2c0_pins: i2c0 {
 256                 groups = "i2c0";
 257                 function = "i2c0";
 258         };
 259
 260         sdhi2_pins: sd2 {
 261                 groups = "sdhi2_data4", "sdhi2_ctrl";
 262                 function = "sdhi2";
 263                 power-source = <1800>;
 264         };
 265
 266         sdhi3_pins: sd3 {
 267                 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
 268                 function = "sdhi3";
 269                 power-source = <1800>;
 270         };
 271 };
 272
 273 &scif_clk {
 274         clock-frequency = <14745600>;
 275 };
 276
 277 &scif2 {
 278         pinctrl-0 = <&scif2_pins>;
 279         pinctrl-names = "default";
 280         status = "okay";
 281 };
 282
 283 &sdhi2 {
 284         pinctrl-names = "default";
 285         pinctrl-0 = <&sdhi2_pins>;
 286         bus-width = <4>;
 287         vmmc-supply = <&reg_3p3v>;
 288         vqmmc-supply = <&reg_1p8v>;
 289         non-removable;
 290         cap-power-off-card;
 291         pm-ignore-notify;
 292         keep-power-in-suspend;
 293         mmc-pwrseq = <&wlan_pwrseq>;
 294         status = "okay";
 295         #address-cells = <1>;
 296         #size-cells = <0>;
 297
 298         brcmf: bcrmf@1 {
 299                 reg = <1>;
 300                 compatible = "brcm,bcm4329-fmac";
 301                 interrupt-parent = <&gpio1>;
 302                 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
 303                 interrupt-names = "host-wake";
 304         };
 305 };
 306
 307 &sdhi3 {
 308         pinctrl-0 = <&sdhi3_pins>;
 309         pinctrl-1 = <&sdhi3_pins>;
 310         pinctrl-names = "default", "state_uhs";
 311         vmmc-supply = <&reg_3p3v>;
 312         vqmmc-supply = <&reg_1p8v>;
 313         bus-width = <8>;
 314         mmc-hs200-1_8v;
 315         no-sd;
 316         no-sdio;
 317         non-removable;
 318         fixed-emmc-driver-type = <1>;
 319         status = "okay";
 320 };
 321
 322 &usb_extal_clk {
 323         clock-frequency = <50000000>;
 324 };
 325
 326 &usb3s0_clk {
 327         clock-frequency = <100000000>;
 328 };