Merge branch 'for-5.11' into for-linus
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / qcom / sdm850-lenovo-yoga-c630.dts
1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3  * Lenovo Yoga C630
4  *
5  * Copyright (c) 2019, Linaro Ltd.
6  */
7
8 /dts-v1/;
9
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include "sdm845.dtsi"
15 #include "pm8998.dtsi"
16
17 / {
18         model = "Lenovo Yoga C630";
19         compatible = "lenovo,yoga-c630", "qcom,sdm845";
20
21         aliases {
22                 hsuart0 = &uart6;
23         };
24 };
25
26 &adsp_pas {
27         firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
28         status = "okay";
29 };
30
31 &apps_rsc {
32         pm8998-rpmh-regulators {
33                 compatible = "qcom,pm8998-rpmh-regulators";
34                 qcom,pmic-id = "a";
35
36                 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
37                 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
38
39                 vreg_s2a_1p125: smps2 {
40                 };
41
42                 vreg_s3a_1p35: smps3 {
43                         regulator-min-microvolt = <1352000>;
44                         regulator-max-microvolt = <1352000>;
45                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
46                 };
47
48                 vreg_s4a_1p8: smps4 {
49                         regulator-min-microvolt = <1800000>;
50                         regulator-max-microvolt = <1800000>;
51                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
52                 };
53
54                 vreg_s5a_2p04: smps5 {
55                         regulator-min-microvolt = <2040000>;
56                         regulator-max-microvolt = <2040000>;
57                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
58                 };
59
60                 vreg_s7a_1p025: smps7 {
61                 };
62
63                 vdd_qusb_hs0:
64                 vdda_hp_pcie_core:
65                 vdda_mipi_csi0_0p9:
66                 vdda_mipi_csi1_0p9:
67                 vdda_mipi_csi2_0p9:
68                 vdda_mipi_dsi0_pll:
69                 vdda_mipi_dsi1_pll:
70                 vdda_qlink_lv:
71                 vdda_qlink_lv_ck:
72                 vdda_qrefs_0p875:
73                 vdda_pcie_core:
74                 vdda_pll_cc_ebi01:
75                 vdda_pll_cc_ebi23:
76                 vdda_sp_sensor:
77                 vdda_ufs1_core:
78                 vdda_ufs2_core:
79                 vdda_usb1_ss_core:
80                 vdda_usb2_ss_core:
81                 vreg_l1a_0p875: ldo1 {
82                         regulator-min-microvolt = <880000>;
83                         regulator-max-microvolt = <880000>;
84                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
85                 };
86
87                 vddpx_10:
88                 vreg_l2a_1p2: ldo2 {
89                         regulator-min-microvolt = <1200000>;
90                         regulator-max-microvolt = <1200000>;
91                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
92                         regulator-always-on;
93                 };
94
95                 vreg_l3a_1p0: ldo3 {
96                 };
97
98                 vdd_wcss_cx:
99                 vdd_wcss_mx:
100                 vdda_wcss_pll:
101                 vreg_l5a_0p8: ldo5 {
102                         regulator-min-microvolt = <800000>;
103                         regulator-max-microvolt = <800000>;
104                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
105                 };
106
107                 vddpx_13:
108                 vreg_l6a_1p8: ldo6 {
109                         regulator-min-microvolt = <1800000>;
110                         regulator-max-microvolt = <1800000>;
111                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
112                 };
113
114                 vreg_l7a_1p8: ldo7 {
115                         regulator-min-microvolt = <1800000>;
116                         regulator-max-microvolt = <1800000>;
117                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
118                 };
119
120                 vreg_l8a_1p2: ldo8 {
121                 };
122
123                 vreg_l9a_1p8: ldo9 {
124                 };
125
126                 vreg_l10a_1p8: ldo10 {
127                 };
128
129                 vreg_l11a_1p0: ldo11 {
130                 };
131
132                 vdd_qfprom:
133                 vdd_qfprom_sp:
134                 vdda_apc1_cs_1p8:
135                 vdda_gfx_cs_1p8:
136                 vdda_qrefs_1p8:
137                 vdda_qusb_hs0_1p8:
138                 vddpx_11:
139                 vreg_l12a_1p8: ldo12 {
140                         regulator-min-microvolt = <1800000>;
141                         regulator-max-microvolt = <1800000>;
142                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
143                 };
144
145                 vddpx_2:
146                 vreg_l13a_2p95: ldo13 {
147                 };
148
149                 vreg_l14a_1p88: ldo14 {
150                         regulator-min-microvolt = <1880000>;
151                         regulator-max-microvolt = <1880000>;
152                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153                         regulator-always-on;
154                 };
155
156                 vreg_l15a_1p8: ldo15 {
157                 };
158
159                 vreg_l16a_2p7: ldo16 {
160                 };
161
162                 vreg_l17a_1p3: ldo17 {
163                         regulator-min-microvolt = <1304000>;
164                         regulator-max-microvolt = <1304000>;
165                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
166                 };
167
168                 vreg_l18a_2p7: ldo18 {
169                 };
170
171                 vreg_l19a_3p0: ldo19 {
172                         regulator-min-microvolt = <3100000>;
173                         regulator-max-microvolt = <3108000>;
174                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
175                 };
176
177                 vreg_l20a_2p95: ldo20 {
178                         regulator-min-microvolt = <2960000>;
179                         regulator-max-microvolt = <2960000>;
180                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
181                 };
182
183                 vreg_l21a_2p95: ldo21 {
184                 };
185
186                 vreg_l22a_2p85: ldo22 {
187                 };
188
189                 vreg_l23a_3p3: ldo23 {
190                 };
191
192                 vdda_qusb_hs0_3p1:
193                 vreg_l24a_3p075: ldo24 {
194                         regulator-min-microvolt = <3075000>;
195                         regulator-max-microvolt = <3083000>;
196                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
197                 };
198
199                 vreg_l25a_3p3: ldo25 {
200                         regulator-min-microvolt = <3104000>;
201                         regulator-max-microvolt = <3112000>;
202                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
203                 };
204
205                 vdda_hp_pcie_1p2:
206                 vdda_hv_ebi0:
207                 vdda_hv_ebi1:
208                 vdda_hv_ebi2:
209                 vdda_hv_ebi3:
210                 vdda_mipi_csi_1p25:
211                 vdda_mipi_dsi0_1p2:
212                 vdda_mipi_dsi1_1p2:
213                 vdda_pcie_1p2:
214                 vdda_ufs1_1p2:
215                 vdda_ufs2_1p2:
216                 vdda_usb1_ss_1p2:
217                 vdda_usb2_ss_1p2:
218                 vreg_l26a_1p2: ldo26 {
219                         regulator-min-microvolt = <1200000>;
220                         regulator-max-microvolt = <1208000>;
221                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
222                 };
223
224                 vreg_l28a_3p0: ldo28 {
225                 };
226
227                 vreg_lvs1a_1p8: lvs1 {
228                 };
229
230                 vreg_lvs2a_1p8: lvs2 {
231                 };
232         };
233 };
234
235 &apps_smmu {
236         /* TODO: Figure out how to survive booting with this enabled */
237         status = "disabled";
238 };
239
240 &cdsp_pas {
241         firmware-name = "qcom/LENOVO/81JL/qccdsp850.mbn";
242         status = "okay";
243 };
244
245 &gcc {
246         protected-clocks = <GCC_QSPI_CORE_CLK>,
247                            <GCC_QSPI_CORE_CLK_SRC>,
248                            <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
249 };
250
251 &gpu {
252         zap-shader {
253                 memory-region = <&gpu_mem>;
254                 firmware-name = "qcom/LENOVO/81JL/qcdxkmsuc850.mbn";
255         };
256 };
257
258 &i2c1 {
259         status = "okay";
260         clock-frequency = <400000>;
261 };
262
263 &i2c3 {
264         status = "okay";
265         clock-frequency = <400000>;
266
267         hid@15 {
268                 compatible = "hid-over-i2c";
269                 reg = <0x15>;
270                 hid-descr-addr = <0x1>;
271
272                 interrupts-extended = <&tlmm 37 IRQ_TYPE_EDGE_RISING>;
273         };
274
275         hid@2c {
276                 compatible = "hid-over-i2c";
277                 reg = <0x2c>;
278                 hid-descr-addr = <0x20>;
279
280                 interrupts-extended = <&tlmm 37 IRQ_TYPE_EDGE_RISING>;
281
282                 pinctrl-names = "default";
283                 pinctrl-0 = <&i2c2_hid_active>;
284         };
285 };
286
287 &i2c5 {
288         status = "okay";
289         clock-frequency = <400000>;
290
291         hid@10 {
292                 compatible = "hid-over-i2c";
293                 reg = <0x10>;
294                 hid-descr-addr = <0x1>;
295
296                 interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>;
297
298                 pinctrl-names = "default";
299                 pinctrl-0 = <&i2c6_hid_active>;
300         };
301 };
302
303 &i2c11 {
304         status = "okay";
305         clock-frequency = <400000>;
306
307         hid@5c {
308                 compatible = "hid-over-i2c";
309                 reg = <0x5c>;
310                 hid-descr-addr = <0x1>;
311
312                 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
313
314                 pinctrl-names = "default";
315                 pinctrl-0 = <&i2c12_hid_active>;
316         };
317 };
318
319 &mss_pil {
320         firmware-name = "qcom/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/LENOVO/81JL/qcdsp2850.mbn";
321 };
322
323 &qup_i2c12_default {
324         drive-strength = <2>;
325         bias-disable;
326 };
327
328 &qup_uart6_default {
329         pinmux {
330                  pins = "gpio45", "gpio46", "gpio47", "gpio48";
331                  function = "qup6";
332         };
333
334         cts {
335                 pins = "gpio45";
336                 bias-pull-down;
337         };
338
339         rts-tx {
340                 pins = "gpio46", "gpio47";
341                 drive-strength = <2>;
342                 bias-disable;
343         };
344
345         rx {
346                 pins = "gpio48";
347                 bias-pull-up;
348         };
349 };
350
351 &qupv3_id_0 {
352         status = "okay";
353 };
354
355 &qupv3_id_1 {
356         status = "okay";
357 };
358
359 &q6asmdai {
360         dai@0 {
361                 reg = <0>;
362         };
363
364         dai@1 {
365                 reg = <1>;
366         };
367 };
368
369 &sound {
370         compatible = "qcom,db845c-sndcard";
371         model = "Lenovo-YOGA-C630-13Q50";
372
373         audio-routing =
374                 "RX_BIAS", "MCLK",
375                 "AMIC2", "MIC BIAS2",
376                 "SpkrLeft IN", "SPK1 OUT",
377                 "SpkrRight IN", "SPK2 OUT",
378                 "MM_DL1",  "MultiMedia1 Playback",
379                 "MultiMedia2 Capture", "MM_UL2";
380
381         mm1-dai-link {
382                 link-name = "MultiMedia1";
383                 cpu {
384                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
385                 };
386         };
387
388         mm2-dai-link {
389                 link-name = "MultiMedia2";
390                 cpu {
391                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
392                 };
393         };
394
395         slim-dai-link {
396                 link-name = "SLIM Playback";
397                 cpu {
398                         sound-dai = <&q6afedai SLIMBUS_0_RX>;
399                 };
400
401                 platform {
402                         sound-dai = <&q6routing>;
403                 };
404
405                 codec {
406                         sound-dai =  <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
407                 };
408         };
409
410         slimcap-dai-link {
411                 link-name = "SLIM Capture";
412                 cpu {
413                         sound-dai = <&q6afedai SLIMBUS_0_TX>;
414                 };
415
416                 platform {
417                         sound-dai = <&q6routing>;
418                 };
419
420                 codec {
421                         sound-dai = <&wcd9340 1>;
422                 };
423         };
424 };
425
426 &tlmm {
427         gpio-reserved-ranges = <0 4>, <81 4>;
428
429         i2c2_hid_active: i2c2-hid-active {
430                 pins = <37>;
431                 function = "gpio";
432
433                 input-enable;
434                 bias-pull-up;
435                 drive-strength = <2>;
436         };
437
438         i2c6_hid_active: i2c6-hid-active {
439                 pins = <125>;
440                 function = "gpio";
441
442                 input-enable;
443                 bias-pull-up;
444                 drive-strength = <2>;
445         };
446
447         i2c12_hid_active: i2c12-hid-active {
448                 pins = <92>;
449                 function = "gpio";
450
451                 input-enable;
452                 bias-pull-up;
453                 drive-strength = <2>;
454         };
455
456         wcd_intr_default: wcd_intr_default {
457                 pins = <54>;
458                 function = "gpio";
459
460                 input-enable;
461                 bias-pull-down;
462                 drive-strength = <2>;
463         };
464 };
465
466 &uart6 {
467         status = "okay";
468
469         bluetooth {
470                 compatible = "qcom,wcn3990-bt";
471
472                 vddio-supply = <&vreg_s4a_1p8>;
473                 vddxo-supply = <&vreg_l7a_1p8>;
474                 vddrf-supply = <&vreg_l17a_1p3>;
475                 vddch0-supply = <&vreg_l25a_3p3>;
476                 max-speed = <3200000>;
477         };
478 };
479
480 &ufs_mem_hc {
481         status = "okay";
482
483         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
484
485         vcc-supply = <&vreg_l20a_2p95>;
486         vcc-max-microamp = <600000>;
487 };
488
489 &ufs_mem_phy {
490         status = "okay";
491
492         vdda-phy-supply = <&vdda_ufs1_core>;
493         vdda-pll-supply = <&vdda_ufs1_1p2>;
494 };
495
496 &usb_1 {
497         status = "okay";
498 };
499
500 &usb_1_dwc3 {
501         dr_mode = "host";
502 };
503
504 &usb_1_hsphy {
505         status = "okay";
506
507         vdd-supply = <&vdda_usb1_ss_core>;
508         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
509         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
510
511         qcom,imp-res-offset-value = <8>;
512         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
513         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
514         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
515 };
516
517 &usb_1_qmpphy {
518         status = "okay";
519
520         vdda-phy-supply = <&vdda_usb1_ss_1p2>;
521         vdda-pll-supply = <&vdda_usb1_ss_core>;
522 };
523
524 &usb_2 {
525         status = "okay";
526 };
527
528 &usb_2_dwc3 {
529         dr_mode = "host";
530 };
531
532 &usb_2_hsphy {
533         status = "okay";
534
535         vdd-supply = <&vdda_usb2_ss_core>;
536         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
537         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
538
539         qcom,imp-res-offset-value = <8>;
540         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
541 };
542
543 &usb_2_qmpphy {
544         status = "okay";
545
546         vdda-phy-supply = <&vdda_usb2_ss_1p2>;
547         vdda-pll-supply = <&vdda_usb2_ss_core>;
548 };
549
550 &wcd9340{
551         pinctrl-0 = <&wcd_intr_default>;
552         pinctrl-names = "default";
553         clock-names = "extclk";
554         clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
555         reset-gpios = <&tlmm 64 0>;
556         vdd-buck-supply = <&vreg_s4a_1p8>;
557         vdd-buck-sido-supply = <&vreg_s4a_1p8>;
558         vdd-tx-supply = <&vreg_s4a_1p8>;
559         vdd-rx-supply = <&vreg_s4a_1p8>;
560         vdd-io-supply = <&vreg_s4a_1p8>;
561
562         swm: swm@c85 {
563                 left_spkr: wsa8810-left{
564                         compatible = "sdw10217211000";
565                         reg = <0 3>;
566                         powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
567                         #thermal-sensor-cells = <0>;
568                         sound-name-prefix = "SpkrLeft";
569                         #sound-dai-cells = <0>;
570                 };
571
572                 right_spkr: wsa8810-right{
573                         compatible = "sdw10217211000";
574                         powerdown-gpios = <&wcdgpio 3 GPIO_ACTIVE_HIGH>;
575                         reg = <0 4>;
576                         #thermal-sensor-cells = <0>;
577                         sound-name-prefix = "SpkrRight";
578                         #sound-dai-cells = <0>;
579                 };
580         };
581 };
582
583 &wifi {
584         status = "okay";
585
586         vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
587         vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
588         vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
589         vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
590
591         qcom,snoc-host-cap-8bit-quirk;
592 };