1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019, Linaro Ltd.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi"
14 #include "pm8998.dtsi"
15 #include "pmi8998.dtsi"
18 model = "Thundercomm Dragonboard 845c";
19 compatible = "thundercomm,db845c", "qcom,sdm845";
27 stdout-path = "serial0:115200n8";
30 dc12v: dc12v-regulator {
31 compatible = "regulator-fixed";
32 regulator-name = "DC12V";
33 regulator-min-microvolt = <12000000>;
34 regulator-max-microvolt = <12000000>;
39 compatible = "gpio-keys";
42 pinctrl-names = "default";
43 pinctrl-0 = <&vol_up_pin_a>;
47 linux,code = <KEY_VOLUMEUP>;
48 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
53 compatible = "gpio-leds";
56 label = "green:user4";
57 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
58 linux,default-trigger = "panic-indicator";
59 default-state = "off";
63 label = "yellow:wlan";
64 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "phy0tx";
66 default-state = "off";
71 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
72 linux,default-trigger = "bluetooth-power";
73 default-state = "off";
78 compatible = "hdmi-connector";
83 remote-endpoint = <<9611_out>;
88 lt9611_1v8: lt9611-vdd18-regulator {
89 compatible = "regulator-fixed";
90 regulator-name = "LT9611_1V8";
92 vin-supply = <&vdc_5v>;
93 regulator-min-microvolt = <1800000>;
94 regulator-max-microvolt = <1800000>;
96 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
100 lt9611_3v3: lt9611-3v3 {
101 compatible = "regulator-fixed";
102 regulator-name = "LT9611_3V3";
104 vin-supply = <&vdc_3v3>;
105 regulator-min-microvolt = <3300000>;
106 regulator-max-microvolt = <3300000>;
108 // TODO: make it possible to drive same GPIO from two clients
109 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
110 // enable-active-high;
113 pcie0_1p05v: pcie-0-1p05v-regulator {
114 compatible = "regulator-fixed";
115 regulator-name = "PCIE0_1.05V";
117 vin-supply = <&vbat>;
118 regulator-min-microvolt = <1050000>;
119 regulator-max-microvolt = <1050000>;
121 // TODO: make it possible to drive same GPIO from two clients
122 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
123 // enable-active-high;
126 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
127 compatible = "regulator-fixed";
128 regulator-name = "CAM0_DVDD_1V2";
129 regulator-min-microvolt = <1200000>;
130 regulator-max-microvolt = <1200000>;
132 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
133 pinctrl-names = "default";
134 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
135 vin-supply = <&vbat>;
138 cam0_avdd_2v8: reg_cam0_avdd_2v8 {
139 compatible = "regulator-fixed";
140 regulator-name = "CAM0_AVDD_2V8";
141 regulator-min-microvolt = <2800000>;
142 regulator-max-microvolt = <2800000>;
144 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
147 vin-supply = <&vbat>;
150 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
151 cam3_avdd_2v8: reg_cam3_avdd_2v8 {
152 compatible = "regulator-fixed";
153 regulator-name = "CAM3_AVDD_2V8";
154 regulator-min-microvolt = <2800000>;
155 regulator-max-microvolt = <2800000>;
157 vin-supply = <&vbat>;
160 pcie0_3p3v_dual: vldo-3v3-regulator {
161 compatible = "regulator-fixed";
162 regulator-name = "VLDO_3V3";
164 vin-supply = <&vbat>;
165 regulator-min-microvolt = <3300000>;
166 regulator-max-microvolt = <3300000>;
168 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&pcie0_pwren_state>;
175 v5p0_hdmiout: v5p0-hdmiout-regulator {
176 compatible = "regulator-fixed";
177 regulator-name = "V5P0_HDMIOUT";
179 vin-supply = <&vdc_5v>;
180 regulator-min-microvolt = <500000>;
181 regulator-max-microvolt = <500000>;
183 // TODO: make it possible to drive same GPIO from two clients
184 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
185 // enable-active-high;
188 vbat: vbat-regulator {
189 compatible = "regulator-fixed";
190 regulator-name = "VBAT";
192 vin-supply = <&dc12v>;
193 regulator-min-microvolt = <4200000>;
194 regulator-max-microvolt = <4200000>;
198 vbat_som: vbat-som-regulator {
199 compatible = "regulator-fixed";
200 regulator-name = "VBAT_SOM";
202 vin-supply = <&dc12v>;
203 regulator-min-microvolt = <4200000>;
204 regulator-max-microvolt = <4200000>;
208 vdc_3v3: vdc-3v3-regulator {
209 compatible = "regulator-fixed";
210 regulator-name = "VDC_3V3";
211 vin-supply = <&dc12v>;
212 regulator-min-microvolt = <3300000>;
213 regulator-max-microvolt = <3300000>;
217 vdc_5v: vdc-5v-regulator {
218 compatible = "regulator-fixed";
219 regulator-name = "VDC_5V";
221 vin-supply = <&dc12v>;
222 regulator-min-microvolt = <500000>;
223 regulator-max-microvolt = <500000>;
227 vreg_s4a_1p8: vreg-s4a-1p8 {
228 compatible = "regulator-fixed";
229 regulator-name = "vreg_s4a_1p8";
231 regulator-min-microvolt = <1800000>;
232 regulator-max-microvolt = <1800000>;
236 vph_pwr: vph-pwr-regulator {
237 compatible = "regulator-fixed";
238 regulator-name = "vph_pwr";
240 vin-supply = <&vbat_som>;
247 firmware-name = "qcom/sdm845/adsp.mdt";
251 pm8998-rpmh-regulators {
252 compatible = "qcom,pm8998-rpmh-regulators";
254 vdd-s1-supply = <&vph_pwr>;
255 vdd-s2-supply = <&vph_pwr>;
256 vdd-s3-supply = <&vph_pwr>;
257 vdd-s4-supply = <&vph_pwr>;
258 vdd-s5-supply = <&vph_pwr>;
259 vdd-s6-supply = <&vph_pwr>;
260 vdd-s7-supply = <&vph_pwr>;
261 vdd-s8-supply = <&vph_pwr>;
262 vdd-s9-supply = <&vph_pwr>;
263 vdd-s10-supply = <&vph_pwr>;
264 vdd-s11-supply = <&vph_pwr>;
265 vdd-s12-supply = <&vph_pwr>;
266 vdd-s13-supply = <&vph_pwr>;
267 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
268 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
269 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
270 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
271 vdd-l6-supply = <&vph_pwr>;
272 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
273 vdd-l9-supply = <&vreg_bob>;
274 vdd-l10-l23-l25-supply = <&vreg_bob>;
275 vdd-l13-l19-l21-supply = <&vreg_bob>;
276 vdd-l16-l28-supply = <&vreg_bob>;
277 vdd-l18-l22-supply = <&vreg_bob>;
278 vdd-l20-l24-supply = <&vreg_bob>;
279 vdd-l26-supply = <&vreg_s3a_1p35>;
280 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
282 vreg_s3a_1p35: smps3 {
283 regulator-min-microvolt = <1352000>;
284 regulator-max-microvolt = <1352000>;
287 vreg_s5a_2p04: smps5 {
288 regulator-min-microvolt = <1904000>;
289 regulator-max-microvolt = <2040000>;
292 vreg_s7a_1p025: smps7 {
293 regulator-min-microvolt = <900000>;
294 regulator-max-microvolt = <1028000>;
297 vreg_l1a_0p875: ldo1 {
298 regulator-min-microvolt = <880000>;
299 regulator-max-microvolt = <880000>;
300 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
304 regulator-min-microvolt = <800000>;
305 regulator-max-microvolt = <800000>;
306 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
309 vreg_l12a_1p8: ldo12 {
310 regulator-min-microvolt = <1800000>;
311 regulator-max-microvolt = <1800000>;
312 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
316 regulator-min-microvolt = <1800000>;
317 regulator-max-microvolt = <1800000>;
318 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
321 vreg_l13a_2p95: ldo13 {
322 regulator-min-microvolt = <1800000>;
323 regulator-max-microvolt = <2960000>;
324 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
327 vreg_l17a_1p3: ldo17 {
328 regulator-min-microvolt = <1304000>;
329 regulator-max-microvolt = <1304000>;
330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
333 vreg_l20a_2p95: ldo20 {
334 regulator-min-microvolt = <2960000>;
335 regulator-max-microvolt = <2968000>;
336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
339 vreg_l21a_2p95: ldo21 {
340 regulator-min-microvolt = <2960000>;
341 regulator-max-microvolt = <2968000>;
342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
345 vreg_l24a_3p075: ldo24 {
346 regulator-min-microvolt = <3088000>;
347 regulator-max-microvolt = <3088000>;
348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
351 vreg_l25a_3p3: ldo25 {
352 regulator-min-microvolt = <3300000>;
353 regulator-max-microvolt = <3312000>;
354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
357 vreg_l26a_1p2: ldo26 {
358 regulator-min-microvolt = <1200000>;
359 regulator-max-microvolt = <1200000>;
360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
363 vreg_lvs1a_1p8: lvs1 {
364 regulator-min-microvolt = <1800000>;
365 regulator-max-microvolt = <1800000>;
369 vreg_lvs2a_1p8: lvs2 {
370 regulator-min-microvolt = <1800000>;
371 regulator-max-microvolt = <1800000>;
376 pmi8998-rpmh-regulators {
377 compatible = "qcom,pmi8998-rpmh-regulators";
380 vdd-bob-supply = <&vph_pwr>;
383 regulator-min-microvolt = <3312000>;
384 regulator-max-microvolt = <3600000>;
385 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
386 regulator-allow-bypass;
393 firmware-name = "qcom/sdm845/cdsp.mdt";
398 vdda-supply = <&vreg_l26a_1p2>;
403 remote-endpoint = <<9611_a>;
404 data-lanes = <0 1 2 3>;
412 vdds-supply = <&vreg_l1a_0p875>;
416 protected-clocks = <GCC_QSPI_CORE_CLK>,
417 <GCC_QSPI_CORE_CLK_SRC>,
418 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
423 memory-region = <&gpu_mem>;
424 firmware-name = "qcom/sdm845/a630_zap.mbn";
430 clock-frequency = <400000>;
432 lt9611_codec: hdmi-bridge@3b {
433 compatible = "lontium,lt9611";
435 #sound-dai-cells = <1>;
437 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
439 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
441 vdd-supply = <<9611_1v8>;
442 vcc-supply = <<9611_3v3>;
444 pinctrl-names = "default";
445 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
448 #address-cells = <1>;
454 lt9611_out: endpoint {
455 remote-endpoint = <&hdmi_con>;
463 remote-endpoint = <&dsi0_out>;
471 /* On Low speed expansion */
477 /* On Low speed expansion */
492 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
497 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
498 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
500 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
502 pinctrl-names = "default";
503 pinctrl-0 = <&pcie0_default_state>;
509 vdda-phy-supply = <&vreg_l1a_0p875>;
510 vdda-pll-supply = <&vreg_l26a_1p2>;
515 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
517 pinctrl-names = "default";
518 pinctrl-0 = <&pcie1_default_state>;
524 vdda-phy-supply = <&vreg_l1a_0p875>;
525 vdda-pll-supply = <&vreg_l26a_1p2>;
534 "PM_GPIO5_BLUE_BT_LED",
538 "PM_GPIO9_YEL_WIFI_LED",
542 "PM_GPIO13_GREEN_U4_LED",
557 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
563 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
566 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
572 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
575 vol_up_pin_a: vol-up-active {
580 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
586 compatible = "qcom,pm8941-resin";
587 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
590 linux,code = <KEY_VOLUMEDOWN>;
594 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
598 qcom,sd-lines = <0 1 2 3>;
633 pinctrl-names = "default";
634 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
636 vmmc-supply = <&vreg_l21a_2p95>;
637 vqmmc-supply = <&vreg_l13a_2p95>;
640 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
644 compatible = "qcom,db845c-sndcard";
645 pinctrl-0 = <&quat_mi2s_active
646 &quat_mi2s_sd0_active
647 &quat_mi2s_sd1_active
648 &quat_mi2s_sd2_active
649 &quat_mi2s_sd3_active>;
650 pinctrl-names = "default";
654 "AMIC1", "MIC BIAS1",
655 "AMIC2", "MIC BIAS2",
656 "DMIC0", "MIC BIAS1",
657 "DMIC1", "MIC BIAS1",
658 "DMIC2", "MIC BIAS3",
659 "DMIC3", "MIC BIAS3",
660 "SpkrLeft IN", "SPK1 OUT",
661 "SpkrRight IN", "SPK2 OUT",
662 "MM_DL1", "MultiMedia1 Playback",
663 "MM_DL2", "MultiMedia2 Playback",
664 "MM_DL4", "MultiMedia4 Playback",
665 "MultiMedia3 Capture", "MM_UL3";
668 link-name = "MultiMedia1";
670 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
675 link-name = "MultiMedia2";
677 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
682 link-name = "MultiMedia3";
684 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
689 link-name = "MultiMedia4";
691 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
696 link-name = "HDMI Playback";
698 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
702 sound-dai = <&q6routing>;
706 sound-dai = <<9611_codec 0>;
711 link-name = "SLIM Playback";
713 sound-dai = <&q6afedai SLIMBUS_0_RX>;
717 sound-dai = <&q6routing>;
721 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
726 link-name = "SLIM Capture";
728 sound-dai = <&q6afedai SLIMBUS_0_TX>;
732 sound-dai = <&q6routing>;
736 sound-dai = <&wcd9340 1>;
742 /* On Low speed expansion */
748 cam0_default: cam0_default {
753 drive-strength = <16>;
759 function = "cam_mclk";
761 drive-strength = <16>;
766 cam3_default: cam3_default {
771 drive-strength = <16>;
776 function = "cam_mclk";
779 drive-strength = <16>;
784 dsi_sw_sel: dsi-sw-sel {
788 drive-strength = <2>;
793 lt9611_irq_pin: lt9611-irq {
799 pcie0_default_state: pcie0-default {
810 drive-strength = <2>;
819 drive-strength = <2>;
824 pcie0_pwren_state: pcie0-pwren {
828 drive-strength = <2>;
832 pcie1_default_state: pcie1-default {
837 drive-strength = <16>;
851 drive-strength = <2>;
859 drive-strength = <16>;
865 sdc2_default_state: sdc2-default {
871 * It seems that mmc_test reports errors if drive
872 * strength is not 16 on clk, cmd, and data pins.
874 drive-strength = <16>;
880 drive-strength = <10>;
886 drive-strength = <10>;
890 sdc2_card_det_n: sd-card-det-n {
896 wcd_intr_default: wcd_intr_default {
902 drive-strength = <2>;
915 compatible = "qcom,wcn3990-bt";
917 vddio-supply = <&vreg_s4a_1p8>;
918 vddxo-supply = <&vreg_l7a_1p8>;
919 vddrf-supply = <&vreg_l17a_1p3>;
920 vddch0-supply = <&vreg_l25a_3p3>;
921 max-speed = <3200000>;
935 dr_mode = "peripheral";
941 vdd-supply = <&vreg_l1a_0p875>;
942 vdda-pll-supply = <&vreg_l12a_1p8>;
943 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
945 qcom,imp-res-offset-value = <8>;
946 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
947 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
948 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
954 vdda-phy-supply = <&vreg_l26a_1p2>;
955 vdda-pll-supply = <&vreg_l1a_0p875>;
969 vdd-supply = <&vreg_l1a_0p875>;
970 vdda-pll-supply = <&vreg_l12a_1p8>;
971 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
973 qcom,imp-res-offset-value = <8>;
974 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
980 vdda-phy-supply = <&vreg_l26a_1p2>;
981 vdda-pll-supply = <&vreg_l1a_0p875>;
987 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
989 vcc-supply = <&vreg_l20a_2p95>;
990 vcc-max-microamp = <800000>;
996 vdda-phy-supply = <&vreg_l1a_0p875>;
997 vdda-pll-supply = <&vreg_l26a_1p2>;
1001 pinctrl-0 = <&wcd_intr_default>;
1002 pinctrl-names = "default";
1003 clock-names = "extclk";
1004 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
1005 reset-gpios = <&tlmm 64 0>;
1006 vdd-buck-supply = <&vreg_s4a_1p8>;
1007 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1008 vdd-tx-supply = <&vreg_s4a_1p8>;
1009 vdd-rx-supply = <&vreg_s4a_1p8>;
1010 vdd-io-supply = <&vreg_s4a_1p8>;
1013 left_spkr: wsa8810-left{
1014 compatible = "sdw10217201000";
1016 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
1017 #thermal-sensor-cells = <0>;
1018 sound-name-prefix = "SpkrLeft";
1019 #sound-dai-cells = <0>;
1022 right_spkr: wsa8810-right{
1023 compatible = "sdw10217201000";
1024 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
1026 #thermal-sensor-cells = <0>;
1027 sound-name-prefix = "SpkrRight";
1028 #sound-dai-cells = <0>;
1036 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1037 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1038 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1039 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1041 qcom,snoc-host-cap-8bit-quirk;
1044 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1046 drive-strength = <16>;
1051 pins = "gpio41", "gpio42", "gpio43", "gpio44";
1056 &qup_i2c10_default {
1058 pins = "gpio55", "gpio56";
1059 drive-strength = <2>;
1064 &qup_uart6_default {
1066 pins = "gpio45", "gpio46", "gpio47", "gpio48";
1076 pins = "gpio46", "gpio47";
1077 drive-strength = <2>;
1087 &qup_uart9_default {
1090 drive-strength = <2>;
1096 drive-strength = <2>;
1111 compatible = "ovti,ov8856";
1115 reset-gpios = <&tlmm 9 0>;
1116 pinctrl-names = "default";
1117 pinctrl-0 = <&cam0_default>;
1118 gpios = <&tlmm 13 0>,
1121 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
1122 clock-names = "xvclk";
1123 clock-frequency = <19200000>;
1125 /* The &vreg_s4a_1p8 trace is powered on as a,
1126 * so it is represented by a fixed regulator.
1128 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
1129 * both have to be enabled through the power management
1132 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
1134 dovdd-supply = <&vreg_lvs1a_1p8>;
1135 avdd-supply = <&cam0_avdd_2v8>;
1136 dvdd-supply = <&cam0_dvdd_1v2>;
1141 ov8856_ep: endpoint {
1143 link-frequencies = /bits/ 64
1144 <360000000 180000000>;
1145 data-lanes = <1 2 3 4>;
1146 // remote-endpoint = <&csiphy0_ep>;
1154 compatible = "ovti,ov7251";
1156 // I2C address as per ov7251.txt linux documentation
1160 enable-gpios = <&tlmm 21 0>;
1161 pinctrl-names = "default";
1162 pinctrl-0 = <&cam3_default>;
1163 gpios = <&tlmm 16 0>,
1166 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
1167 clock-names = "xclk";
1168 clock-frequency = <24000000>;
1170 /* The &vreg_s4a_1p8 trace always powered on.
1172 * The 2.8V vdda-supply regulator is enabled when the
1173 * vreg_s4a_1p8 trace is pulled high.
1174 * It too is represented by a fixed regulator.
1176 * No 1.2V vddd-supply regulator is used.
1178 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
1180 vdddo-supply = <&vreg_lvs1a_1p8>;
1181 vdda-supply = <&cam3_avdd_2v8>;
1186 ov7251_ep: endpoint {
1189 // remote-endpoint = <&csiphy3_ep>;