1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Cheza device tree source (common between revisions)
5 * Copyright 2018 Google LLC.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include "sdm845.dtsi"
13 /* PMICs depend on spmi_bus label and so must come after SoC */
14 #include "pm8005.dtsi"
15 #include "pm8998.dtsi"
19 bluetooth0 = &bluetooth;
26 stdout-path = "serial0:115200n8";
29 backlight: backlight {
30 compatible = "pwm-backlight";
31 pwms = <&cros_ec_pwm 0>;
32 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
33 power-supply = <&ppvar_sys>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&ap_edp_bklten>;
38 /* FIXED REGULATORS - parents above children */
40 /* This is the top level supply and variable voltage */
41 ppvar_sys: ppvar-sys-regulator {
42 compatible = "regulator-fixed";
43 regulator-name = "ppvar_sys";
48 /* This divides ppvar_sys by 2, so voltage is variable */
49 src_vph_pwr: src-vph-pwr-regulator {
50 compatible = "regulator-fixed";
51 regulator-name = "src_vph_pwr";
53 /* EC turns on with switchcap_on_l; always on for AP */
57 vin-supply = <&ppvar_sys>;
60 pp5000_a: pp5000-a-regulator {
61 compatible = "regulator-fixed";
62 regulator-name = "pp5000_a";
64 /* EC turns on with en_pp5000_a; always on for AP */
67 regulator-min-microvolt = <5000000>;
68 regulator-max-microvolt = <5000000>;
70 vin-supply = <&ppvar_sys>;
73 src_vreg_bob: src-vreg-bob-regulator {
74 compatible = "regulator-fixed";
75 regulator-name = "src_vreg_bob";
77 /* EC turns on with vbob_en; always on for AP */
80 regulator-min-microvolt = <3600000>;
81 regulator-max-microvolt = <3600000>;
83 vin-supply = <&ppvar_sys>;
86 pp3300_dx_edp: pp3300-dx-edp-regulator {
87 compatible = "regulator-fixed";
88 regulator-name = "pp3300_dx_edp";
90 regulator-min-microvolt = <3300000>;
91 regulator-max-microvolt = <3300000>;
93 gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&en_pp3300_dx_edp>;
100 * Apparently RPMh does not provide support for PM8998 S4 because it
101 * is always-on; model it as a fixed regulator.
103 src_pp1800_s4a: pm8998-smps4 {
104 compatible = "regulator-fixed";
105 regulator-name = "src_pp1800_s4a";
107 regulator-min-microvolt = <1800000>;
108 regulator-max-microvolt = <1800000>;
113 vin-supply = <&src_vph_pwr>;
116 /* BOARD-SPECIFIC TOP LEVEL NODES */
119 compatible = "gpio-keys";
120 pinctrl-names = "default";
121 pinctrl-0 = <&pen_eject_odl>;
124 label = "Pen Insert";
125 /* Insert = low, eject = high */
126 gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
127 linux,code = <SW_PEN_INSERTED>;
128 linux,input-type = <EV_SW>;
134 compatible ="innolux,p120zdg-bf1";
135 power-supply = <&pp3300_dx_edp>;
136 backlight = <&backlight>;
141 panel_in_edp: endpoint {
142 remote-endpoint = <&sn65dsi86_out>;
150 * Reserved memory changes
152 * Putting this all together (out of order with the rest of the file) to keep
153 * all modifications to the memory map (from sdm845.dtsi) in one place.
157 * Our mpss_region is 8MB bigger than the default one and that conflicts
158 * with venus_mem and cdsp_mem.
160 * For venus_mem we'll delete and re-create at a different address.
162 * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
163 * that also means we need to delete cdsp_pas.
165 /delete-node/ &venus_mem;
166 /delete-node/ &cdsp_mem;
167 /delete-node/ &cdsp_pas;
168 /delete-node/ &gpu_mem;
170 /* Increase the size from 120 MB to 128 MB */
172 reg = <0 0x8e000000 0 0x8000000>;
175 /* Increase the size from 2MB to 8MB */
177 reg = <0 0x88f00000 0 0x800000>;
182 venus_mem: memory@96000000 {
183 reg = <0 0x96000000 0 0x500000>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
195 compatible = "jedec,spi-nor";
199 * In theory chip supports up to 104 MHz and controller up
200 * to 80 MHz, but above 25 MHz wasn't reliable so we'll use
201 * that for now. b:117440651
203 spi-max-frequency = <25000000>;
204 spi-tx-bus-width = <2>;
205 spi-rx-bus-width = <2>;
211 pm8998-rpmh-regulators {
212 compatible = "qcom,pm8998-rpmh-regulators";
215 vdd-s1-supply = <&src_vph_pwr>;
216 vdd-s2-supply = <&src_vph_pwr>;
217 vdd-s3-supply = <&src_vph_pwr>;
218 vdd-s4-supply = <&src_vph_pwr>;
219 vdd-s5-supply = <&src_vph_pwr>;
220 vdd-s6-supply = <&src_vph_pwr>;
221 vdd-s7-supply = <&src_vph_pwr>;
222 vdd-s8-supply = <&src_vph_pwr>;
223 vdd-s9-supply = <&src_vph_pwr>;
224 vdd-s10-supply = <&src_vph_pwr>;
225 vdd-s11-supply = <&src_vph_pwr>;
226 vdd-s12-supply = <&src_vph_pwr>;
227 vdd-s13-supply = <&src_vph_pwr>;
228 vdd-l1-l27-supply = <&src_pp1025_s7a>;
229 vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
230 vdd-l3-l11-supply = <&src_pp1025_s7a>;
231 vdd-l4-l5-supply = <&src_pp1025_s7a>;
232 vdd-l6-supply = <&src_vph_pwr>;
233 vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
234 vdd-l9-supply = <&src_pp2040_s5a>;
235 vdd-l10-l23-l25-supply = <&src_vreg_bob>;
236 vdd-l13-l19-l21-supply = <&src_vreg_bob>;
237 vdd-l16-l28-supply = <&src_vreg_bob>;
238 vdd-l18-l22-supply = <&src_vreg_bob>;
239 vdd-l20-l24-supply = <&src_vreg_bob>;
240 vdd-l26-supply = <&src_pp1350_s3a>;
241 vin-lvs-1-2-supply = <&src_pp1800_s4a>;
243 src_pp1125_s2a: smps2 {
244 regulator-min-microvolt = <1100000>;
245 regulator-max-microvolt = <1100000>;
248 src_pp1350_s3a: smps3 {
249 regulator-min-microvolt = <1352000>;
250 regulator-max-microvolt = <1352000>;
253 src_pp2040_s5a: smps5 {
254 regulator-min-microvolt = <1904000>;
255 regulator-max-microvolt = <2040000>;
258 src_pp1025_s7a: smps7 {
259 regulator-min-microvolt = <900000>;
260 regulator-max-microvolt = <1028000>;
281 src_pp875_l1a: ldo1 {
282 regulator-min-microvolt = <880000>;
283 regulator-max-microvolt = <880000>;
284 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
288 src_pp1200_l2a: ldo2 {
289 regulator-min-microvolt = <1200000>;
290 regulator-max-microvolt = <1200000>;
291 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
297 pp1000_l3a_sdr845: ldo3 {
298 regulator-min-microvolt = <1000000>;
299 regulator-max-microvolt = <1000000>;
300 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
306 src_pp800_l5a: ldo5 {
307 regulator-min-microvolt = <800000>;
308 regulator-max-microvolt = <800000>;
309 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
313 src_pp1800_l6a: ldo6 {
314 regulator-min-microvolt = <1856000>;
315 regulator-max-microvolt = <1856000>;
316 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
319 pp1800_l7a_wcn3990: ldo7 {
320 regulator-min-microvolt = <1800000>;
321 regulator-max-microvolt = <1800000>;
322 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
325 src_pp1200_l8a: ldo8 {
326 regulator-min-microvolt = <1200000>;
327 regulator-max-microvolt = <1248000>;
328 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332 src_pp1800_l9a: ldo9 {
333 regulator-min-microvolt = <1800000>;
334 regulator-max-microvolt = <1800000>;
335 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
338 src_pp1800_l10a: ldo10 {
339 regulator-min-microvolt = <1800000>;
340 regulator-max-microvolt = <1800000>;
341 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
344 pp1000_l11a_sdr845: ldo11 {
345 regulator-min-microvolt = <1000000>;
346 regulator-max-microvolt = <1048000>;
347 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
357 src_pp1800_l12a: ldo12 {
358 regulator-min-microvolt = <1800000>;
359 regulator-max-microvolt = <1800000>;
360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
364 src_pp2950_l13a: ldo13 {
365 regulator-min-microvolt = <1800000>;
366 regulator-max-microvolt = <2960000>;
367 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
370 src_pp1800_l14a: ldo14 {
371 regulator-min-microvolt = <1800000>;
372 regulator-max-microvolt = <1800000>;
373 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
376 src_pp1800_l15a: ldo15 {
377 regulator-min-microvolt = <1800000>;
378 regulator-max-microvolt = <1800000>;
379 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
383 regulator-min-microvolt = <2704000>;
384 regulator-max-microvolt = <2704000>;
385 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
388 src_pp1300_l17a: ldo17 {
389 regulator-min-microvolt = <1304000>;
390 regulator-max-microvolt = <1304000>;
391 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
395 regulator-min-microvolt = <2704000>;
396 regulator-max-microvolt = <2960000>;
397 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
401 * NOTE: this rail should have been called
402 * src_pp3300_l19a in the schematic
404 src_pp3000_l19a: ldo19 {
405 regulator-min-microvolt = <3304000>;
406 regulator-max-microvolt = <3304000>;
408 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
411 src_pp2950_l20a: ldo20 {
412 regulator-min-microvolt = <2704000>;
413 regulator-max-microvolt = <2960000>;
414 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
417 src_pp2950_l21a: ldo21 {
418 regulator-min-microvolt = <2704000>;
419 regulator-max-microvolt = <2960000>;
420 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
424 src_pp3300_l22a: ldo22 {
425 regulator-min-microvolt = <3304000>;
426 regulator-max-microvolt = <3304000>;
427 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
429 * HACK: Should add a usb hub node and driver
430 * to turn this on and off at suspend/resume time
436 pp3300_l23a_ch1_wcn3990: ldo23 {
437 regulator-min-microvolt = <3000000>;
438 regulator-max-microvolt = <3312000>;
439 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
443 src_pp3075_l24a: ldo24 {
444 regulator-min-microvolt = <3088000>;
445 regulator-max-microvolt = <3088000>;
446 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
449 pp3300_l25a_ch0_wcn3990: ldo25 {
450 regulator-min-microvolt = <3304000>;
451 regulator-max-microvolt = <3304000>;
452 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
469 src_pp1200_l26a: ldo26 {
470 regulator-min-microvolt = <1200000>;
471 regulator-max-microvolt = <1200000>;
472 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
476 src_pp3300_l28a: ldo28 {
477 regulator-min-microvolt = <3304000>;
478 regulator-max-microvolt = <3304000>;
479 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
482 src_pp1800_lvs1: lvs1 {
483 regulator-min-microvolt = <1800000>;
484 regulator-max-microvolt = <1800000>;
487 src_pp1800_lvs2: lvs2 {
488 regulator-min-microvolt = <1800000>;
489 regulator-max-microvolt = <1800000>;
493 pm8005-rpmh-regulators {
494 compatible = "qcom,pm8005-rpmh-regulators";
497 vdd-s1-supply = <&src_vph_pwr>;
498 vdd-s2-supply = <&src_vph_pwr>;
499 vdd-s3-supply = <&src_vph_pwr>;
500 vdd-s4-supply = <&src_vph_pwr>;
502 src_pp600_s3c: smps3 {
503 regulator-min-microvolt = <600000>;
504 regulator-max-microvolt = <600000>;
511 vdda-supply = <&vdda_mipi_dsi0_1p2>;
516 remote-endpoint = <&sn65dsi86_in>;
517 data-lanes = <0 1 2 3>;
525 vdds-supply = <&vdda_mipi_dsi0_pll>;
528 edp_brij_i2c: &i2c3 {
530 clock-frequency = <400000>;
532 sn65dsi86_bridge: bridge@2d {
533 compatible = "ti,sn65dsi86";
535 pinctrl-names = "default";
536 pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
538 interrupt-parent = <&tlmm>;
539 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
541 enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
543 vpll-supply = <&src_pp1800_s4a>;
544 vccio-supply = <&src_pp1800_s4a>;
545 vcca-supply = <&src_pp1200_l2a>;
546 vcc-supply = <&src_pp1200_l2a>;
548 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
549 clock-names = "refclk";
554 #address-cells = <1>;
559 sn65dsi86_in: endpoint {
560 remote-endpoint = <&dsi0_out>;
566 sn65dsi86_out: endpoint {
567 remote-endpoint = <&panel_in_edp>;
576 clock-frequency = <400000>;
579 compatible = "wacom,w9013", "hid-over-i2c";
581 pinctrl-names = "default";
582 pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
584 vdd-supply = <&pp3300_dx_pen>;
585 vddl-supply = <&pp1800_dx_pen>;
586 post-power-on-delay-ms = <100>;
588 interrupt-parent = <&tlmm>;
589 interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
591 hid-descr-addr = <0x1>;
597 clock-frequency = <400000>;
602 clock-frequency = <400000>;
605 compatible = "elan,ekth3500";
607 pinctrl-names = "default";
608 pinctrl-0 = <&ts_int_l &ts_reset_l>;
610 interrupt-parent = <&tlmm>;
611 interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
613 vcc33-supply = <&src_pp3300_l28a>;
615 reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
637 * Cheza fw does not properly program the GPU aperture to allow the
638 * GPU to update the SMMU pagetables for context switches. Work
639 * around this by dropping the "qcom,adreno-smmu" compat string.
642 compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
646 iommus = <&apps_smmu 0x781 0x0>,
647 <&apps_smmu 0x724 0x3>;
656 iommus = <&apps_smmu 0x0 0x3>;
661 iommus = <&apps_smmu 0x6c0 0x3>;
667 pinctrl-names = "default";
668 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
670 vmmc-supply = <&src_pp2950_l21a>;
671 vqmmc-supply = <&vddpx_2>;
673 cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
684 compatible = "google,cr50";
686 pinctrl-names = "default";
687 pinctrl-0 = <&h1_ap_int_odl>;
688 spi-max-frequency = <800000>;
689 interrupt-parent = <&tlmm>;
690 interrupts = <129 IRQ_TYPE_EDGE_RISING>;
698 compatible = "google,cros-ec-spi";
700 interrupt-parent = <&tlmm>;
701 interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
702 pinctrl-names = "default";
703 pinctrl-0 = <&ec_ap_int_l>;
704 spi-max-frequency = <3000000>;
706 cros_ec_pwm: ec-pwm {
707 compatible = "google,cros-ec-pwm";
711 i2c_tunnel: i2c-tunnel {
712 compatible = "google,cros-ec-i2c-tunnel";
713 google,remote-bus = <0>;
714 #address-cells = <1>;
720 #include <arm/cros-ec-keyboard.dtsi>
721 #include <arm/cros-ec-sbs.dtsi>
726 bluetooth: wcn3990-bt {
727 compatible = "qcom,wcn3990-bt";
728 vddio-supply = <&src_pp1800_s4a>;
729 vddxo-supply = <&pp1800_l7a_wcn3990>;
730 vddrf-supply = <&src_pp1300_l17a>;
731 vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
732 max-speed = <3200000>;
743 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
745 vcc-supply = <&src_pp2950_l20a>;
746 vcc-max-microamp = <600000>;
752 vdda-phy-supply = <&vdda_ufs1_core>;
753 vdda-pll-supply = <&vdda_ufs1_1p2>;
759 /* We'll use this as USB 2.0 only */
760 qcom,select-utmi-as-pipe-clk;
765 * The hardware design intends this port to be hooked up in peripheral
766 * mode, so we'll hardcode it here. Some details:
767 * - SDM845 expects only a single Type C connector so it has only one
768 * native Type C port but cheza has two Type C connectors.
769 * - The only source of DP is the single native Type C port.
770 * - On cheza we want to be able to hook DP up to _either_ of the
771 * two Type C connectors and want to be able to achieve 4 lanes of DP.
772 * - When you configure a Type C port for 4 lanes of DP you lose USB3.
773 * - In order to make everything work, the native Type C port is always
774 * configured as 4-lanes DP so it's always available.
775 * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
776 * sent to the two Type C connectors.
777 * - The extra USB2 lines from the native Type C port are always
778 * setup as "peripheral" so that we can mux them over to one connector
779 * or the other if someone needs the connector configured as a gadget
780 * (but they only get USB2 speeds).
782 * All the hardware muxes would allow us to hook things up in different
783 * ways to some potential benefit for static configurations (you could
784 * achieve extra USB2 bandwidth by using two different ports for the
785 * two connectors or possibly even get USB3 peripheral mode), but in
786 * each case you end up forcing to disconnect/reconnect an in-use
787 * USB session in some cases depending on what you hotplug into the
788 * other connector. Thus hardcoding this as peripheral makes sense.
790 dr_mode = "peripheral";
793 * We always need the high speed pins as 4-lanes DP in case someone
794 * hotplugs a DP peripheral. Thus limit this port to a max of high
797 maximum-speed = "high-speed";
800 * We don't need the usb3-phy since we run in highspeed mode always, so
801 * re-define these properties removing the superspeed USB PHY reference.
803 phys = <&usb_1_hsphy>;
804 phy-names = "usb2-phy";
810 vdd-supply = <&vdda_usb1_ss_core>;
811 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
812 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
814 qcom,imp-res-offset-value = <8>;
815 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
816 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
817 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
825 /* We have this hooked up to a hub and we always use in host mode */
832 vdd-supply = <&vdda_usb2_ss_core>;
833 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
834 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
836 qcom,imp-res-offset-value = <8>;
837 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
843 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
844 vdda-pll-supply = <&vdda_usb2_ss_core>;
850 vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
851 vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
852 vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
853 vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
856 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
874 pins = "gpio91", "gpio92";
876 /* High-Z when no transfers; nice to park the lines */
883 pins = "gpio41", "gpio42";
884 drive-strength = <2>;
886 /* Has external pullup */
893 pins = "gpio31", "gpio32";
894 drive-strength = <2>;
896 /* Has external pullup */
903 pins = "gpio49", "gpio50";
904 drive-strength = <2>;
906 /* Has external pullup */
913 pins = "gpio33", "gpio34";
914 drive-strength = <2>;
916 /* Has external pullup */
923 pins = "gpio0", "gpio1", "gpio2", "gpio3";
924 drive-strength = <2>;
931 pins = "gpio85", "gpio86", "gpio87", "gpio88";
932 drive-strength = <2>;
939 pins = "gpio53", "gpio54", "gpio55", "gpio56";
940 drive-strength = <2>;
946 /* Change pinmux to all 4 pins since CTS and RTS are connected */
948 pins = "gpio45", "gpio46",
954 * Configure a pull-down on 45 (CTS) to match the pull of
955 * the Bluetooth module.
962 /* We'll drive 46 (RTS) and 47 (TX), so no pull */
963 pins = "gpio46", "gpio47";
964 drive-strength = <2>;
970 * Configure a pull-up on 48 (RX). This is needed to avoid
971 * garbage data when the TX pin of the Bluetooth module is
972 * in tri-state (module powered off or not driving the
983 drive-strength = <2>;
989 drive-strength = <2>;
994 /* PINCTRL - board-specific pinctrl */
996 gpio-line-names = "",
1004 reg = <ADC5_AMUX_THM1_100K_PU>;
1009 reg = <ADC5_AMUX_THM2_100K_PU>;
1010 label = "quiet_temp";
1014 reg = <ADC5_AMUX_THM3_100K_PU>;
1015 label = "lte_temp_1";
1019 reg = <ADC5_AMUX_THM4_100K_PU>;
1020 label = "lte_temp_2";
1024 reg = <ADC5_AMUX_THM5_100K_PU>;
1025 label = "charger_temp";
1030 gpio-line-names = "",
1060 * pinctrl settings for pins that have no real owners.
1062 pinctrl-names = "default", "sleep";
1063 pinctrl-0 = <&bios_flash_wp_r_l>,
1064 <&ap_suspend_l_deassert>;
1066 pinctrl-1 = <&bios_flash_wp_r_l>,
1067 <&ap_suspend_l_assert>;
1070 * Hogs prevent usermode from changing the value. A GPIO can be both
1071 * here and in the pinctrl section.
1075 gpios = <126 GPIO_ACTIVE_LOW>;
1079 ap_edp_bklten: ap-edp-bklten {
1087 drive-strength = <2>;
1092 bios_flash_wp_r_l: bios-flash-wp-r-l {
1105 ec_ap_int_l: ec-ap-int-l {
1118 edp_brij_en: edp-brij-en {
1126 drive-strength = <2>;
1131 edp_brij_irq: edp-brij-irq {
1139 drive-strength = <2>;
1144 en_pp3300_dx_edp: en-pp3300-dx-edp {
1152 drive-strength = <2>;
1157 h1_ap_int_odl: h1-ap-int-odl {
1170 pen_eject_odl: pen-eject-odl {
1178 pen_irq_l: pen-irq-l {
1187 /* Has external pullup */
1192 pen_pdct_l: pen-pdct-l {
1201 /* Has external pullup */
1206 pen_rst_l: pen-rst-l {
1215 drive-strength = <2>;
1218 * The pen driver doesn't currently support
1219 * driving this reset line. By specifying
1220 * output-high here we're relying on the fact
1221 * that this pin has a default pulldown at boot
1222 * (which makes sure the pen was in reset if it
1223 * was powered) and then we set it high here to
1224 * take it out of reset. Better would be if the
1225 * pen driver could control this and we could
1226 * remove "output-high" here.
1232 sdc2_clk: sdc2-clk {
1238 * It seems that mmc_test reports errors if drive
1239 * strength is not 16.
1241 drive-strength = <16>;
1245 sdc2_cmd: sdc2-cmd {
1249 drive-strength = <16>;
1253 sdc2_data: sdc2-data {
1257 drive-strength = <16>;
1261 sd_cd_odl: sd-cd-odl {
1273 ts_int_l: ts-int-l {
1285 ts_reset_l: ts-reset-l {
1294 drive-strength = <2>;
1298 ap_suspend_l_assert: ap_suspend_l_assert {
1303 drive-strength = <2>;
1308 ap_suspend_l_deassert: ap_suspend_l_deassert {
1313 drive-strength = <2>;
1321 iommus = <&apps_smmu 0x10b2 0x0>;