1 // SPDX-License-Identifier: BSD-3-Clause
3 * Common Board Device Tree for
4 * Microsoft Mobile MSM8994 Octagon Platforms
6 * Copyright (c) 2020, Konrad Dybcio
7 * Copyright (c) 2020, Gustave Monce <gustave.monce@outlook.com>
10 #include "pm8994.dtsi"
11 #include "pmi8994.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/gpio-keys.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 * Delete all generic (msm8994.dtsi) reserved
18 * memory mappings which are different in this device.
20 /delete-node/ &adsp_mem;
21 /delete-node/ &audio_mem;
22 /delete-node/ &cont_splash_mem;
23 /delete-node/ &mba_mem;
24 /delete-node/ &mpss_mem;
25 /delete-node/ &peripheral_region;
26 /delete-node/ &rmtfs_mem;
27 /delete-node/ &smem_mem;
31 * Most Lumia 950/XL users use GRUB to load their kernels,
32 * hence there is no need for msm-id and friends.
36 * This enables graphical output via bootloader-enabled display.
37 * acpi=no is required due to WP platforms having ACPI support, but
38 * only for Windows-based OSes.
41 bootargs = "earlycon=efifb console=efifb acpi=no";
49 compatible = "simple-bus";
52 compatible = "fixed-clock";
55 clock-frequency = <32768>;
56 clock-output-names = "divclk4";
58 pinctrl-names = "default";
59 pinctrl-0 = <&divclk4_pin_a>;
64 compatible = "gpio-keys";
65 input-name = "gpio-keys";
70 gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>;
71 linux,input-type = <1>;
72 linux,code = <KEY_VOLUMEUP>;
74 debounce-interval = <15>;
78 label = "Camera Snapshot";
79 gpios = <&pm8994_gpios 4 GPIO_ACTIVE_LOW>;
80 linux,input-type = <1>;
81 linux,code = <KEY_CAMERA>;
83 debounce-interval = <15>;
87 label = "Camera Focus";
88 gpios = <&pm8994_gpios 5 GPIO_ACTIVE_LOW>;
89 linux,input-type = <1>;
90 linux,code = <KEY_VOLUMEUP>;
92 debounce-interval = <15>;
97 compatible = "gpio-keys";
99 pinctrl-names = "default";
100 pinctrl-0 = <&hall_front_default &hall_back_default>;
102 label = "GPIO Hall Effect Sensor";
105 label = "Hall Effect Front Sensor";
106 gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
107 linux,input-type = <EV_SW>;
108 linux,code = <SW_LID>;
113 label = "Hall Effect Back Sensor";
114 gpios = <&tlmm 75 GPIO_ACTIVE_HIGH>;
115 linux,input-type = <EV_SW>;
116 linux,code = <SW_MACHINE_COVER>;
123 * This device being a WP platform has a very different
124 * memory layout than other Android based devices.
125 * This memory layout is directly copied from the original
126 * device UEFI firmware, and adapted based on observations
127 * using JTAG for the Qualcomm Peripheral Image regions.
130 uefi_mem: memory@200000 {
131 reg = <0 0x200000 0 0x100000>;
135 mppark_mem: memory@300000 {
136 reg = <0 0x300000 0 0x80000>;
140 fbpt_mem: memory@380000 {
141 reg = <0 0x380000 0 0x1000>;
145 dbg2_mem: memory@381000 {
146 reg = <0 0x381000 0 0x4000>;
150 capsule_mem: memory@385000 {
151 reg = <0 0x385000 0 0x1000>;
155 tpmctrl_mem: memory@386000 {
156 reg = <0 0x386000 0 0x3000>;
160 uefiinfo_mem: memory@389000 {
161 reg = <0 0x389000 0 0x1000>;
165 reset_mem: memory@389000 {
166 reg = <0 0x389000 0 0x1000>;
170 resuncached_mem: memory@38e000 {
171 reg = <0 0x38e000 0 0x72000>;
175 disp_mem: memory@400000 {
176 reg = <0 0x400000 0 0x800000>;
180 uefistack_mem: memory@c00000 {
181 reg = <0 0xc00000 0 0x40000>;
185 cpuvect_mem: memory@c40000 {
186 reg = <0 0xc40000 0 0x10000>;
190 rescached_mem: memory@400000 {
191 reg = <0 0xc50000 0 0xb0000>;
195 tzapps_mem: memory@6500000 {
196 reg = <0 0x6500000 0 0x500000>;
200 smem_mem: memory@6a00000 {
201 reg = <0 0x6a00000 0 0x200000>;
205 hyp_mem: memory@6c00000 {
206 reg = <0 0x6c00000 0 0x100000>;
210 tz_mem: memory@6d00000 {
211 reg = <0 0x6d00000 0 0x160000>;
215 rfsa_adsp_mem: memory@6e60000 {
216 reg = <0 0x6e60000 0 0x10000>;
220 rfsa_mpss_mem: memory@6e70000 {
221 compatible = "qcom,rmtfs-mem";
222 reg = <0 0x6e70000 0 0x10000>;
225 qcom,client-id = <1>;
229 * Value obtained from the device original ACPI DSDT table
232 mba_mem: memory@6e80000 {
233 reg = <0 0x6e80000 0 0x180000>;
238 * Peripheral Image loader region begin!
239 * The region reserved for pil is 0x7000000-0xef00000
242 mpss_mem: memory@7000000 {
243 reg = <0 0x7000000 0 0x5a00000>;
247 adsp_mem: memory@ca00000 {
248 reg = <0 0xca00000 0 0x1800000>;
252 venus_mem: memory@e200000 {
253 reg = <0 0xe200000 0 0x500000>;
257 pil_metadata_mem: memory@e700000 {
258 reg = <0 0xe700000 0 0x4000>;
263 reg = <0 0xe704000 0 0x7fc000>;
266 /* Peripheral Image loader region end */
268 cnss_mem: memory@ef00000 {
269 reg = <0 0xef00000 0 0x300000>;
279 compatible = "syna,rmi4-i2c";
281 #address-cells = <1>;
284 interrupt-parent = <&tlmm>;
285 interrupts = <77 IRQ_TYPE_EDGE_FALLING>;
289 syna,nosleep-mode = <1>;
294 syna,sensor-type = <1>;
295 syna,clip-x-low = <0>;
296 syna,clip-x-high = <1440>;
297 syna,clip-y-low = <0>;
298 syna,clip-y-high = <2560>;
307 * This device uses the Texas Instruments TAS2553, however the TAS2552 driver
308 * seems to work here. In the future a proper driver might need to
309 * be written for this device.
311 tas2553: tas2553@40 {
312 compatible = "ti,tas2552";
315 vbat-supply = <&vph_pwr>;
316 iovdd-supply = <&vreg_s4a_1p8>;
317 avdd-supply = <&vreg_s4a_1p8>;
319 enable-gpio = <&pm8994_gpios 12 GPIO_ACTIVE_HIGH>;
326 ak09912: magnetometer@c {
327 compatible = "asahi-kasei,ak09912";
330 interrupt-parent = <&tlmm>;
331 interrupts = <26 IRQ_TYPE_EDGE_RISING>;
333 vdd-supply = <&vreg_l18a_2p85>;
334 vid-supply = <&vreg_lvs2a_1p8>;
337 zpa2326: barometer@5c {
338 compatible = "murata,zpa2326";
341 interrupt-parent = <&tlmm>;
342 interrupts = <74 IRQ_TYPE_EDGE_RISING>;
344 vdd-supply = <&vreg_lvs2a_1p8>;
347 mpu6050: accelerometer@68 {
348 compatible = "invensense,mpu6500";
351 interrupt-parent = <&tlmm>;
352 interrupts = <64 IRQ_TYPE_EDGE_RISING>;
354 vdd-supply = <&vreg_lvs2a_1p8>;
355 vddio-supply = <&vreg_lvs2a_1p8>;
363 compatible = "nxp,pn544-i2c";
367 interrupt-parent = <&tlmm>;
368 interrupts = <29 IRQ_TYPE_EDGE_RISING>;
370 enable-gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
371 firmware-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>;
382 sideinteraction: ad7147_captouch@2c {
383 compatible = "ad,ad7147_captouch";
386 pinctrl-names = "default", "sleep";
387 pinctrl-0 = <&grip_default>;
388 pinctrl-1 = <&grip_sleep>;
390 interrupts = <&tlmm 96 IRQ_TYPE_EDGE_FALLING>;
397 vcc-supply = <&vreg_l18a_2p85>;
401 * The QPDS-T900/QPDS-T930 is a customized part built for Nokia
402 * by Avago. It is very similar to the Avago APDS-9930 with some
403 * minor differences. In the future a proper driver might need to
404 * be written for this device. For now this works fine.
406 qpdst900: qpdst900@39 {
407 compatible = "avago,apds9930";
410 interrupt-parent = <&tlmm>;
411 interrupts = <40 IRQ_TYPE_EDGE_FALLING>;
418 fm_radio: si4705@11 {
419 compatible = "silabs,si470x";
422 interrupt-parent = <&tlmm>;
423 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
424 reset-gpios = <&tlmm 93 GPIO_ACTIVE_HIGH>;
427 vreg_lpddr_1p1: fan53526a@6c {
428 compatible = "fcs,fan53526";
431 regulator-min-microvolt = <1100000>;
432 regulator-max-microvolt = <1100000>;
433 vin-supply = <&vph_pwr>;
434 fcs,suspend-voltage-selector = <1>;
435 regulator-always-on; /* Turning off DDR power doesn't sound good. */
438 /* ANX7816 HDMI bridge (needs MDSS HDMI) */
445 * This device is a Lattice UC120 USB-C PD PHY.
446 * It is actually a Lattice iCE40 FPGA pre-programmed by
447 * the device firmware with a specific bitstream
448 * enabling USB Type C PHY functionality.
449 * Communication is done via a proprietary protocol over SPI.
451 * TODO: Once a proper driver is available, replace this.
454 compatible = "lattice,ice40-fpga-mgr";
456 spi-max-frequency = <5000000>;
457 cdone-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
458 reset-gpios = <&pmi8994_gpios 4 GPIO_ACTIVE_LOW>;
465 qca6174_bt: bluetooth {
466 compatible = "qcom,qca6174-bt";
468 enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>;
474 bt_en_gpios: bt_en_gpios {
477 function = PMIC_GPIO_FUNC_NORMAL;
479 power-source = <PM8994_GPIO_S4>;
480 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
485 divclk4_pin_a: divclk4 {
488 function = PMIC_GPIO_FUNC_FUNC2;
489 power-source = <PM8994_GPIO_S4>;
497 compatible = "qcom,pm8941-pwrkey";
498 interrupts = <0 8 0 IRQ_TYPE_EDGE_BOTH>;
500 linux,code = <KEY_POWER>;
504 compatible = "qcom,pm8941-resin";
505 interrupts = <0 8 1 IRQ_TYPE_EDGE_BOTH>;
507 linux,code = <KEY_VOLUMEDOWN>;
512 pinctrl-0 = <&hd3ss460_pol &hd3ss460_amsel &hd3ss460_en>;
513 pinctrl-names = "default";
516 * This device uses a TI HD3SS460 Type-C MUX
517 * As this device has no driver currently,
518 * the configuration for USB Face Up is set-up here.
520 * TODO: remove once a driver is available
521 * TODO: add VBUS GPIO 5
523 hd3ss460_pol: pol_low {
525 drive-strength = <3>;
529 hd3ss460_amsel: amsel_high {
531 drive-strength = <1>;
535 hd3ss460_en: en_high {
537 drive-strength = <1>;
542 &pmi8994_spmi_regulators {
544 reg = <0x1700 0x100>;
545 regulator-min-microvolt = <980000>;
546 regulator-max-microvolt = <980000>;
551 /* These values were taken from the original firmware ACPI tables */
552 pm8994_regulators: pm8994-regulators {
553 compatible = "qcom,rpm-pm8994-regulators";
555 vdd_s1-supply = <&vph_pwr>;
556 vdd_s2-supply = <&vph_pwr>;
557 vdd_s3-supply = <&vph_pwr>;
558 vdd_s4-supply = <&vph_pwr>;
559 vdd_s5-supply = <&vph_pwr>;
560 vdd_s6-supply = <&vph_pwr>;
561 vdd_s7-supply = <&vph_pwr>;
562 vdd_s8-supply = <&vph_pwr>;
563 vdd_s9-supply = <&vph_pwr>;
564 vdd_s10-supply = <&vph_pwr>;
565 vdd_s11-supply = <&vph_pwr>;
566 vdd_s12-supply = <&vph_pwr>;
567 vdd_l1-supply = <&vreg_s1b_1p0>;
568 vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>;
569 vdd_l3_l11-supply = <&vreg_s3a_1p3>;
570 vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>;
571 vdd_l5_l7-supply = <&vreg_s5a_2p15>;
572 vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>;
573 vdd_l8_l16_l30-supply = <&vph_pwr>;
574 vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>;
575 vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>;
576 vdd_l14_l15-supply = <&vreg_s5a_2p15>;
577 vdd_l17_l29-supply = <&vph_pwr_bbyp>;
578 vdd_l20_l21-supply = <&vph_pwr_bbyp>;
579 vdd_l25-supply = <&vreg_s5a_2p15>;
580 vdd_lvs1_2-supply = <&vreg_s4a_1p8>;
582 /* S1, S2, S6 and S12 are managed by RPMPD */
585 regulator-min-microvolt = <1300000>;
586 regulator-max-microvolt = <1300000>;
587 regulator-allow-set-load;
588 regulator-system-load = <300000>;
592 regulator-min-microvolt = <1800000>;
593 regulator-max-microvolt = <1800000>;
594 regulator-allow-set-load;
596 regulator-system-load = <325000>;
600 regulator-min-microvolt = <2150000>;
601 regulator-max-microvolt = <2150000>;
602 regulator-allow-set-load;
603 regulator-system-load = <325000>;
607 regulator-min-microvolt = <1000000>;
608 regulator-max-microvolt = <1000000>;
612 * S8 - SPMI-managed VDD_APC0
613 * S9, S10 and S11 (the main one) - SPMI-managed VDD_APC1
617 regulator-min-microvolt = <1000000>;
618 regulator-max-microvolt = <1000000>;
622 regulator-min-microvolt = <1250000>;
623 regulator-max-microvolt = <1250000>;
624 regulator-allow-set-load;
625 regulator-system-load = <4160>;
629 regulator-min-microvolt = <1200000>;
630 regulator-max-microvolt = <1200000>;
632 regulator-allow-set-load;
633 regulator-system-load = <80000>;
637 regulator-min-microvolt = <1225000>;
638 regulator-max-microvolt = <1225000>;
641 /* L5 is inaccessible from RPM */
644 regulator-min-microvolt = <1800000>;
645 regulator-max-microvolt = <1800000>;
646 regulator-allow-set-load;
647 regulator-system-load = <1000>;
650 /* L7 is inaccessible from RPM */
653 regulator-min-microvolt = <1800000>;
654 regulator-max-microvolt = <1800000>;
658 regulator-min-microvolt = <1800000>;
659 regulator-max-microvolt = <1800000>;
663 regulator-min-microvolt = <1800000>;
664 regulator-max-microvolt = <1800000>;
668 regulator-min-microvolt = <1200000>;
669 regulator-max-microvolt = <1200000>;
671 regulator-allow-set-load;
672 regulator-system-load = <35000>;
676 regulator-min-microvolt = <1800000>;
677 regulator-max-microvolt = <1800000>;
679 regulator-allow-set-load;
680 regulator-system-load = <50000>;
683 vreg_l13a_2p95: l13 {
684 regulator-min-microvolt = <1850000>;
685 regulator-max-microvolt = <2950000>;
687 regulator-allow-set-load;
688 regulator-system-load = <22000>;
692 regulator-min-microvolt = <1800000>;
693 regulator-max-microvolt = <1800000>;
695 regulator-allow-set-load;
696 regulator-system-load = <52000>;
700 regulator-min-microvolt = <1800000>;
701 regulator-max-microvolt = <1800000>;
705 regulator-min-microvolt = <2700000>;
706 regulator-max-microvolt = <2700000>;
710 regulator-min-microvolt = <2800000>;
711 regulator-max-microvolt = <2800000>;
713 regulator-allow-set-load;
714 regulator-system-load = <300000>;
717 vreg_l18a_2p85: l18 {
718 regulator-min-microvolt = <2850000>;
719 regulator-max-microvolt = <2850000>;
721 regulator-allow-set-load;
722 regulator-system-load = <600000>;
726 regulator-min-microvolt = <3300000>;
727 regulator-max-microvolt = <3300000>;
729 regulator-allow-set-load;
730 regulator-system-load = <500000>;
733 vreg_l20a_2p95: l20 {
734 regulator-min-microvolt = <2950000>;
735 regulator-max-microvolt = <2950000>;
738 regulator-allow-set-load;
739 regulator-system-load = <570000>;
742 vreg_l21a_2p95: l21 {
743 regulator-min-microvolt = <2950000>;
744 regulator-max-microvolt = <2950000>;
746 regulator-allow-set-load;
747 regulator-system-load = <800000>;
751 regulator-min-microvolt = <3000000>;
752 regulator-max-microvolt = <3000000>;
754 regulator-allow-set-load;
755 regulator-system-load = <150000>;
759 regulator-min-microvolt = <2850000>;
760 regulator-max-microvolt = <2850000>;
762 regulator-allow-set-load;
763 regulator-system-load = <80000>;
766 vreg_l24a_3p075: l24 {
767 regulator-min-microvolt = <3075000>;
768 regulator-max-microvolt = <3150000>;
769 regulator-allow-set-load;
770 regulator-system-load = <5800>;
774 regulator-min-microvolt = <1150000>;
775 regulator-max-microvolt = <1150000>;
777 regulator-allow-set-load;
778 regulator-system-load = <80000>;
782 regulator-min-microvolt = <1000000>;
783 regulator-max-microvolt = <1000000>;
786 vreg_l27a_1p05: l27 {
787 regulator-min-microvolt = <1000000>;
788 regulator-max-microvolt = <1000000>;
790 regulator-allow-set-load;
791 regulator-system-load = <500000>;
795 regulator-min-microvolt = <1000000>;
796 regulator-max-microvolt = <1000000>;
798 regulator-allow-set-load;
799 regulator-system-load = <26000>;
803 regulator-min-microvolt = <2850000>;
804 regulator-max-microvolt = <2850000>;
806 regulator-allow-set-load;
807 regulator-system-load = <80000>;
811 regulator-min-microvolt = <1800000>;
812 regulator-max-microvolt = <1800000>;
814 regulator-allow-set-load;
815 regulator-system-load = <2500>;
819 regulator-min-microvolt = <1200000>;
820 regulator-max-microvolt = <1200000>;
822 regulator-allow-set-load;
823 regulator-system-load = <600000>;
827 regulator-min-microvolt = <1800000>;
828 regulator-max-microvolt = <1800000>;
831 vreg_lvs1a_1p8: lvs1 { };
833 vreg_lvs2a_1p8: lvs2 { };
836 pmi8994_regulators: pmi8994-regulators {
837 compatible = "qcom,rpm-pmi8994-regulators";
839 vdd_s1-supply = <&vph_pwr>;
840 vdd_bst_byp-supply = <&vph_pwr>;
843 regulator-min-microvolt = <1025000>;
844 regulator-max-microvolt = <1025000>;
847 /* S2 & S3 - VDD_GFX */
849 vph_pwr_bbyp: boost-bypass {
850 regulator-min-microvolt = <3300000>;
851 regulator-max-microvolt = <3300000>;
860 * This device is shipped with HS400 capabable eMMCs
861 * However various brands have been used in various product batches,
862 * including a Samsung eMMC (BGND3R) which features a quirk with HS400.
863 * Set the speed to HS200 as a safety measure.
871 pinctrl-names = "default", "sleep";
872 pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
873 pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
875 vmmc-supply = <&vreg_l21a_2p95>;
876 vqmmc-supply = <&vreg_l13a_2p95>;
878 cd-gpios = <&pm8994_gpios 8 GPIO_ACTIVE_LOW>;
882 grip_default: grip-default {
885 drive-strength = <6>;
889 grip_sleep: grip-sleep {
892 drive-strength = <2>;
896 hall_front_default: hall-front-default {
899 drive-strength = <2>;
903 hall_back_default: hall-back-default {
906 drive-strength = <2>;