arch/arm64/boot/dts/mediatek/mt8195-demo.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Copyright (C) 2022 BayLibre, SAS.
   4  * Author: Fabien Parent <fparent@baylibre.com>
   5  */
   6 /dts-v1/;
   7
   8 #include "mt8195.dtsi"
   9 #include "mt6359.dtsi"
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/input/input.h>
  13 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
  14 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
  15
  16 / {
  17         model = "MediaTek MT8195 demo board";
  18         compatible = "mediatek,mt8195-demo", "mediatek,mt8195";
  19
  20         aliases {
  21                 serial0 = &uart0;
  22         };
  23
  24         chosen {
  25                 stdout-path = "serial0:921600n8";
  26         };
  27
  28         firmware {
  29                 optee {
  30                         compatible = "linaro,optee-tz";
  31                         method = "smc";
  32                 };
  33         };
  34
  35         gpio-keys {
  36                 compatible = "gpio-keys";
  37                 pinctrl-names = "default";
  38                 pinctrl-0 = <&gpio_keys_pins>;
  39
  40                 key-0 {
  41                         gpios = <&pio 106 GPIO_ACTIVE_LOW>;
  42                         label = "volume_up";
  43                         linux,code = <KEY_VOLUMEUP>;
  44                         wakeup-source;
  45                         debounce-interval = <15>;
  46                 };
  47         };
  48
  49         memory@40000000 {
  50                 device_type = "memory";
  51                 reg = <0 0x40000000 0 0x80000000>;
  52         };
  53
  54         reserved-memory {
  55                 #address-cells = <2>;
  56                 #size-cells = <2>;
  57                 ranges;
  58
  59                 /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
  60                 bl31_secmon_reserved: secmon@54600000 {
  61                         no-map;
  62                         reg = <0 0x54600000 0x0 0x30000>;
  63                 };
  64
  65                 /* 12 MiB reserved for OP-TEE (BL32)
  66                  * +-----------------------+ 0x43e0_0000
  67                  * |      SHMEM 2MiB       |
  68                  * +-----------------------+ 0x43c0_0000
  69                  * |        | TA_RAM  8MiB |
  70                  * + TZDRAM +--------------+ 0x4340_0000
  71                  * |        | TEE_RAM 2MiB |
  72                  * +-----------------------+ 0x4320_0000
  73                  */
  74                 optee_reserved: optee@43200000 {
  75                         no-map;
  76                         reg = <0 0x43200000 0 0x00c00000>;
  77                 };
  78         };
  79 };
  80
  81 &i2c6 {
  82         clock-frequency = <400000>;
  83         pinctrl-0 = <&i2c6_pins>;
  84         pinctrl-names = "default";
  85         status = "okay";
  86
  87         mt6360: pmic@34 {
  88                 compatible = "mediatek,mt6360";
  89                 reg = <0x34>;
  90                 interrupt-controller;
  91                 interrupts-extended = <&pio 101 IRQ_TYPE_EDGE_FALLING>;
  92                 interrupt-names = "IRQB";
  93
  94                 charger {
  95                         compatible = "mediatek,mt6360-chg";
  96                         richtek,vinovp-microvolt = <14500000>;
  97
  98                         otg_vbus_regulator: usb-otg-vbus-regulator {
  99                                 regulator-compatible = "usb-otg-vbus";
 100                                 regulator-name = "usb-otg-vbus";
 101                                 regulator-min-microvolt = <4425000>;
 102                                 regulator-max-microvolt = <5825000>;
 103                         };
 104                 };
 105
 106                 regulator {
 107                         compatible = "mediatek,mt6360-regulator";
 108                         LDO_VIN3-supply = <&mt6360_buck2>;
 109
 110                         mt6360_buck1: buck1 {
 111                                 regulator-compatible = "BUCK1";
 112                                 regulator-name = "mt6360,buck1";
 113                                 regulator-min-microvolt = <300000>;
 114                                 regulator-max-microvolt = <1300000>;
 115                                 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
 116                                                            MT6360_OPMODE_LP
 117                                                            MT6360_OPMODE_ULP>;
 118                                 regulator-always-on;
 119                         };
 120
 121                         mt6360_buck2: buck2 {
 122                                 regulator-compatible = "BUCK2";
 123                                 regulator-name = "mt6360,buck2";
 124                                 regulator-min-microvolt = <300000>;
 125                                 regulator-max-microvolt = <1300000>;
 126                                 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
 127                                                            MT6360_OPMODE_LP
 128                                                            MT6360_OPMODE_ULP>;
 129                                 regulator-always-on;
 130                         };
 131
 132                         mt6360_ldo1: ldo1 {
 133                                 regulator-compatible = "LDO1";
 134                                 regulator-name = "mt6360,ldo1";
 135                                 regulator-min-microvolt = <1200000>;
 136                                 regulator-max-microvolt = <3600000>;
 137                                 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
 138                                                            MT6360_OPMODE_LP>;
 139                         };
 140
 141                         mt6360_ldo2: ldo2 {
 142                                 regulator-compatible = "LDO2";
 143                                 regulator-name = "mt6360,ldo2";
 144                                 regulator-min-microvolt = <1200000>;
 145                                 regulator-max-microvolt = <3600000>;
 146                                 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
 147                                                            MT6360_OPMODE_LP>;
 148                         };
 149
 150                         mt6360_ldo3: ldo3 {
 151                                 regulator-compatible = "LDO3";
 152                                 regulator-name = "mt6360,ldo3";
 153                                 regulator-min-microvolt = <1200000>;
 154                                 regulator-max-microvolt = <3600000>;
 155                                 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
 156                                                            MT6360_OPMODE_LP>;
 157                         };
 158
 159                         mt6360_ldo5: ldo5 {
 160                                 regulator-compatible = "LDO5";
 161                                 regulator-name = "mt6360,ldo5";
 162                                 regulator-min-microvolt = <2700000>;
 163                                 regulator-max-microvolt = <3600000>;
 164                                 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
 165                                                            MT6360_OPMODE_LP>;
 166                         };
 167
 168                         mt6360_ldo6: ldo6 {
 169                                 regulator-compatible = "LDO6";
 170                                 regulator-name = "mt6360,ldo6";
 171                                 regulator-min-microvolt = <500000>;
 172                                 regulator-max-microvolt = <2100000>;
 173                                 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
 174                                                            MT6360_OPMODE_LP>;
 175                         };
 176
 177                         mt6360_ldo7: ldo7 {
 178                                 regulator-compatible = "LDO7";
 179                                 regulator-name = "mt6360,ldo7";
 180                                 regulator-min-microvolt = <500000>;
 181                                 regulator-max-microvolt = <2100000>;
 182                                 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
 183                                                            MT6360_OPMODE_LP>;
 184                                 regulator-always-on;
 185                         };
 186                 };
 187         };
 188 };
 189
 190 &mmc0 {
 191         status = "okay";
 192         pinctrl-names = "default", "state_uhs";
 193         pinctrl-0 = <&mmc0_default_pins>;
 194         pinctrl-1 = <&mmc0_uhs_pins>;
 195         bus-width = <8>;
 196         max-frequency = <200000000>;
 197         cap-mmc-highspeed;
 198         mmc-hs200-1_8v;
 199         mmc-hs400-1_8v;
 200         cap-mmc-hw-reset;
 201         no-sdio;
 202         no-sd;
 203         hs400-ds-delay = <0x14c11>;
 204         vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
 205         vqmmc-supply = <&mt6359_vufs_ldo_reg>;
 206         non-removable;
 207 };
 208
 209 &mmc1 {
 210         pinctrl-names = "default", "state_uhs";
 211         pinctrl-0 = <&mmc1_default_pins>;
 212         pinctrl-1 = <&mmc1_uhs_pins>;
 213         cd-gpios = <&pio 129 GPIO_ACTIVE_LOW>;
 214         bus-width = <4>;
 215         max-frequency = <200000000>;
 216         cap-sd-highspeed;
 217         sd-uhs-sdr50;
 218         sd-uhs-sdr104;
 219         vmmc-supply = <&mt6360_ldo5>;
 220         vqmmc-supply = <&mt6360_ldo3>;
 221         status = "okay";
 222 };
 223
 224 &mt6359_vbbck_ldo_reg {
 225         regulator-always-on;
 226 };
 227
 228 &mt6359_vcore_buck_reg {
 229         regulator-always-on;
 230 };
 231
 232 &mt6359_vgpu11_buck_reg {
 233         regulator-always-on;
 234 };
 235
 236 &mt6359_vproc1_buck_reg {
 237         regulator-always-on;
 238 };
 239
 240 &mt6359_vproc2_buck_reg {
 241         regulator-always-on;
 242 };
 243
 244 &mt6359_vpu_buck_reg {
 245         regulator-always-on;
 246 };
 247
 248 &mt6359_vrf12_ldo_reg {
 249         regulator-always-on;
 250 };
 251
 252 &mt6359_vsram_md_ldo_reg {
 253         regulator-always-on;
 254 };
 255
 256 &mt6359_vsram_others_ldo_reg {
 257         regulator-always-on;
 258 };
 259
 260 &pio {
 261         gpio_keys_pins: gpio-keys-pins {
 262                 pins {
 263                         pinmux = <PINMUX_GPIO106__FUNC_GPIO106>;
 264                         input-enable;
 265                 };
 266         };
 267
 268         i2c6_pins: i2c6-pins {
 269                 pins {
 270                         pinmux = <PINMUX_GPIO25__FUNC_SDA6>,
 271                                  <PINMUX_GPIO26__FUNC_SCL6>;
 272                         bias-pull-up;
 273                 };
 274         };
 275
 276         mmc0_default_pins: mmc0-default-pins {
 277                 pins-clk {
 278                         pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
 279                         drive-strength = <MTK_DRIVE_6mA>;
 280                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 281                 };
 282
 283                 pins-cmd-dat {
 284                         pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
 285                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
 286                                  <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
 287                                  <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
 288                                  <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
 289                                  <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
 290                                  <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
 291                                  <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
 292                                  <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
 293                         input-enable;
 294                         drive-strength = <MTK_DRIVE_6mA>;
 295                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 296                 };
 297
 298                 pins-rst {
 299                         pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
 300                         drive-strength = <MTK_DRIVE_6mA>;
 301                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 302                 };
 303         };
 304
 305         mmc0_uhs_pins: mmc0-uhs-pins {
 306                 pins-clk {
 307                         pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
 308                         drive-strength = <MTK_DRIVE_8mA>;
 309                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 310                 };
 311
 312                 pins-cmd-dat {
 313                         pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
 314                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
 315                                  <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
 316                                  <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
 317                                  <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
 318                                  <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
 319                                  <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
 320                                  <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
 321                                  <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
 322                         input-enable;
 323                         drive-strength = <MTK_DRIVE_8mA>;
 324                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 325                 };
 326
 327                 pins-ds {
 328                         pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
 329                         drive-strength = <MTK_DRIVE_8mA>;
 330                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 331                 };
 332
 333                 pins-rst {
 334                         pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
 335                         drive-strength = <MTK_DRIVE_8mA>;
 336                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 337                 };
 338         };
 339
 340         mmc1_default_pins: mmc1-default-pins {
 341                 pins-clk {
 342                         pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
 343                         drive-strength = <MTK_DRIVE_8mA>;
 344                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 345                 };
 346
 347                 pins-cmd-dat {
 348                         pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
 349                                  <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
 350                                  <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
 351                                  <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
 352                                  <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
 353                         input-enable;
 354                         drive-strength = <MTK_DRIVE_8mA>;
 355                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 356                 };
 357
 358                 pins-insert {
 359                         pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
 360                         bias-pull-up;
 361                 };
 362         };
 363
 364         mmc1_uhs_pins: mmc1-uhs-pins {
 365                 pins-clk {
 366                         pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
 367                         drive-strength = <MTK_DRIVE_8mA>;
 368                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 369                 };
 370
 371                 pins-cmd-dat {
 372                         pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
 373                                  <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
 374                                  <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
 375                                  <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
 376                                  <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
 377                         input-enable;
 378                         drive-strength = <MTK_DRIVE_8mA>;
 379                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 380                 };
 381         };
 382
 383         uart0_pins: uart0-pins {
 384                 pins {
 385                         pinmux = <PINMUX_GPIO98__FUNC_UTXD0>,
 386                                  <PINMUX_GPIO99__FUNC_URXD0>;
 387                 };
 388         };
 389
 390         uart1_pins: uart1-pins {
 391                 pins {
 392                         pinmux = <PINMUX_GPIO102__FUNC_UTXD1>,
 393                                  <PINMUX_GPIO103__FUNC_URXD1>;
 394                 };
 395         };
 396 };
 397
 398
 399 &pmic {
 400         interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
 401 };
 402
 403 &uart0 {
 404         pinctrl-names = "default";
 405         pinctrl-0 = <&uart0_pins>;
 406         status = "okay";
 407 };
 408
 409 &uart1 {
 410         pinctrl-names = "default";
 411         pinctrl-0 = <&uart1_pins>;
 412         status = "okay";
 413 };
 414
 415 &u3phy0 {
 416         status = "okay";
 417 };
 418
 419 &u3phy1 {
 420         status = "okay";
 421 };
 422
 423 &u3phy2 {
 424         status = "okay";
 425 };
 426
 427 &u3phy3 {
 428         status = "okay";
 429 };
 430
 431 &xhci0 {
 432         vusb33-supply = <&mt6359_vusb_ldo_reg>;
 433         vbus-supply = <&otg_vbus_regulator>;
 434         status = "okay";
 435 };
 436
 437 &xhci1 {
 438         vusb33-supply = <&mt6359_vusb_ldo_reg>;
 439         status = "okay";
 440 };
 441
 442 &xhci2 {
 443         vusb33-supply = <&mt6359_vusb_ldo_reg>;
 444         status = "okay";
 445 };
 446
 447 &xhci3 {
 448         vusb33-supply = <&mt6359_vusb_ldo_reg>;
 449         status = "okay";
 450 };