1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021 BayLibre, SAS.
4 * Author: Fabien Parent <fparent@baylibre.com>
9 #include <dt-bindings/gpio/gpio.h>
10 #include "mt8183.dtsi"
11 #include "mt6358.dtsi"
14 model = "Pumpkin MT8183";
15 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
22 device_type = "memory";
23 reg = <0 0x40000000 0 0x80000000>;
27 stdout-path = "serial0:921600n8";
35 scp_mem_reserved: scp_mem_region@50000000 {
36 compatible = "shared-dma-pool";
37 reg = <0 0x50000000 0 0x2900000>;
43 compatible = "gpio-leds";
47 gpios = <&pio 155 GPIO_ACTIVE_HIGH>;
48 default-state = "off";
53 gpios = <&pio 156 GPIO_ACTIVE_HIGH>;
54 default-state = "off";
59 compatible = "murata,ncp03wf104";
60 pullup-uv = <1800000>;
61 pullup-ohm = <390000>;
63 io-channels = <&auxadc 0>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&i2c_pins_0>;
75 clock-frequency = <100000>;
79 pinctrl-names = "default";
80 pinctrl-0 = <&i2c_pins_1>;
82 clock-frequency = <100000>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&i2c_pins_2>;
89 clock-frequency = <100000>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&i2c_pins_3>;
96 clock-frequency = <100000>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&i2c_pins_4>;
103 clock-frequency = <100000>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&i2c_pins_5>;
110 clock-frequency = <100000>;
114 pinctrl-names = "default";
115 pinctrl-0 = <&i2c6_pins>;
117 clock-frequency = <100000>;
122 pinctrl-names = "default", "state_uhs";
123 pinctrl-0 = <&mmc0_pins_default>;
124 pinctrl-1 = <&mmc0_pins_uhs>;
126 max-frequency = <200000000>;
133 hs400-ds-delay = <0x12814>;
134 vmmc-supply = <&mt6358_vemc_reg>;
135 vqmmc-supply = <&mt6358_vio18_reg>;
136 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
137 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
143 pinctrl-names = "default", "state_uhs";
144 pinctrl-0 = <&mmc1_pins_default>;
145 pinctrl-1 = <&mmc1_pins_uhs>;
147 max-frequency = <200000000>;
154 vmmc-supply = <&mt6358_vmch_reg>;
155 vqmmc-supply = <&mt6358_vmc_reg>;
156 keep-power-in-suspend;
164 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
165 <PINMUX_GPIO83__FUNC_SCL0>;
166 mediatek,pull-up-adv = <3>;
167 mediatek,drive-strength-adv = <00>;
173 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
174 <PINMUX_GPIO84__FUNC_SCL1>;
175 mediatek,pull-up-adv = <3>;
176 mediatek,drive-strength-adv = <00>;
182 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
183 <PINMUX_GPIO104__FUNC_SDA2>;
184 mediatek,pull-up-adv = <3>;
185 mediatek,drive-strength-adv = <00>;
191 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
192 <PINMUX_GPIO51__FUNC_SDA3>;
193 mediatek,pull-up-adv = <3>;
194 mediatek,drive-strength-adv = <00>;
200 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
201 <PINMUX_GPIO106__FUNC_SDA4>;
202 mediatek,pull-up-adv = <3>;
203 mediatek,drive-strength-adv = <00>;
209 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
210 <PINMUX_GPIO49__FUNC_SDA5>;
211 mediatek,pull-up-adv = <3>;
212 mediatek,drive-strength-adv = <00>;
218 pinmux = <PINMUX_GPIO113__FUNC_SCL6>,
219 <PINMUX_GPIO114__FUNC_SDA6>;
220 mediatek,pull-up-adv = <3>;
224 mmc0_pins_default: mmc0-pins-default {
226 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
227 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
228 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
229 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
230 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
231 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
232 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
233 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
234 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
236 drive-strength = <MTK_DRIVE_14mA>;
237 mediatek,pull-up-adv = <01>;
241 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
242 drive-strength = <MTK_DRIVE_14mA>;
243 mediatek,pull-down-adv = <10>;
247 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
248 drive-strength = <MTK_DRIVE_14mA>;
249 mediatek,pull-down-adv = <01>;
253 mmc0_pins_uhs: mmc0-pins-uhs {
255 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
256 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
257 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
258 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
259 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
260 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
261 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
262 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
263 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
265 drive-strength = <MTK_DRIVE_14mA>;
266 mediatek,pull-up-adv = <01>;
270 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
271 drive-strength = <MTK_DRIVE_14mA>;
272 mediatek,pull-down-adv = <10>;
276 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
277 drive-strength = <MTK_DRIVE_14mA>;
278 mediatek,pull-down-adv = <10>;
282 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
283 drive-strength = <MTK_DRIVE_14mA>;
284 mediatek,pull-up-adv = <01>;
288 mmc1_pins_default: mmc1-pins-default {
290 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
291 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
292 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
293 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
294 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
296 mediatek,pull-up-adv = <10>;
300 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
302 mediatek,pull-down-adv = <10>;
306 pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
311 mmc1_pins_uhs: mmc1-pins-uhs {
313 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
314 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
315 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
316 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
317 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
318 drive-strength = <MTK_DRIVE_6mA>;
320 mediatek,pull-up-adv = <10>;
324 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
325 drive-strength = <MTK_DRIVE_8mA>;
326 mediatek,pull-down-adv = <10>;
333 domain-supply = <&mt6358_vgpu_reg>;
337 proc-supply = <&mt6358_vproc12_reg>;
341 proc-supply = <&mt6358_vproc12_reg>;
345 proc-supply = <&mt6358_vproc12_reg>;
349 proc-supply = <&mt6358_vproc12_reg>;
353 proc-supply = <&mt6358_vproc11_reg>;
357 proc-supply = <&mt6358_vproc11_reg>;
361 proc-supply = <&mt6358_vproc11_reg>;
365 proc-supply = <&mt6358_vproc11_reg>;